Transcript DDR SDRAM -- The Memory of Choice for Mobile Computing

DDR SDRAM
The Memory of Choice
for Mobile Computing
Bill Gervasi
Technology Analyst, Transmeta Corporation
Chairman, JEDEC Memory Parametrics
[email protected]
Topics to Cover
 Market
Segments & Fragments
 Mobile
Design Architectures
 DDR
and SDR Power Analysis
 DDR
SO-DIMM Details
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Segments & Fragments
Servers
PC100
PC133
DDR
Workstations
PC100
PC133
DDR
PC Segment 2
PC Segment 1
PC Segment 0
Mobile
Graphics
Rambus
PC100
PC100
PC133
PC100
PC66
DDR
DDR
PC133
PC100
PC133
DDR
DDR
DDR (x16 and x32)
SS167
2H99 1H00 2H00 1H01 2H01
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RAM Evolution
3200MB/s
Mainstream
Memories
2100MB/s
1000MB/s
400MB/s
320MB/s
Simple,
incremental
steps
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Mobile Designs
Mobile
Memory
Controller
 Two
Sockets, T-stub
 133MHz clock (for now)
 2.1GB/s transfer (for now)
5
Butterfly SO-DIMMs
Motherboard
CPU
SO-DIMM
CPU
NB
SO-DIMM

SOCKET
Perfect for notebook

Especially thin & light!

Single access door to both SO-DIMMs
 Internet Appliance: 1 or 2 SO-DIMMs
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SOCKET
Mobile Market Requirements

Low power, low heat

Long battery life

Small form factor

End-user upgrade
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Power = CV2f%
Keys to mobile
design:
Factors:
 Capacitance (C)
 Voltage (V)
 Frequency (f)
 Duty cycle (%)
 Power states




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Reduce C and V
Match f to demand
Minimize duty cycle
Utilize power states
Power: Capacitance
 DDR
Capacitance
Voltage
Frequency
Duty cycle
Power states
capacitance 20% less than SDR
 Tight circuit board design
 Low parasitic sockets
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Power: DDR vs SDR
2
1
0.5
Lower Voltage
means
Lower Power
PC133
(3.3V)
1.5
2.0X
PC100
(3.3V)
PC266
1.2X
(2.5V)
1.0X
0
Relative Watts
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Capacitance
Voltage
Frequency
Duty cycle
Power states
Power: DDR vs SDR
1
0.8
Double the
Bandwidth yet
Lower Power
PC266
1.0X
0.6
0.4
0.2
0
PC100
.31X
PC133
.25X
Relative MB/s per Watt
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Capacitance
Voltage
Frequency
Duty cycle
Power states
Power: Frequency
 Memory

Capacitance
Voltage
Frequency
Duty cycle
Power states
speed to match task demand
Adjust memory clock for lowest power
 Stream
back to back operations on open
bank, then close

DDR burst efficiency really shines
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Power: Duty Cycle
Capacitance
Voltage
Frequency
Duty cycle
Power states
 Caches
minimize memory demands
 DDR cuts burst time in half
 Get
back into low power state sooner
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Long Battery Life
 Lowest
power to perform a task
 Desktop performance expected
 Battery
extending technologies:
SpeedStepTM
 LongRunTM

SpeedStep and LongRun are trademarks of Intel Corporation
and Transmeta Corporation, respectively
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Introducing LongRunTM
SpeedStep
Capacitance
Voltage
Frequency
Duty cycle
Power states
LongRun
The number 11 is a trademark of Spinal Tap
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LongRunTM Technology
Capacitance
Voltage
Frequency
Duty cycle
Power states
 Smart
reprogramming of memory
frequency based on demand
CPU monitors trends in CPU demand
 Automatically adjust CPU voltage,
CPU & memory frequency as needed

 Utilize
all memory power states
Lowest power state possible
 Close banks between bursts

LongRun is a trademark of Transmeta Corporation
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LongRunTM Advantage
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Capacitance
Voltage
Frequency
Duty cycle
Power states
Mobile Market Requirements
 Long
 Low
power, low heat
 Small

battery life
form factor
End-user upgrade
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End User Upgrade
 DDR
SO-DIMM Status
63.6 x 31.75mm
 200 pins on .60mm centers, staggered
 x64 and x72 (ECC) supported
 JEDEC specification votes being counted

 Multiple
mobile designs in progress
 Samples in test now, production 1Q01
 Also great for small (Flex ATX) desktop
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Conclusions
 Memory
of choice for the future
 Enables mobile computing
Low power yields long battery life
 Small form factor end-user upgrades

 Smart
power management schemes
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Summary
 DDR
is here today
Double the bandwidth at lower power
 Evolutionary design change over SDR
 Applies to all market segments

 Industry
Standards
Detailed complete data sheet & models
 Module designs on the web
 Visit http://www.ami2.org

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Thank You
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