Transcript Electric Ship Integrated Power System Architecture Analysis

Ship Electric Power Systems:
Research Activities at USC
Dr. Yong-June Shin
ESRDC Annual Workshop, Austin, TX
May 19-21, 2008
Objectives
• NGIPS ship power architecture
– Modeling and simulation
– Pulsed power load
– Harmonics/ transient problems
– Protection of DC architecture
• Electric wiring/ cable integrity
– Diagnostics/ prognostics methodology
– Wireless sensors for non-intrusive monitoring
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Acknowledgement
• Mr. Blake Langland
– Modeling and Simulation with VTBPro
• Dr. Mohammad Ali
– Cable Diagnostics/ Wireless Sensors
• Drs. Roger Dougal and Enrico Santi
– Ship power architecture and stability
• Graduate Students in Power IT Group
– Mr. Philip Crapse, Mr. Jingjiang Wang
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Low Voltage
4160 V, 60 Hz
Main
Gen
Rectifier
Inverter
Prop Motor
36 MW
Aux
Gen
Transformer
Rectifier
DC/DC
Inverter
4 MW
Ship Service Load Centers
Baseline
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High Voltage
13.8 kV, 60 Hz
Main
Gen
Transformer
Rectifier
Inverter
Prop Motor
36 MW
Aux
Gen
Transformer
Rectifier
DC/DC
Inverter
4 MW
Ship Service Load Centers
Allows for lower current and
increased power levels
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HV, High Frequency
13.8 kV, 240 Hz
Main
Gen
Transformer
Rectifier
Inverter
Prop Motor
36 MW
Aux
Gen
4 MW
Transformer
Rectifier
DC/DC
Inverter
Ship Service Load Centers
Size and weight reduction of
generators and transformers
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Factors for Comparison of Architectures
• Accommodating power level
• Size / Weight of components
• Inherent disturbance invulnerability
– Level of natural disturbance
• Switching rectifiers
• Adjustable speed drives
• Pulse loads
– Isolation of vital motors / loads
– Robust power quality
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VTB Pro AC Electric Ship IPS Power Loop
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VTB Pro AC Electric Ship IPS Ship
Service Load Center
3
4
5
9
Disturbance Simulation
Architecture
Baseline
HV
HV, HF
Frequency
60 Hz
60 Hz
240 Hz
Voltage
4160 V
13.8 kV
13.8 kV
Disturbance
Energy
1.5 MJ /
0.1 s
1.5 MJ /
0.1 s
150 MJ /
1s
150 MJ /
1s
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LV – HV Comparison
Load 5
THD = 7.27%
THD = 9.56%
THD = 4.36%
THD = 1.01%
THD = 1.72%
THD = 0.42%
HV
LV
Load 4
The high voltage architecture inherently better maintains
the quality of power delivered to the vital loads than the low
voltage architecture
1.5 MJ over 0.1 s Disturbance
Load 3
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Harmonic Distance and Similarity
LV – HV
LV
HV
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HV – HV,HF Comparison
THD = 16.99%
THD = 4.06%
HV
THD = 9.76%
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Transient
THD
4
Transient
THD
HV, HF
THD = 24.86%
THD = 57.13%
THD = 16.44%
150 MJ over 1 s Disturbance
3
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Harmonic Distance and Similarity
HV – HV, HF
HV
HV, HF
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Protection for DC System
cable1
cable2
Filter
capacitor in
power
converter
To other
loads
L
Solid-state
Switch
Gate
Ctrl
D
Current
Sensor
Short
circuit
Voltage Sensor
• Inserted inductance
limits the rising rate of
fault current
• Semiconductor
instantly and
momentarily turns off to
Circuit topology of protection circuit module (PCM)
limit fault current, then
Branch circuit
Protection
permanently turns off
Protection
Modules
PCM
Module
PCM
fault is identified as real.
Multiple
Load
loads per
ConV 1
• Freewheeling diode
circuit
PCM
Power Distribution Module
Protection
limits voltage
PCM
Module
PCM
• Capacitor supports the
Load
Primary
ConV 2
ConV
bus voltage so that
PCM
other loads are not
Protection
Module
interrupted.
PCM
PCM
Load
Controller
L1
L5
L6
L10
Ln-4
Load
ConV N
Ln
PCM
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Protection Simulation by VTB
•
•
•
•
Protection circuit reacts to any
over-current situations (including
load inrush current, disturbance,
or short-circuit fault)
Fault current limiting begins
immediately at (e.g.) 1.2X rated,
and restricts fault current to less
than twice rated current.
Protection circuit limits fault
current quickly (e.g. 60μs), and
isolates fault within ms.
Protection circuit stops currentlimiting and returns to normal
operation immediately and
automatically if the fault is selfextinguished, or the start-up of
capacitive load is completed.
Buck converter
Cable to switchboard
Load
Proposed protection
circuit
I max switch to turn off
Pre-fault current
Protection circuit
activation
Pre-fault voltage
After fault
Load1 during fault
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Conclusion
• Proposed AC electric ship integrated power
systems can be modeled and simulated using
VTB Pro
• Combining traditional and innovative metrics
– the invulnerability of an IPS may be quantified
– the effects of particular disturbances may be tracked
• Each architecture has unique advantages, but
in terms of harmonic power quality, the 13.8 kV,
60 Hz architecture is most robust
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Future Work
• Investigate the various effects of changing
the location and number of transient
disturbance
• Develop a method for analyzing the
proposed medium-voltage DC architecture
• Stability investigation with multiple
converters
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Wiring/ Cable Integrity
Problems
Constant vibration
Routine maintenance
Water and Heat
Age-related disturbances
Endanger the integrity of the wiring system in IPS
What is needed:
• Diagnostic/ Prognostics technique:
– Detect and locate hard defects before they lead to serious damage
– Monitor the status and predict the remaining life of a cable
– Detect incipient defects before they evolve into hard defect
• In-situ /non-intrusive wireless sensor development:
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Experimental Setup for Cable Test Bed
JTFDR System Functional Diagram:
Experimental Setup:
Oscilloscope
AWG
Reference Signal
Circulator
Reflected Signal
Cable
Accelerated Aging Thermal
Chamber
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Results A: Diagnostics
JTFDR
Classical TDR
M17/95-RG180, with PTFE insulation Cable
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Results B: Prognostics
Aging Temperature:
250 °C (50°C higher than the maximum operating temperature)
5 hours
20 simulated years
15 hours
60 simulated years
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Interdigitated Non-Intrusive
Electric-Field Sensor
Capacitance Measurement
• Sensor is proximity coupled
– Injects a low frequency signal into a cable
– Measures the capacitance
– Identifies voids in insulation
– Identifies presence of water within insulation
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Detection of Water-related Damage
GRA: Rashed
Bhuiyan
Water-filled
holes
Capacitance (pF)
Insulation
10
9
8
7
6
5
4
3
2
1
0
Measured Capacitance (pF)
Damage Type
1
2
3
Avg.
No damage
1.243
1.226
1.406
1.292
Water in hole
8.288
8.01
8.848
8.382
No hole
Water filled
holes
Capacitance (pF)
Conductor
Faculty Advisor: Dr. Mohammod Ali
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9
8
No hole
7
6
5
Water filled
holes
4
3
2
1
0
1
2
3
4
5
6
Location
PUR cable
1
2
3
4
5
6
Location
PVC cable
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Future Work: Sensor Network for Cable
Diagnostics in IPS
Faculty Advisor: Dr. Mohammod Ali
Sensor cable interface
(Reflection coefficient Γ1 and Γ3)
Return wave Γ2
Sensor
Insulation
Conductor
Forward
wave
60 Hz
Fault
Proximity sensor for cable fault monitoring
  1 e
j 1
 2 e
j 2
 3 e
j 3
Preliminary open circuit test
Develop an advanced wireless sensor network for cable diagnostics and prognostics
1. Reference signal design
2. Detection and localization of defects
3. Sensor Management
4. Prognostics
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Conclusion and Future Work
• Diagnostics/Prognostics
Robust, accurate, sensitive
JTFDR Nondestructive, nonintrusive
Configurable incident signal to suit application
• Wireless Senor Network
• Provide information about the state of a cable
under test
• To predict the remaining life of the cable
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Backup Viewgraphs
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Harmonic Distance Metric
2

PQI Y  PQI X 
HD 
100
2
max PQI Y , PQI X 
• PQI = Power Quality Index
– Total Harmonic Distortion (THD), Distortion
Index (DIN), etc.
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Harmonic Similarity Metric
• Cross-Power Spectral Density
SYX  f   X  f  Y *  f 
• Harmonic Similarity in Magnitude
2   S ( f ) df
HS

 100%
 S ( f ) df   S ( f ) df
• Harmonic Similarity in Phase
YX
Mag
YY
1
HDisS Phase 


YX
( f )  S YX ( f ) df
 100%

• Harmonic Similarity
XX
HS Phase 
S YX ( f ) df
HS 
100  HDisS Phase , if HDisS Phase  0
HDisS Phase  100, if HDisS Phase  0
HS Mag  HS Phase
2
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Notional AC Electric Ship IPS One-Line
Diagram – Ring Bus
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Notional AC Electric Ship IPS One-Line
Diagram – Ship Service Load Center
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