Transcript Presentazione di PowerPoint

Cabling of RICH Electronics
F. Bucci & M. Piccini
Overview
Readout:
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1952 Photomultipliers splitted in two flanges
 976 Photomultipliers per flange (Named Jura and Saleve)
64 Front-end boards (each one 4 NINO for 32 channels)
 32 Front-end boards per flange (in 2 custom crates with 17 slots)
16 TDCB (data)+2 TDCB (OR of NINO chips, 256 signals)
4 TEL62 (data) +1 TEL62 (NINO OR)
2+1 TEL62 on Jura side and 2 TEL62 on Saleve side change!!!
Low and High Voltage:
• 4 Agilent mainframes to power the front-end boards
 2 on Jura and 2 Saleve side
• 4 SY1527 Caen Crate, all on Jura side, with 488 outputs (4 PMs each)
Cabling
Use
Type
Total
CCPC
1Gb/s eth. cable
5
DATA
1Gb/s eth. cable
10
TRIGGER 1Gb/s eth. cable
5
GPU (?)
1Gb/s eth. cable
5
HV control
CANBUS
4
LV control
CANBUS
4
FEE crates
CANBUS
4
H V control 1Gb/s eth. cable
4
LV control 1Gb/s eth. cable
4
Clock&Tr optical fibers
5
Choke/Error
?
?
Jura Saleve
3
2
6
4
3
2
3
2
4(1?)
0
2(1?) 2(1?)
2
2
4
0
2
2
3
2
?
?
Summary
Known problems with the length of the cables to boot the
CCPC  swith needed on Saleve side
In total:
- 33 ethernet cables:
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21 on Jura side
12 on Saleve side
12 (7?) CANBUS cables + 4? (to be defined):
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8 (4?) on Jura side + 2? (to be defined)
4 (3?) on Saleve side + 2? (to be defined)
5 optical fibers:
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3 on Jura side
2 on Saleve side
External inputs needed for Choke&Error connections