The design of an Step-down DC/DC converter

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Transcript The design of an Step-down DC/DC converter

ELG 4135 Course Project
By: P. Liang, M. Shi, Y. Wang
University of Ottawa
November 24, 2006
The continuing increasing of the portable system
results more and more complex electronic system.
 The increasing of automobile is incorporate with
the electronic system, and causes some problem.
 One of the major problem is the requirement of
multiple supply voltages for different portion of
the portable system.

 A DVD based GPS navigation system can has six or
more different supplies:
 12V, 5V, 3.3V, 2.5V, 1.5V, and 1.2V.
Each voltage supply different part of the system, and need
different current input as well.
 Other mobile system such as notebooks, PDAs,
and cellular phones also need multiple voltage
supplies.
 The most common solution is designing a
switching regulator.
 A switching regulator is a circuit that uses a power
switch, low loss component such as inductors, and
capacitors to transfer energy from input to output.
 Even switching regulator has variety of choices.
 One of the solution is using Gallium Arsenide
power switches.
 It has following features:
 Relatively high switching frequency of 40MHz.
 Power efficiency of 77%
 Below is the diagram of this switching regulator:
Fig. 1 : Square - Wave DC/DC step-down or Buck Converter
 This is one of the solution to meet the
requirements for mobile system.
 But It has following drawbacks:
 Not applicable for multiple voltages supply.
 Power efficiency is not high enough.
 In order to make an improvement. We are using 2
LTC1624 switching regulator controller to design a
24V input, 12V/1A & 5V/3A dual DC/DC step-down
converter. This is our method which is better than
the previous solution.
 Due to the limitation of time and finance, we can
only design a 2 voltages supply converter instead of
6.
 Our new circuit makes following improvements:
 Power efficiency increases up to 95%
 Be able to drive two different voltages supply.
 Add additional capacitor to minimize the ripple.
 From the simulation results, we observed the
following data:
 Input stage:
 Output stage 1:
 Output stage 2:
 Rising time:
 Efficiency:
24V/1.25A
12V/1A
5V/3A
0.2ms~2.5ms
90%
 Using capacitor can change the ripple and the
rising time.
 Increasing/Decreasing capacitor value.
 Decreasing/Increasing ripple
 Increasing/Decreasing rising time
 With one capacitor (100uF)
 With two capacitors (200uF each)
 With four capacitors (200uF each)
 We cannot optimize both the rising time and ripple, we
choose a certain value (four 200uF capacitors ) trying to
make a balance between those two parameters.
 Our design makes improvement in the power
efficiency; the number of power supply; and the
ripples.
 But our design also makes a drawback in the rising
time.
 As we shown, there is a trade-off in our design, we
cannot optimize every part.
 Although our design is not perfect, it is a better
choice than others.
Thank you!
Questions?