Transcript Gallium Arsenide and Silicon FET-type Switches for Repetitive

Gallium Arsenide and Silicon FET-type Switches for
Repetitive Pulsed Power Applications
Xianyue
Charles W.
b
Myles ,
Andras
a
Kuthi ,
Qiong
a
Shui ,
and Martin A.
a
Gundersen
Department of Electrical Engineering-Electrophysics, University of Southern California, Los Angeles, CA 90089-0271
b Department of Physics, Texas Tech University, Lubbock, TX 79409-1051
Pulse generators for next generation applications of repetitive pulsed
power requiring high power and short pulses (<1microsecond) require fast
switching speeds, high repetition rate, high hold-off voltage and high peak
and average current capabilities. Presently limitations in peak voltage
when rapid rise rate is required (e.g. greater than about 1kV with rise
times on the order of nanoseconds) result not only from design
constraints, but also from materials physics. Traditional Si MOSFETs tend
to be voltage limited, with scaling issues complicated by circuit
requirements, and the technology of advanced materials, such as GaAs,
SiC, and Diamond have basic unresolved issues. Here, we report an
investigation of GaAs and a comparison of some of its properties to those
of Si. GaAs is attractive due to its high electron mobility and relatively
mature processing technology, but it has uncertainties related to
fundamental materials limitations and drift velocity saturation. The
purpose of this study is to resolve these fundamental issues, and to
determine whether or not the underlying physics supports the
development of GaAs-based high voltage, fast rising switches that
conduct high peak current.
GaAs vs. Si : from Physics to Practical Technology
• High electron mobility and large energy band gap ensure that GaAs
FET’s are superior and more efficient than Si FET’s in terms of
switching speeds and forward voltage drop.
• The direct energy band gap of GaAs makes integrated circuits with
optoelectronic capabilities can be realized.
• The “lock-on” effect at high electric fields (~ 5 kV/cm) limits the high
voltage handling capability of GaAs FET’s. Furthermore, the current
filaments accompanying this effect greatly reduce the lifetime of such
devices.
• The absence of a natural oxide for GaAs makes gate drive circuits
based on it complicated.
• Larger defect concentrations lower the effective mobility of GaAs below
the theoretical value.
• Packaging issues arise due to the low thermal conductivity of GaAs.
Acknowledgements
The Pulsed Power Group is grateful for the generous support from the
Army Research Office, and the Air Force Office of Scientific Research.
Simulations
Figures 3 and 4 respectively show the hold-off properties and the
switching performance of the simulated devices.
In order to compare GaAs- and Si-based switching devices, we use
ATLAS, a device simulator, to study a vertical Si MOSFET and a recessed
gate GaAs SIT.
The GaAs SIT has a higher hold-off voltage (~370 V) than the Si
MOSFET (~350 V) with the same drift region width. However, the GaAs
SIT yielded a larger leakage current.
Source
Gate
Source
Source
Gate
n+
p well
n+
p well
Gate
n+
p
The GaAs SIT has faster turn on / turn off speeds and lower forward
voltage drop. Hence, it has better power efficiency.
p
SI GaAs
n- Silicon
◄ Figure 3. Simulation results for drain source
current versus drain source voltage for the Si
MOSFET and the GaAs SIT considered here. The
hold-off voltage can be obtained from the figure.
n type GaAs substrate
n+ Silicon
Drain
Drain
(b)
(a)
Figure 1. Cross sectional structure of (a) Si MOSFET and (b) GaAs SIT
Figure 1 shows a schematic of the cross sectional structures of the Si
MOSFET and the GaAs SIT which we considered.
To hold off high voltage, each device has a 30 μm epi-layer as the drift
region. The n+ drain regions are doped at n = 3.5 x 1018 cm-3 to form ohmic
contacts. To be realistic, a deep donor energy level (0.65 eV below the
conduction band minimum), with a defect concentration of 1.6 x 1016 cm-3
was included in the GaAs SIT simulations.
Figure 4. Switching properties of the Si
MOSFET and the GaAs SIT. The simulation
circuit schematic is shown below.
Results
The specific on-resistance for both the Si MOSFET and the GaAs SIT were
obtained. These are 25.4 mΩ·cm2 and 64.2 mΩ·cm2, respectively. Figure 2
shows a plot containing our simulation results and the experimental results
from references P. Hadizad, 1992 and G. M. Deboy et al. 1998. The Si-based
devices can reach the theoretical limit, even beyond it while there is still an
effort to reach the GaAs theoretical limit. A possible way is to apply a
junction termination extension to try to reduce the electric field nonuniformity.
2
Introduction
log (Specific On-resistance (mOhm-cm ))
a
a
Gu ,
Figure 2. Theoretical and experimental
specific on-resistance, as a function of
blocking voltage for GaAs and Si-based
switching devices.
4
G
Trigger Pulse:
Rise time:
2 ns
Fall time:
2 ns
Pulse length: 8 ns
S
D
DC
100 V
R ( drain ) = 500 k
V
References
• M. A. Gundersen, “Research issues for new applications of power modulators”, in
Proc. 22nd International Power Modulator Symposium, 1996, p15
GaAs surface SIT
"CoolMOS"
GaAs SIT simulation
Si MOSFET simulation
5
►
Silicon Theoretical
Limit
3
GaAs Theoretical
Limit
2
1
• G. M. Loubriel, F. J. Zutaverm, W. D. Helgeson, D. L. McLaughlin, M. W. O’Malley
and T. Burke, “Physics and Applications of the Lock-on Effect”, in Proc. 8th IEEE
International Pulsed Power Conference, 1991, p 33
• P. Hadizad, “A High Voltage GaAs Field-Effect Transistor for Pulsed Switching
Applications: The GaAs Static Induction Transistor”, Ph.D. dissertation, Dept. of
Electrical Engineering-Electrophysics, University of Southern California, 1992
0
-1
-2
2.0
2.5
3.0
3.5
log (Blocking Voltage (V))
4.0
• G. M. Deboy, N. Marz, J.-P. Stengl, H. Strack, J. Tihanyi, H. Weber, “A New
Generation of High Voltage MOSFETs Breaks the Limit Line of Silicon”, in Proc.
International Electron Devices Meeting, 1998, p 683