Transcript modeling and control of the ultracapacitor

modeling and control of the ultracapacitorbased regenerative controller electric
drives.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO.
8, pp. 3471-3484, AUGUST 2011
教授:王明賢
學生:胡育嘉
Outline
1.
2.
3.
4.
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6.
Abstract
Introduction
Regenerative energy-storage and emergencypower-supply device using an ultracapacitor and
DC-DC converte
Conversion-System Model
Control Scheme
Experimental Results
DECISION AND CONTROL LAB
Abstract

Two issues are still a great challenge in the design and
application of advanced controlled electric drives, namely,
recovery of the braking energy and ride-through capability
of the drive system.

To achieve system flexibility and better efficiency, the
ultracapacitor is connected to the drive via a dc–dc
converter. The converter is controlled in such a way as to
fulfill the control objectives: the control of the dc-bus
voltage, the ultracapacitor state of charge, and peak-power
filtering.
DECISION AND CONTROL LAB
Abstract

In this paper, we have discussed the modeling and control
aspects of the regenerative controlled electric drive using
the ultracapacitor as energy-storage and emergency powersupply device. The presented model and control scheme
have been verified by simulation and a set of experiments
on a 5.5-kW prototype. The results are presented and
discussed in this paper.
DECISION AND CONTROL LAB
Introduction

advanced controlled electric drives have been used
intensively in recent years. The reason for this lies in their
efficiency, flexibility, and reliability. There are, however,
two important issues to be solved in order to improve the
drive system efficiency and reliability, namely, 1) the
recovery of the braking energy and 2) the drive-system ridethrough capability .
DECISION AND CONTROL LAB
Introduction

Most controlled electric-drive applications, such as lifts,
cranes, tooling machines, and so on, have a demand for
braking at full power. As the ordinary drive converters are
unidirectional converters, the braking energy is dissipated
on a braking resistor or in some applications into the rotor.
The energy losses in such cases can be up from 20% to 50%
of the energy consumed from the mains.
DECISION AND CONTROL LAB
Introduction

These two problems are discussed in details in this paper.
The basic principle of the regenerative drive is briefly
presented in Section II.

Afterward, in Section III, the model of each part of the
system and the model of the entire drive system are
developed.

At the end, in Section IV, a new control scheme is presented
and discussed in details..
DECISION AND CONTROL LAB
Introduction

The control objective is to regulate the dc-bus voltage when
the drive operates in braking mode and to maintain the
ultracapacitor state of charge when the drive operates in
motoring mode (MM) from the mains.

Moreover, the dc-bus voltage has to be maintained at the
minimum level whenever the mains supply is interrupted.
The presented model and the control scheme are
experimentally verified on 5.5-kW general-purpose
controlled electric drive equipped with an ultracapacitor and
a three-level dc–dc converter [23]. The results are presented
and discussed at the end of this paper
DECISION AND CONTROL LAB
Regenerative energy-storage and emergency-powersupply device using an ultracapacitor and dc–dc converter

A simplified circuit diagram of the system is shown in Fig. 1.
The drive system consists of a standard variable-speed-drive
converter (input diode rectifier, voltage dc link, and output
inverter) and a parallel-connected energy-storage device.
DECISION AND CONTROL LAB
A. Description of the Operational Modes

The drive system may operate in several different
operational modes, as shown in Fig. 2. The signification of
the voltages VBUSmax, VBUSmin, UC0max, UC0inM, and UC0min that are
shown in Fig. 2 will be discussed briefly at the end of this
section.
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A. Description of the Operational Modes

1) MM From the Mains: The drive operates in MM, and is
powered from the mains.

2) Braking-Energy Storing Mode (B): The drive operates
inbraking mode, and the braking energy is stored into the
ultracapacitor.

3) Standby Mode (STB): The drive is in standby mode;
there is no energy flow between the drive, mains, and
ultracapacitor.
DECISION AND CONTROL LAB
A. Description of the Operational Modes

4) Motoring-Energy-Recovery Mode (MC0): The drive
operates in MM, powered from the ultracapacitor.

5) Ride-Through Mode (RT): The mains supply is
interrupted. The drive is powered from the ultracapacitor via
the dc–dc converter.

6) Ultracapacitor Charging Mode (MM-CH): The mains
supply is recovered, and the drive is supplied from the
mains.
DECISION AND CONTROL LAB
B. Definition of the Voltage References

Let us now define the voltage references VBUSmax, VBUSmin,
UCOmax, UCOinM, and UCOmin. Fig. 3(a) shows the signification
of the reference voltages VBUSmax and VBUSmin. OBF signifies
over braking fault, and USF signifies the undersupply fault.

The ultracapacitor voltage takes a value within an interval
[UC0max − UC0min], as shown in Fig. 3(b).
DECISION AND CONTROL LAB
Conversion-system model

For purposes of analysis and synthesis of the control scheme,
the conversion system will be modeled using well-known
small-signal techniques. For that, a model of the
ultracapacitor and, thereafter, a model of the entire
conversion system will be developed.
DECISION AND CONTROL LAB
A. Ultracapacitor Model

Most of the ultracapacitor models presented in the literature
consider a nonlinear (voltage-dependent) transmission line
or an approximation with a finite-ladder RC network [17],
as shown in Fig. 4(a).

Very often, for simplicity of analysis, the transmission-line
effect is neglected, and a first-order nonlinear model is used
[17].

Fig. 4(b) shows a simplified model of the ultracapacitor that
we use in the following analysis.
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A. Ultracapacitor Model
DECISION AND CONTROL LAB
A. Ultracapacitor Model

The total capacitance is the voltage-controlled capacitance
CC0(uC) = C0 + kCuC

where C0 is the initial linear capacitance that represents the
electrostatic capacitance of the capacitor and kC is a
coefficient which represents the effects of the diffused layer
of a supercapacitor.
DECISION AND CONTROL LAB
B. Entire System Model

Fig. 5 shows a large signal (nonlinear) model of the entire
power-conversion system. The input rectifier is modeled by
a voltage source vREC, diode DR, and filter inductor LBUS. It is
considered that the drive operates in braking mode or MM
from the ultracapacitor. In that case, the dc-bus voltage is
greater that the mains phase-to-phase peak voltage, and
therefore, the input rectifier diodes are blocked. Thus, the
input voltage source vREC, diode DR, and inductor LBUS can be
drooped from the equivalent circuit. This is indicated by the
dashed lines in Fig. 5(a).
DECISION AND CONTROL LAB
B. Entire System Model

The dc-bus load, in this case, a controlled electric drive, is
modeled as a constant power pLOAD. Electric drives
controlled by pulsewidth modulated (PWM) inverters
behave as a constant power load. The inverter output
voltage is controlled to be constant.
DECISION AND CONTROL LAB
B. Entire System Model

The bidirectional dc–dc converter is modeled as a loss-free
power converter with one input (vBUS) and one output (uC0).
The input is modeled by power source pC0 that is connected
on the dc-bus side, while the output is modeled by a current
source iC0 that is connected on the ultracapacitor side.
DECISION AND CONTROL LAB
B. Entire System Model

If we consider a dc–dc converter with an inductor LC0 loaded
by current iC0, the input–output instantaneous power
equation is

However, if the dc–dc converter switching frequency is
much greater than the bandwidth of the dc-bus voltage
control loop, the effect of the inductance LC0 can be
neglected
DECISION AND CONTROL LAB
B. Entire System Model

Thus, the input instantaneous power is equal to the output
instantaneous power

The system of Fig. 5 can be described by following set of
nonlinear equations:
DECISION AND CONTROL LAB
B. Entire System Model

Linearization of the system (3) yields
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B. Entire System Model

Applying Laplace transformation on (4) yields the transfer
function in matrix form

The ultracapacitor current to the voltage transfer function is
DECISION AND CONTROL LAB
B. Entire System Model

The control and disturbance to the dc-bus voltage transfer
functions

When the controlled electric drive operates in steady state,
being supplied from the ultracapacitor, the load power and
the ultracapacitor power are balanced, UC0IC0 + PLOAD = 0.
DECISION AND CONTROL LAB
B. Entire System Model

Substituting this condition into (6) yields

If the ultracapacitor can be considered as an infinite
capacitance in comparison with the dc-bus capacitor CBUS, as
it is the case in most applications, the transfer function GBUS
could be simplified as
DECISION AND CONTROL LAB
B. Entire System Model

The transfer function could be further simplified
considering that the ultracapacitor voltage is high enough
and, therefore, the voltage droop on the series resistance can
be neglected UC0 IC0 RC0. The dc-bus voltage transfer
function is now
DECISION AND CONTROL LAB
Control Scheme - A. Control Objectives

The first control objective is to asymptotically regulate the
dc-bus voltage to the desired reference whenever it is
possible.

The second control objective is to regulate the ultracapacitor
state of charge, depending on the application specification.
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

Fig. 6 shows the control scheme that is proposed for the
presented power-conversion system. One can distinguish an
inner current controller GiC0 and three outer controllers. The
inner controller regulates the ultracapacitor current iC0.
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

The control algorithm is described considering the three
operating modes that are important from the control
perspective: 1) the mains MM; 2) braking and motoring
from the ultracapacitor ; and 3) ride-through mode.
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

1) Mains MM: The dc-bus voltage is vBUS about 1.41VIN,
determined by the mains voltage, where VIN is the mains
phaseto- phase rms voltage. As shown in Fig. 3(a), the dcbus voltage is lower than the reference VBUSmax and greater
than the reference VBUSmin. Hence, the dc-bus voltage
controller GvBUSmax is saturated on UC0inM, while the controller
GvBUSmin is saturated on zero. The ultracapacitor voltage
reference is therefore
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

2) Drive Braking Mode and MM From the Ultracapacitor:
The drive load switches from positive to negative (from
motor mode to generator mode), and therefore, the dc-bus
capacitor CBUS is charged. The dc-bus voltage vBUS increases
until it reaches the reference VBUSmax.

When the drive operates in MM, the ultracapacitor has to be
discharged on the intermediate value UC0inM in order to be
ready for the next braking phase. The dc-bus voltage
controller GvBUSmax regulates the dc-bus voltage to VBUSmax.
The controller GvBUSmax output decreases, and therefore, the
ultracapacitor voltage reference decreases toward UC0inM
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

The ultracapacitor is being discharged, supplying the drive.
Once the ultracapacitor voltage reaches the intermediate
value UC0inM, the dc-bus voltage controller GvBUSmax will be
saturated at the reference UC0inM. The ultracapacitor voltage
is regulated at UC0inM, and therefore, the ultracapacitor
current falls to zero. Discharging of the ultracapacitor is
finished. The dc-bus capacitor is being discharged, and
therefore, the dc-bus voltage decreases until the drive input
rectifier starts to conduct. The drive is supplied again from
the mains.
DECISION AND CONTROL LAB
B. Basic Principle of the Proposed Control

3) Ride-Through Mode: When the mains is interrupted, the dc-bus
voltage starts to decrease until it reaches the minimum reference
VBUSmin. The controller GvBUSmin goes out of saturation, and the output
u2(REF) starts to decrease toward ΔUC0min = UC0min − UC0inM. Since
the controller GvBUSmax is saturated on UC0inM, the ultracapacitor
reference voltage starts to decrease below UC0inM toward UC0min
DECISION AND CONTROL LAB
C. Controllers Synthesis

1) Ultracapacitor Voltage Controller: Fig. 7 shows the
ultracapacitor voltage control loop, where GC0 is the
ultracapacitor current to voltage transfer function (6a) and
GuC0 is the controller.
DECISION AND CONTROL LAB
C. Controllers Synthesis

From Fig. 7, one can see the ultracapacitor voltage
closeloop transfer function.

The ultracapacitor voltage controller is the classical
proportional–integral (PI) controller
DECISION AND CONTROL LAB
C. Controllers Synthesis

The characteristic equation of (13) is

ζC0 is the damping factor and ωC0 is the close-loop
bandwidth.
DECISION AND CONTROL LAB
C. Controllers Synthesis

The proportional and integral gain of the controller can be
computed from (6a) and (15) using the binomial criterion
(ζC0 = 1)

Determine the ultracapacitor voltage error as
DECISION AND CONTROL LAB
C. Controllers Synthesis

If the ultracapacitor is charged/discharged with constant
current with a magnitude iC0max and the ultracapacitor
charge/discharge time is T0, one can compute the
ultracapacitor voltage error at the end of the
charge/discharge phase as
DECISION AND CONTROL LAB
C. Controllers Synthesis

From this short analysis, one can conclude that the worst
case is T0 → 0, which gives maximum voltage error

The controller proportional gain kPC0 is computed from (19)
as
DECISION AND CONTROL LAB
C. Controllers Synthesis

Finally, substituting (20) into (16) yields the controller
integral gain (21) that fulfills the binomial criterion (ζC0 =
1). Equation (21)
DECISION AND CONTROL LAB
C. Controllers Synthesis

2) DC-Bus Voltage Controller(s): The dc-bus voltage
closeloop is shown in Fig. 9.
DECISION AND CONTROL LAB
C. Controllers Synthesis

The ultracapacitor voltage control loop appears in the dcbus voltage control loop as the transfer function.

Because of the limited current capability of the dc–dc
converter, the bandwidth of the ultracapacitor voltage
controller is much lower than that of the dc-bus voltage
controller. Therefore, the integral gain kIC0 is low, and (23)
can be further simplified as
DECISION AND CONTROL LAB
C. Controllers Synthesis

This simplification can be done straightforwardly from (22)
if we take into account that the dc-bus voltage controller is
much faster than the ultracapacitor voltage controller.
Therefore, one can assume that the ultracapacitor voltage
reference uC0(REF) is a unity step function. Applying the
initial-value theorem [35] on (22) yields
DECISION AND CONTROL LAB
C. Controllers Synthesis

The dc-bus voltage closed loop transfer function is defined
by(26) .

The dc-bus voltage controller is the classical PI controller
DECISION AND CONTROL LAB
C. Controllers Synthesis

The characteristic equation of the closed-loop transfer
function (26) is given by the following:
DECISION AND CONTROL LAB
C. Controllers Synthesis

The proportional and integral gains are computed using the
Butterworth criteria
DECISION AND CONTROL LAB
C. Controllers Synthesis

The controllers’ gains (30) depend on the ultracapacitor
voltage, which is, in general case, not constant over time. It
takes values in the range [UC0max − UC0min]. The dc-bus
voltage controller has to be designed to provide sufficient
damping in the worst case ultracapacitor voltage UC0. To
determine the worst case, one can draw the close-loop root
locus versus the ultracapacitor voltage. The root locus is
shown in Fig. 10.
DECISION AND CONTROL LAB
C. Controllers Synthesis

The gains of the dc-bus voltage controllers can be computed
from (30), taking the dc-bus voltage and the ultracapacitor
voltage reference from Fig. 3
DECISION AND CONTROL LAB
D. Simulation

The proposed control scheme was verified by
Matlab/Simulink simulation. The converter model was
implemented asa full nonlinear model (7a). The current
controller was simulated as a first-order low-pass filter with
time constant TiC0 = 300 μs. The ultracapacitor and the dcbus voltage controllers were classical PI controllers with
coefficients calculated from (20), (21), and (30). Table I
summarizes the control-system parameters.
DECISION AND CONTROL LAB
D. Simulation
DECISION AND CONTROL LAB
V. Experiment resuts
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V. Experiment resuts
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V. Experiment resuts
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V. Experiment resuts
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VI. DISCUSSION AND CONCLUSION

The proposed model and control algorithm have been
verifiedby Matlab/Simulink simulation and a set of
experiments on a 5.5-kW prototype. The results show a
good agreement between the theoretical analysis,
simulations, and experiments.Future work on the control of
the ultracapacitor-basedvariable-speed drives will include
some improvements andmodifications in the control
algorithm. In particular, it would beimplemented on the
peak-power filtering function, which willgive us the
possibility to reduce the drive input peak power andoptimize
size and cost of the drive installation.
DECISION AND CONTROL LAB
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