5.2 Circuit Timing
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Transcript 5.2 Circuit Timing
5.2 Circuit Timing
Timing Diagrams
A timing diagram illustrates the behavior of
signals in a digital circuit as a function of time.
Timing diagrams are an important part of the
documentation of any digital system. They can
be used both to explain the timing relationships
among signals within a system and to define the
timing requirements of external signals that are
applied to the system.
The most important information provided by a
timing diagram is a specification of the delay
between transitions.
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5.2 Circuit Timing
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Combinational
Circuit
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tRDY
tDAT
tRDY
tDAT
Since the delays of real digital components can vary
depending on voltage, temperature, and manufacturing
parameters, delay is seldom specified as single number.
Instead, a timing table may specify a range of values by
giving minimum, typical, and maximum values for each
delay.
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5.2 Circuit Timing
Propagation Delay
tpLH — propagation delay when output changes
from LOW to HIGH.
tpHL — propagation delay when output changes
from HIGH to LOW
The delay of a path through the overall circuit is
the sum of the delays through subpaths in the
individual devices.
What is the difference between propagation
delay and transition time?
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5.2 Circuit Timing
Timing Specification
Maximum
Typical is what you see from a device that
was manufactured on a good day and is
operating under near-ideal conditions.
Minimum 1/4 ~1/3 typical delays.
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tRDYmin
tRDYmax
tDATmin
tDATmax
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5.2 Circuit Timing
Timing Analysis
Timing Analysis Tools
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