Transcript AIDA design review

AIDA design review
Davide Braga
Steve Thomas
ASIC Design Group
9 December 2008
Channel Layout
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Low/medium and High Energy channels in parallel
Blocks are sequenced to follow signal’s flow (“left to right”)
Shaper and peak hold at back end to minimize noise
400μm x 6mm
Fast compartors
High speed buffer
700pF feedback cap.
PeakHolds +
out multiplexer
x10-slow comp
Shapers
preAmplifiers + feedback
400um
~6mm
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AIDA design review
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Control signals
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Routed in the central
region between high
and low E.C.s
routed differentially to
limit crosstalk
For 6mm long tracks
time constant up to
~500ps: no need to
regenerate reset
signals
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AIDA design review
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Feedback Capacitance
Top plate connection
Bottom plate connection
Poly2 and substrate
resistance quite high in
this process: a single
700 pF cap would have
a series resistance of
several KΩ
→ substrate, top and
bottom plate connections
are distributed across
the whole area of the
capacitance
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Substrate connection
AIDA design review
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Power supply distribution
Ground/power supply distributed vertically and horizontally across as many
layers as possible to create grid with low resistance (hence to reduce
voltage spikes due to current spikes)
Metal4
Metal3
Metal2
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AIDA design review
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