Transcript ppt

Gigabit Ethernet – IEEE 802.3z
The Choice of a New Generation
ECE 4006c
G2- Gigabit Ethernet Intel/Agilent TX
Javier Alvarez, gte006r
Astou Thiongane, gt3083a
Ebrima Kujabi, gte212s
Background Coverage
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General Introduction to the Ethernet
The IEEE Ethernet Standards
-802.3z
Single Mode V. Multimode Fiber
VCSELs V. EELs
The Specifics of the Project
-The Intel Ethernet Card
- The Maxim Evaluation Board
(MAX3287SW EV KIT)
Evolution of the Ethernet
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The Internet Revolution and the need for ever Increasing
Bandwidth
 The Ethernet Advantage:
- Increase in Efficiency
- Larger Capacity
- Lower cost
- Simpler Networks
From Ethernet to Gigabit Ethernet
Why Fiber?
•The two fibers can transmit the same amount of
information as the bundle of copper wires.
SMF v. MMF
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SMF
- Core Size 9um
- 2km w/o losses
- No bouncing off cladding
MMF
- Core Size 50-100um
- Graded v. Step-Index
Graded Index MMF is what is
most common and what will be
used in this project b/c of low
cost.
VCSEL vs. EEL
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VCSELs have a circular laser beam, which is easier to
couple with fiber than the EEL’s elliptical beam.
VCSELs are cheaper for several reasons:
– They can be tested on the wafer; thus, bad chips can be discarded
early in the manufacturing process.This increases the yield and
decreases the unit price.
– The laser beam being circular and perpendicular to the substrate
makes it possible to couple it with fiber without rectifying optical
lenses.
Project Goals
Test previous semester’s
Intel testbed
 Replicate transmitter in the
opto-module
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– By using:
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Maxim 3287 Evaluation Board
Using Reverse Engineering to
design our own board
Test the board by:
– Obtaining an eye diagram
Intel Opto-module
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Pin Assignments:
– Pins 1 and 9 are grounds for
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the receiver and transmitter
Pins 2 and 3 are differential
inputs for the receiver
Pin 4 is Signal Detect
Pin 5 and 6 are VCC for the
receiver and transmitter
Pins 7 and 8 are differential
outputs for the transmitter.
Intel Opto-module (Cont’d)
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The sub-circuit in the the red
box is the actual opto-module,
which consists of a TX (top)
and RX (bottom).
The circuit in the green circle
is a filter for the dc power
provided to the transmitter
and receiver.
Capacitors C9, C10, C11, and
C12 provide dc coupling.
Resistors R1, R2, R3 and R4
provide 50 ohm terminations.
Opto-module (Cont’d)
Our Group’s part of the
job is to design a
transmitter.
 The other groups have to
design the laser and the
receiver.
 The figure on the right is
a high level drawing of
how all three parts will
be put together for
testing.
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General Use of MAXIM board
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Replace transmitter of
Intel opto-module with
Maxim 3287.
 MAXIM 3287, is a
transmitter used to drive
the VCSEL for optical
transmission.
Maxim Board Specs
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Basic Features
– Optimized operation at 1.25 Gbps.
– Supports a current modulation up to 30mA.
– Deterministic Jitter of approx. 22 ps.
– Requires a 3.3 V to 5V power supply.
Component Analysis
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Differential Input (IN+, IN-)
& Output (OUT+, OUT-)
– Eliminates noise in channel
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Reference Voltage (REF)
– Used for programming a laser
bias current in VCSEL
applications (~0.8mA)
– Feature disabled for this
project
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Monitor Diode (MD)
– Monitors Laser Current
– Not supported by board
Component Analysis (Cont’d)
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Current Modulation
Control (Pin 15)
 Temperature Coefficient
Control (Pin 16)
AC Coupling
• Remove R20 (49.9)
• Replace R24 (24.9) with R20
Safety Features
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Shutdown Driver Output (SHDNDRV)
 Power-On Reset (POR)
– Resets Laser when turned off.
– Rejects Noise caused by VCC during power-on or hot
plugging.
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Bias Controlling Transistor Driver (BIASDRV)
– Transistor placed between BIASDRV and VCC
– Ensures Low Noise Operation
– Rejects Power Supply Noise
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Decoupling Capacitors at VCC & GND
Board Design
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The Figure below shows a PSpice schematic of the
new board design without the safety features.
Board Design (Cont’d)
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Parts List Consists:
Transmission Line Issues
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To avoid transmission line problems, wires should
not be longer than 1/10 of a wavelength.
 Using the equations in the figure below, it was
determined that the wires should not be longer than
4mm.
IEEE 802.3z Eye Mask
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The Eye Mask from
IEEE 802.3z on the
figure shows the
distinction between a
logical 1 and 0
 An open eye represents
proper functionality
PCB Layout
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In order to avoid
transmission line
problems, components in
the signal path were
placed close to the pins
on the Maxim chip.
 The trace widths and
separations were laid out
to match the
manufacturer’s (Bob
House) specifications.
New Populated board
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The figure to the right
shows the board that was
designed using
SuperPCB
 The yellow jumper wires
connect VCC to certain
components because the
initial design did not
include them.
Quick fixes
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The components in the
red circles are SMA
connectors
– They had to be moved
from the top to the bottom
of the circuit:
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To avoid more
Transmission line problems
Make better contact with
the board.
Maxim Board Eye Diagrams
• Eye from DC coupled board.
• Eye from AC coupled board
• Overshoot at bottom could be
attributed to:
• Overshoot at bottom is smaller
than when DC coupled.
-Power Supply noise
- Inductance from board
•Undershoot at top possibly due to
using 47 termination, instead of
49.9.
Eye Diagram from New Board
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The eye diagram was
from a simple square
wave (D215) produced
by the BERT.
 An open eye could not
be obtained from the
other bit patterns.
– This could be attributed
to transmission line
problems.
Troubleshooting
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The red arrows show
where the pins were
connected to the traces
via small metallic
wires.
– The length of these
wires might be the
major contributor to
transmission line
problems.
Recommendations
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Redesign the board using SuperPCB to
incorporate all the fixes.
 Be very cautious about transmission line
problems.
– The lines to be considered the most are the ones
lying on the signal path.