Transcript Folie 1
Serial Powering vs. DC-DC Conversion A First Comparison
Tracker Upgrade Power WG Meeting
October 7th, 2008
Katja Klein
1. Physikalisches Institut B
RWTH Aachen University
Outline
• Compare Serial Powering & DC-DC conversion under various aspects
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Power loss in cables
Local efficiency
Compatibility with services
Power supplies
Bias voltage
Safety
Slow control
Start-up
Scalability
Flexibility
Potential to deliver different voltages
Process considerations & radiation hardness
Interplay with FE-chip
Interplay with readout & controls
Noise
Material budget
Space
Test systems
• Discussion
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Serial Powering vs. DC-DC Conversion
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The Basic Ideas
Serial powering
Parallel powering with DC-DC conversion
• Powered from constant current source
• Each module is on different ground
potential AC-coupled communication
• Shunt regulator and transistor to take
excess current and stabilize voltage
• Voltages are created locally via shunt
and linear regulators
• Need radiation-hard magnetic field tolerant
DC-DC converter
• One converter per module or parallel scheme
• 1-step or 2-step conversion
Vdrop = RI0
Pdrop = RI02
Conversion ratio r:
r = Vout / Vin ! << 1
Pdrop = RI02n2r2
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The Buck Converter
The “buck converter“ is simplest inductor-based step-down converter:
Convertion ratio g > 1:
g = Vin / Vout
Switching frequency fs:
fs = 1 / Ts
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The Charge Pump
• Capacitor-based design
• Step-down: capacitors charged in series and discharged in parallel
• Conversion ration = 1 / number of parallel capacitors
• Low currents
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Implementation Examples
Serial powering:
PP with DC-DC conversion:
Atlas pixels, Tobias Stockmanns
Stefano Michelis, TWEPP2008
• Regulators on-chip or on the hybrid
• AC-coupled communication with off-module
electronics
• Power for optical links not integrated
• HV not integrated
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• Two-stage system
• Diff. technologies proposed for the two stages
• Analogue and digital power fully separated
• Power for optical links ~ integrated
• HV not integrated
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What Conversion Ratio do we need?
Conversion ratio needed for parallel powering with DC-DC converters?
• Total tracker current estimate
Current strip tracker: 15kA; current pixel: 1.5kA
Geoffs strawman: strips: 25kW/1.2V = 21kA; pixels: 3.2kA; trigger layers: 10kA
Currents increase roughly by factor of 2 in this strawman
• Power loss in cables
Goes with I2 increase by factor of 4 for same number of cables (2000)
Total power loss inverse proportional to number of power groups
Can compensate with (conversion ratio)2
• Material budget
Saving in cable x-section scales with I
Total material independent of segmentation
Of course want to reduce as much as possible
With conversion ratio of ¼ we would be as good as or better than today.
SP: current fixed; cable material & power loss depends only on # of cables!
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Power Losses in Cables
• Power losses in cables lead to decrease of overall power efficiency expensive
• ... increase the heat load within the cold volume cooling capacity must be higher
DC-DC,
r = 1/10
SP
DC-DC, r = 1/5
• Consider system with n modules:
Pdet = nI0V0
• Voltage drop on cables & power loss Pcable
calculated within each scheme
• Efficiency = Pdet / Ptotal = Pdet / (Pdet + Pcable)
Serial powering
• Eff. increases with n. Since 10-20
modules can be chained, efficiency
can be very high!
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PP with DC-DC conversion
• Eff. goes down with n. Need more cables
or lower conversion ratio
• Equal to SP if conversion ratio = 1/n
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Local Efficiency
Serial powering
• Constant current source
total power consumption is contant!
• Current of chain is fixed to highest
current needed by any member
• Current not used by a module flows
through shunt regulator
• Linear regulator: voltage difference
between dig. & analog drops across it
• Local power consumption is
increased!
• Estimated increase for
- Atlas pixels (NIM A557): 35%
- Atlas strips (NIM A579, ABCD): 18%
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PP with DC-DC conversion
• All DC-DC converters have inefficiencies
switching losses
ESR of passive components
Ron of transistor etc.
• Typical values (e.g. comm. buck): 80-95%
• Efficiency goes down for low conv. ratio!
• Trade-off betw. eff. & switching frequency
• In two-step schemes, efficiencies multiply
• Estimates (St. Michelis, TWEPP2008):
• Step-1: 85-90%
• Step-2: 93%
• Total: 80-85%
• This needs to be demonstrated
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Compatibility with LIC Cables
Constraints from recycling of current services:
• 2000 LICs with two LV conductors & common return each
Not realistic to split return to obtain 4000 lines
Stay with 2000 LV power lines (“power groups“)
• LV conductors certified for 30V and 20A
• Twisted pairs (HV/T/H/sense) certified for 600V
• 256 PLCC control power cables
• Adapt at PP1 to (lower mass) cables inside tracker
Serial powering
• Current is small
• 30V allows for chains with more than
20 modules
looks compatible
PP with DC-DC conversion
• 30V is largely enough
• For any reasonable segmentation and
conv. factor currents should be lower
e.g. 20 chips a 53mA per module 1.2A / module
20 modules per rod 24A /rod
r = ¼ I = 6A
looks compatible
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Power Supplies
• Assume that power supplies will be exchanged after 10 years
Serial powering
• Constant current source
• Not so common in industry (e.g. CAEN)
• Atlas: PSs developed by Prague group
(developed already their current PSs)
• No sensing
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PP with DC-DC conversion
• Standard PS: ~15V, ~10A
(radiation & magnetic field tolerant?)
• Any sensitivity of converter to input
voltage ripple?
• No sensing needed (local regulation)?
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Bias Voltage
• Power is not a problem (currents are very low)
• Up to now: independent bias lines for 1-2 modules
• Might not be possible anymore when current cables are re-used
Note: T/H/sense wires are equal to HV wires
Serial powering
• Not yet well integrated into concept
• Derive on-module via step-up converters?
In Atlas, piezo-electric transformers are
discussed.
• Or independent delivery using todays
cables
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PP with DC-DC conversion
• Same options as for SP
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Safety (I)
Serial powering
• Open leads to loss of whole chain
• Shunt regulators/transistors to cope
with this
• Several concepts are on the market
(next page)
• Connection to module can break
bypass transistor on mothercable
PP with DC-DC conversion
• Open connections
• Converter itself can break
• Shorts between converter and module
• If PP of several mod.s by one converter:
risk to loose several modules at once
- high V, high I rad.-hardness?
- must be controlable from outside
• Real-time over-current protection?
• Real time over-voltage protection?
• Fermilab expressed interest to perform a systematic failure analysis
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Safety (II)
1. Shunt regulators + transistors parallel on-chip (Atlas pixels)
+ redundancy
- matching issue at start-up
Regulator with lowest threshold voltage
conducts first
all current goes through this regulator
spread in threshold voltage and
internal resistance must be small
2. One shunt regulator + transistor per module
+ no matching issue
- no redundany
- needs high-current shunt transistor
- must stand total voltage
3. One reg. per module + distributed transistors
+ no matching issue
+ some redundancy
- feedback more challenging
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Slow Control
• Module voltage(s)
• Module current(s)?
• Bias current
Serial powering
• Slow control IC or block on hybrid
• Could be used to communicate with
linear regulator and turn to stand-by
• Ideas to sense module voltage in
Atlas pixels:
- sense potential through HV return
- sense through AC-coupled data-out
termination
- sense from bypass transistor gate
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PP with DC-DC conversion
• Slow control IC or block on hybrid
• For on-chip charge pump:
would be useful to have SC information
from individual chips
• Could be used to set converter output
voltage and switch on/off converters
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Start-up & Selective Powering
Serial powering
• If controls powered from separate line,
it can be switched on first
• Devices in chain switched on together
(both module controller and FE-chips)
• Can take out modules only by closing
bypass transistor from outside
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PP with DC-DC conversion
• If converter output can be switched
on/off, then easy and flexible:
- controls can be switched on first
- bad modules (chips?) can be switched off
- groups of chips/modules can be switched
on/off for tests
• This should be a requirement!
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Scalability
• Consequences if more modules are powered per chain or in parallel?
E.g. barrel vs. end caps: different # of modules per substructure
Serial powering
• Current is independent on # of modules
• Number of modules reflected in maximal
voltage within chain; relevant for
capacitors for AC-coupling
constant current source
bypass / shunt transistors
PP with DC-DC conversion
• If one converter per module:
perfect scalability
• PP of several mod. by one converter:
current depends on # of modules,
must be able to power largest group
• Should specify soon what we need
current per chip
# of chips per module
# of modules per substructure
• Otherwise we will be constraint by
currents that devices can provide
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Flexibility
• Flexibility with respect to combination of devices with different currents
E.g. trigger vs. standard module (or 4 / 6-chips)
Serial powering
• Current of chain is equal to highest
current needed by any member
chains with mixed current
requirements are inefficient!
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PP with DC-DC conversion
• If one converter per module:
very flexible, do not care!
• If PP of several modules by one converter:
distribution between modules arbitrary
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Potential to Provide Different Voltages
• Chip supply voltage(es): ~ 1.2V (Atlas: 0.9V for digital part to save power)
• Opto-electronics supply voltage: 2.5 – 3V
Serial powering
• Needed voltage created by regulators
• ~1.2V by shunt regulator
• Lower voltage derived from this via
linear regulator efficiency loss
• Technically could power opto-electronics
and controls via own regulators, but
inefficient to chain devices with different
current consumption
• Decouple from chain
(Atlas: plan to power separately from
dedicated cables)
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PP with DC-DC conversion
• With charge pumps, only integer
conversion ratios are possible
• With inductor-based designs, arbitrary
Vout < Vin can be configured
(but feedback circuit optimized for a
certain range)
• Only hard requirement: Vin >= Vopto
• Analogue and digital voltage can be
supplied independently
no efficiency loss
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Process Considerations & Radiation Hardness
Serial powering
• Regulators must be rad.-hard
• Standard CMOS process can be used;
but...
• HV tolerant components (up to nU0):
- capacitors for AC-coupling
- bypass transistor
• Shunt transistors must stand high
currents (~2A) if one per module
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PP with DC-DC conversion
• Commercial devices are not rad.-hard
Apparent exception: Enpirion EN5360
(S. Dhawan, TWEPP2008)
• Standard 130nm CMOS: 3.3V maximal
• For high conversion ratio transistors
must tolerate high Vin , e.g. 12V
• Several “high voltage“ processes exist
• Rad.-hard HV process not yet identified
• This is a potential show stopper
• For r = ½ (e.g. charge pump) can use
3.3V transistors - radiation hardness?
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Interplay with FE-Chip
Serial powering
• Several options for shunt
- Regulator and transistor on-chip
- Only shunt transistor on-chip
- Both external
• Linear regulators typically on-chip
• Next Atlas strip FE-chip (ABCnext):
- linear regulator
- shunt regulator circuit
- shunt transistor circuit
• Next Atlas pixel chip (FE-I4):
PP with DC-DC conversion
• Ideally fully decoupled
• Not true anymore in two-step approach with
on-chip charge pump
• Next Atlas strip FE-chip (ABCnext):
- linear regulator to filter switching noise
• Next Atlas pixel chip (FE-I4):
- LDO
- Charge pump (r = ½)
• No influence on protocol
- Shunt regulator
- LDO
• DC-balanced protocol
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Readout & Controls
Serial powering
• Modules are on different potentials
AC-coupling to off-module
electronics needed
• Decoupling either on the hybrid
(needs space for chips & capacitors)
or at the end of the rod
PP with DC-DC conversion
• Nothing special: electrical transmission of
data and communication signals to
control ICs
• No DC-balanced protocol needed
(Atlas strips, P. Phillips, TWEPP08)
• Needs DC-balanced protocol
increase of data volume
Atlas pixels, NIM A557
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Noise
Serial powering
• Intrinsically clean
- current is kept constant
- voltages generated locally
• Main concerns:
- pick-up from external source
- pick-up from noisy module in chain
• Tests by Atlas pixels (digital) and strips
(binary) revealed no serious problems
- noise injection
- modules left unbiased
- decreased detection thresholds
- external switchable load in parallel to one
module (changes potential for all modules):
some effect (Atlas pixels, NIM A557)
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PP with DC-DC conversion
• Switching noise couples conductively
into FE
• Radiated noise (actually magnetic
near-field) is picked up by modules
• Details depend on FE, distances,
filtering, coil type & design, switching
frequency, conversion ratio, ...
• Shielding helps against radiated noise,
but adds material, work and cost
• LDO helps against conductive noise,
but reduces efficiency
• Surprises might come with bigger
systems
• Not good to start already with shielding
and system-specific fine-tuning
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Material Budget
Serial powering
• Regulators ~ one add. chip per hybrid
• Components for AC-coupling
- HV-safe capacitors (might be big!)
- LVDS chip
• Flex for discrete components
• Cable cross-section from PP1 to
detector (rest stays) scales with current
- One cable must carry I0
- Total mass depends on modules / cable
• Motherboard/-cable: power planes can
be narrow, small currents & voltages
created locally
Katja Klein
PP with DC-DC conversion
• Converter chip(s)
• Discrete components
- air-core inductor (D = 1-2cm!)
- output filter capacitor(s)
• Flex for discrete components
• One cable must carry I0nr total
mass depends only on conv. ratio
• Motherboard/-cable
- buck converter can tolerate certain
voltage drop since input voltage must
not be exact low mass
- charge pumps have no output
regulation: need exact Vin
• Shielding?
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Space
Serial powering
• Different options are discussed, but
regulators + shunt transistors are either
in readout chip or in a separate chip
~ one additional chip per hybrid
• Components for AC-coupling
- LVDS buffers
- HV-safe capacitors (might be big)
• Bypass transistor?
Katja Klein
PP with DC-DC conversion
• Charge pump in readout chip or in a
separate chip
• Buck converter:
- controller chip
- discrete air-core inductor (D = 1-2cm!)
- discrete output filter capacitor(s)
- more?
very unlikely to be ever fully on-chip
• In all other inductor-based topologies
more components (inductors!) needed
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Test Systems for Construction Phase
Serial powering
• If AC-coupling at end of stave, a
decoupling board is necessary to read
out single modules
• Adapter PCB needed anyway for
electrical readout
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PP with DC-DC conversion
• Electrical readout of single modules
possible with adapter PCB
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Work on Powering within CMS Tracker
• RWTH Aachen (L. Feld)
– proposal accepted
– System test measurements with commercial and custom DC-DC (buck) converters
– Simulation of material budget of powering schemes
– Rad.-hard magnetic-field tolerant buck converter in collaboration with CERN group
• Bristol university (C. Hill)
– proposal accepted
– Development of PCB air-core toroid
– DC-DC converter designs with air-core transformer
• PSI (R. Horisberger)
– no proposal, but private communication
– Development of on-chip CMOS step-down converter (charge pump)
• IEKP Karlsruhe (W. de Boer)
– proposal under review
– Powering via cooling pipes
• Fermilab / Iowa / Mississippi (S. Kwan)
– proposal under review
– System test measurements focused on pixel modules (DC-DC conversion & SP)
– Power distribution simulation software
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Summary
• Both schemes have their pros and cons – how to weigh them?
• SP is complicated, but I do not see a real show stopper
• DC-DC conversion is straightforward, but two potential show stoppers
– noise, radiation-hardness of HV-tolerant process
• Need to understand SP better
– In particular safety, slow controls
• Up to now, we focus on DC-DC conversion – should we start on SP? Who?
• Both Atlas pixels and strips integrate power circuitry in their new
FE-chips: shunt regulators, charge pump, LDO
– Seems to be a good approach - can we do the same?
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