Transcript ECEN5817L38 - University of Colorado Boulder

Active clamp circuits
Can be viewed as a lossless voltage-clamp snubber that employs a
current-bidirectional switch
See Vinciarelli patent (1982) for use in forward converter
Related to other half-bridge ZVS circuits
Can be added to the transistor in any PWM converter
Not only adds ZVS to forward converter, but also resets transformer better,
leading to better transistor utilization than conventional reset circuit
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Techniques in Power Electronics
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Lecture 37
The conventional forward converter
• Max vds = 2Vg + ringing
• Limited to D < 0.5
• On-state transistor current is P/DVg
• Magnetizing current must operate in DCM
• Peak transistor voltage occurs during
transformer reset
• Could reset the transformer with less voltage
if interval 3 were reduced
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Techniques in Power Electronics
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Lecture 37
The active-clamp forward converter
• Better transistor/transformer
utilization
• ZVS
• Not limited to D < 0.5
Transistors are driven in usual half-bridge manner:
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Techniques in Power Electronics
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Lecture 37
Approximate analysis:
ignore resonant transitions, dead times, and resonant elements
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Techniques in Power Electronics
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Lecture 37
Charge balance
Vb can be viewed as a flyback converter output. By use of a current-bidirectional switch,
there is no DCM, and LM operates in CCM.
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Techniques in Power Electronics
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Lecture 37
Peak transistor voltage
Max vds = Vg + Vb = Vg /D’
which is less than the conventional value of 2 Vg when D < 0.5
This can be used to considerable advantage in practical applications where
there is a specified range of Vg
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Techniques in Power Electronics
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Lecture 37
Design example
270 V ≤ Vg ≤ 350 V
max Pload = P = 200 W
Compare designs using conventional 1:1 reset winding and using active
clamp circuit
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Lecture 37
Conventional case
Peak vds = 2Vg + ringing
= 700 V + ringing
Let’s let max D = 0.5 (at Vg = 270 V),
which is optimistic
Then min D (at Vg = 350 V) is
(0.5)(270)/(350) = 0.3857
The on-state transistor current, neglecting ripple, is given by
 ig  = DnI = Did-on
with P = 200 W = Vg  ig  = DVg id-on
So id-on = P/DVg = (200W) / (0.5)(270 V) = 1.5 A
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Techniques in Power Electronics
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Lecture 37
Active clamp case:
scenario #1
Suppose we choose the same turns ratio as in the conventional design.
Then the converter operates with the same range of duty cycles, and
the on-state transistor current is the same. But the transistor voltage is
equal to Vg / D’, and is reduced:
At Vg = 270 V:
D = 0.5
peak vds = 540 V
At Vg = 350 V:
D = 0.3857
peak vds = 570 V
which is considerably less than 700 V
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Lecture 37
Active clamp case:
scenario #2
Suppose we operate at a higher duty cycle, say, D = 0.5 at Vg = 350 V.
Then the transistor voltage is equal to Vg / D’, and is similar to the
conventional design under worst-case conditions:
At Vg = 270 V:
At Vg = 350 V:
D = 0.648
D = 0.5
peak vds = 767 V
peak vds = 700 V
But we can use a lower turns ratio that leads to lower reflected current in
Q1:
id-on = P/DVg = (200W) / (0.5)(350 V) = 1.15 A
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Techniques in Power Electronics
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Lecture 37
Active clamp circuits: some examples
Basic switch network reduces to:
(if the blocking capacitor is
an ac short circuit, then we
obtain alternately switching
transistors—original
MOSFET plus the auxiliary
transistor, in parallel. The
tank L and C ring only
during the resonant
transitions)
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Lecture 37
Example: addition of active clamp circuit to the
boost converter
The upper transistor, capacitor Cb, and tank inductor are added to the hardswitched PWM boost converter. Semiconductor output capacitances Cds are
explicitly included in the basic operation.
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Techniques in Power Electronics
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Lecture 37
Active clamp circuit on the primary side
of the flyback converter
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Techniques in Power Electronics
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Lecture 37
Active clamp to snub the secondary-side diodes of
the ZVT phase-shifted full bridge converter
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Techniques in Power Electronics
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Lecture 37
Active clamp
forward converter
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Techniques in Power Electronics
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Waveforms
(including Ll)
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Techniques in Power Electronics
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Details: different modes
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Techniques in Power Electronics
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About Ll
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Techniques in Power Electronics
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Lecture 37