Transcript Electronic Engineering Final year project By Claire Mc Kenna

Electronic Engineering Final
Year Project 2008
By Claire Mc Kenna
Title: Point of Load (POL) Power Supply
Design
Supervisor: Dr Maeve Duffy
Overview
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Project Outline
Background
Research
Buck and Multiphase Buck Converter Simulation
Vicor V.I Chip Simulation
Buck Converter Vs V.I Chips
Project Outline
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Objective is to compare the industry used
Dc-Dc Voltage Regulator Module (VRM)
the (Interleaved Buck Converter) with an
alternative ‘Factorised Power’ solution.
Factorised power converters V.I Chips,
PRM and VTM made by Vicor Corporation.
Pre-Regulator Module (PRM) and Voltage
Transformation Module (VTM) chips.
Background
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Operating voltages for microprocessors are
getting smaller e.g. 1V.
As the operating voltage is reduced the current
drawn is increased.
Higher current results in higher dissipated losses
in MOSFETs and copper paths.
Challenge to maintain a constant output voltage
under steady state and transient load conditions
Background
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When the processor switches from one
state to another voltage drops and spikes
occur.
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Vicor have proposed a factorised power
solution, providing low voltage (0.8V) and high
current (100A) direct from 48V input.
Compare the V.I chips and the industry used
interleaved buck under steady state and
transient load conditions.
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Factorised Power Solution
Research
Review of VRM issues for future
microprocessor requirements.
 Research on the PRM and VTM V.I chips.
 Review of Buck converter using Pspice.
 Review of Synchronous Buck Converter
 Review of the Multiphase Interleaved
Buck Converter.
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Buck Converter Simulation
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Required Buck Converter Specification
Input Voltage – 12V
Output Voltage – 1.3V
Frequency – 500KHz
Output Current – 100A
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Inductor and Capacitor values were calculated.
The duty cycle D was found to be 0.108, T = 2us,
Ton = 0.216us
Buck Converter Simulation
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Pspice representation of the Buck Converter
circuit
M1
L1
1
2
23.18nH
V1
12Vdc
V1 = 0
V2 = 10v
TD = 0
TR = 1n
TF = 1n
PW = 1.4u
PER = 2u
V2
D1
C1
1538uF
R1
0.013ohm
0
0
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The MOSFET used was 200V/120A vendor
model found in the Pspice library.
Buck Converter Simulation Results
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Vout was less than 1.3V due to the
switching losses and voltage drops from
the MOSFET and diodes.
By varying the ON time to 1.4us, 1.3V was
obtained at the output.
The output current measured was 100A.
The output power measured was 140W.
The efficiency was found to be 93%.
Buck Converter Simulation Results
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Current ripple was calculated to be 99.7A and the
measured value obtained was 99.6A.
30A
20A
10A
0A
0s
-I(R1)
20us
I(L1)
40us
60us
80us
100us
Time
120us
140us
160us
180us
200us
Multiphase Interleaved Buck
Converter
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Using the same specification as the Buck a
2-Phase Interleaved Buck was simulated.
M1
L1
1
2
D1
C
R
0
Vdc
M2
L2
1
2
0
0
D2
0
Multiphase Buck Converter
Simulation Results
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Driving the MOSFETS 1us apart introduced the
interleaving effect which is the ripple cancellation
in the output capacitor.
The duty was adjusted and the correct output
voltage and current was obtained.
Multiphase Buck Converter
Simulation Results
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Transient load change was also simulated and
the circuit goes through transient response before
it settles back down.
2.0V
1.5V
1.0V
0.5V
0V
0s
10ms
20ms
30ms
40ms
50ms
V(U7:1)
Time
60ms
70ms
80ms
90ms
Zero Voltage Switching (ZVS) BuckBoost Converter
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The ZVS buck boost is the topology used by the
PRM chip.
It is a discontinuous topology in which the
inductor current IL essentially returns to zero
regardless of the load.
The ZVS enables high frequency operation with
high efficiency.
A switching cycle for the ZVS buck-boost consists
of four phases. The Input Phase, In-Out Phase,
Freewheel Phase and the Clamped Phase.
ZVS Buck-Boost Converter
Simulation
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The required specification for the ZVS Buck-Boost
M1
Input Voltage – 48V
Output Voltage – 35V
Output Current – 3.12A
Frequency – 1.5MHz
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V1
48Vdc
V1 = 0
V2 = 50
TD = 0
TR = 1n
TF = 1n
PW = 0.26u
PER = 0.52u
V2
M3
V4
0
L1
1
2
1uH
V5
V1 = 0
V2 = 12
TD = 0.07u
TR = 1n
TF = 1n
PW = 0.26u
PER = 0.52u
M4
V3
C1
10uF
0
M2
0
0
TD = 0.29u
TF = 1n
PW = 0.22u
PER = 0.52u
V1 = 0
TR = 1n
V2 = 12
R1
10
0
TD = 0.35u
TF = 1n
PW = 0.26u
PER = 0.52u
V1 = 0
TR = 1n
V2 = 12
Here is the Pspice representation of the ZVS Buck-Boost.
ZVS Buck-Boost Converter
Simulation Results
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The ZVS Buck-Boost circuit was simulated using
the switching sequence below.
Switches
Input
Phase
In-Out
Phase
Freewheel
Phase
Clamp
Phase
S1
ON
ON
OFF
OFF
S2
OFF
OFF
ON
ON
S3
OFF
ON
ON
OFF
S4
ON
OFF
OFF
ON
ZVS Buck-Boost Converter
Simulation Results
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When the circuit was simulated the output
voltage was found to be 35V.
Output current 3.5A.
Output power 125W.
The efficiency was calculated and found to
be 98%.
ZVS Buck-Boost Converter
Simulation Results
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A frequency of 1MHz was also simulated
but was found to have bigger voltage ripple
at the output.
It was also found that varying the duration
of the switches, the output voltage could be
controlled.
Sine Amplitude Converter (SAC)
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This is the topology used by the VTM chip.
SAC uses a high frequency resonant tank to
move energy from the input to output.
The resonant tank is formed by the resonant
capacitance, inductance and leakage inductance
in the power transformer windings.
MOSFETS are switched at resonant frequency
and resonant current through the tank is rectified
by diodes and filtered by the output capacitor.
The switching has two power transfer intervals
and two 20ns energy recycling intervals.
Sine Amplitude Converter (SAC)
Simulation
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It can be implemented as a half-bride or a fullbridge resonant converter.
The required specification for the SAC is;
Input Voltage – 35V
Output Voltage – 1V
Output Current – 100A
Frequency – 1.5MHz
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The resonant capacitance (CR) is 52nF and the
resonant inductance (LR) is 200nH which gives a
resonant frequency (FR) of 1.5 MHz
Sine Amplitude Converter (SAC)
Simulation
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Below is the Pspice representation of the halfbridge SAC.
M1
C1
26nF
L1
1
2
Lp
200nH
V1
TX1
35Vdc
Ls1
Ls2
C2
26nF
D1
V1 = 0
V2 = 20
TD = 353.5n
TR = 1n
TF = 1n
PW = 331.5n
PER = 707n
D2
560uF C3
0
R1
0.01
0
V2
V1 = 0
V2 = 50
TD = 0
TR = 1n
TF = 1n
M2 PW = 331.5n
PER = 707n
0
V3
0
Sine Amplitude Converter (SAC)
Simulation Results
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The transformer used is a centre tapped
secondary Pspice model.
The MOSFETS were switched synchronously.
When simulated the output voltage was found to
be 1V.
Output current 100A and the output power 101W .
The efficiency was found to be 99%.
Sine Amplitude Converter (SAC)
Simulation Results
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The full-bridge was also simulated.
M3
V1
35Vdc
C2
L1
1
0
2
52nF
TX1
V1
V2
TD
TR
TF
PW
PER
=
=
=
=
=
=
=
0
80
0
1n
1n
331.5n
707n
V1
V2
TD
TR
TF
PW
PER
=
=
=
=
=
=
=
0
12
353.5n
1n
1n
331.5n
707n
M2
Ls1
Ls2
M4
V1 = 0
V2 = 12
TD = 0
TR = 1n
TF = 1n
PW = 331.5n
PER = 707n
0
200nH
Lp
V1 = 0
V2 = 80
TD = 353.5n
TR = 1n
TF = 1n
PW = 331.5n
PER = 707n
M1
D1
D2
0
0
C1
R1
0
800uF
0.01
0
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S1 was switched with S4, S2 switched with S3.
Sine Amplitude Converter (SAC)
Simulation Results
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The output voltage was found to be 1V.
Output current 100A and the output power
105W.
The efficiency was found to be 95%.
Full-bridge Vs Half-bridge SAC
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The full-bridge has slightly bigger voltage ripple
than the half-bridge.
The full-bridge has an efficiency of 95% and the
half-bridge an efficiency of 99% and therefore is
slightly more efficient than the full-bridge.
If these circuits were to be built in the laboratory
the full-bridge would have bigger losses and
noise than the half-bridge due to the full-bridge
having more switching elements.
Depends on application
Buck Converter Vs V.I Chips
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Multiphase has ripple cancellation.
Can be redesigned to account for the effects of
non-ideal active and passive components.
ZVS Buck-Boost is an efficient regulator at high
frequency switching.
SAC is single phase unlike interleaved which uses
multiple phases to achieve high frequency
switching.
Buck Converter Vs V.I Chips
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In terms of size the buck topology requires a bulky
15,000uF output capacitor to eliminate the ripple
and the SAC requires an 80uF output capacitor.
Overall the V•I chip combination achieves high
switching frequency which means using small
magnetics.
Reduced size due to surface mount technology
and printed circuit transformer incorporated in the
SAC embodiment.
Summary
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Microprocessor operating voltages decreasing
and current is increasing.
Compare Buck Converter with ‘factorised power
solution’ by Vicor Corporation.
Pre-regulator provides efficient regulation at
high switching frequency.
Voltage Transformation enables high operating
frequency, reduced losses and smaller size.
Thank you.
Any Questions?