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Project Description The Data Acquisition subsystem is a member of a family of subsystems that will be combined to create a fully functional robotic platform. The goal was to design, build, and test a hardware platform along with preliminary controlling software. Desired capabilities included conditioning and storing input data, in addition to outputting control signals. The design process focused on functionality and adaptability for use in future applications. Input Subsystem 8 Channels The task of the input board is to acquire, condition, and route data to the PC104. Two modular daughter boards, each with 8 inputs, allow customizable conditioning for the analog inputs. A T-type Thermocouple Cold Junction Compensation daughter board was designed for initial testing. A second pass-through daughter board was designed for preconditioned signals. 16 digital input channels are supported and are presumed to interface to external conditioning circuitry. Input data is passed to the PC104 through a CPLD to be stored locally or on a host computer. Analog Signals 16 Channel Analog Voltage Input 8 Channels Digital Signals 16 Channel Digital Input Daughter Board 2 16 Channels 8 Analog Outputs 8 Channels Analog Current 8 Channels Analog Current The PC104 is the brain of operation, running an open-source embedded version of Linux called Voyage. Each CPLD is the bridge between the DAQ circuitry and the PC104. When the PC104 wants to read or write a block of data it notifies the CPLD. The CPLD selects the appropriate data to read or the appropriate output to write. The PC104 is able to store all relevant data to its on-board Compact Flash memory or pass it to a host PC. 8 Current Loops Input CPLD Serial PC Interface 8 Channels D/A 8 Channels 8 Channels D/A A/D PC104 Output CPLD PC104 Interface A/D Daughter Board 2 Host PC 8 Digital Outputs Digital Signals Analog Signals Output Subsystem The output board is designed to generate control signals specified by the PC104 to drive a wide range of devices. Onboard control signals and serial data are interfaced through a CPLD. Eight current loop channels that comply with the industry standard 4-20mA range are intended for use in applications that are not in the immediate proximity of the DAQ system. Eight additional outputs are available for analog voltage with dual range of 0-5V and 12V. Furthermore, sixteen digital voltage channels provide TTL/CMOS levels with 10mA sink and source capabilities. Power Management The system supports a wide range of 5.5-36V input supply to account for possible variations from a battery supply. Buck and Boost topologies implement DC/DC conversion to enable high energy efficiencies of up to 90%. A high performance voltage error amplifier provides tight voltage regulation accuracy under transient conditions. Low ripple voltages provide a stable voltage regulation throughout the system. Acknowledgement Sponsor Sunstone Circuits KGCOE Back Row (L-R): Jason Hayes (EE) Daniel Pintar (CE) Ian Weber (CE) Andrew Keegan (EE) Front Row (L-R): Mohammed Al-Shehri (EE) Zakariya Al-Sulaimi (EE) Henry Li (EE)