Transcript MP2 Detailed Overview

CPRE 583
Reconfigurable Computing
Lecture 11: Wed 9/28/2011
(Detailed MP2 overview)
Instructor: Dr. Phillip Jones
([email protected])
Reconfigurable Computing Laboratory
Iowa State University
Ames, Iowa, USA
http://class.ee.iastate.edu/cpre583/
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Announcements/Reminders
• First exam 10/7 in class
• MP2 due Friday 10/7
• Mini literary survey assigned
– Final 5-10 page write up on your tree due: Fri 9/30
midnight.
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Literary Survey
• Start with searching for papers from 2008-2011 on
IEEE Xplorer: http://ieeexplore.ieee.org/
– Advanced Search (Full Text & Meta data)
• Find popular cross references for each area
• For each area try to identify 1 good survey papers
• For each area
– Identify 2-3 core Problems/issues
– For each problem identify 2-3 Approaches for
addressing
– For each approach identify 1-2 papers that Implement
the approach.
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Literary Survey: Example Structure
Network Intrusion
Detection
P2
P1
A1
I1
A2
I1
I2
P3
A3
A1
A2
I1
I1
I1
A1
I1
A2
I2
I1
• 5-10 page write up on your survey tree
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Fall 2010 Student Example
Network Intrusion Detection
Systems
detection accuracy
adaptability to new threats
signatures
heuristics
neural
networks
principal
component
analysis
The Study on
Network Intrusion
Detection System
of Snort
An FPGA-Based
Network Intrusion
Detection
Architecture
Network Intrusion
Detection Method
Based on Radial
Basic Function
Neural Network
An Efficient FPGA
Implementation of
Principle
Component
Analysis based
Network Intrusion
Detection System
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support vector
machine
Network Intrusion
Detection Based
on Support
Vector Machine
Network Intrusion
Detection
Method Based on
Agent and SVM
Iowa State University (Ames)
Initial Project Proposal Slides (5-10 slides)
• Project team list: Name, Responsibility (who is project leader)
– Team size: 3-4 (5 case-by-case)
• Project idea
• Motivation (why is this interesting, useful)
• What will be the end result
• High-level picture of final product
• High-level Plan
– Break project into mile stones
• Provide initial schedule: I would initially schedule
aggressively to have project complete by Thanksgiving.
Issues will pop up to cause the schedule to slip.
– System block diagrams
– High-level algorithms (if any)
– Concerns
• Implementation
• Conceptual
• Research papers related to you project idea
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Projects Ideas: Relevant conferences
•
•
•
•
•
•
•
•
•
•
FPL
FPT
FCCM
FPGA
DAC
ICCAD
Reconfig
RTSS
RTAS
ISCA
•
•
•
•
Micro
Super Computing
HPCA
IPDPS
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Weekly Project Updates
• The current state of your project write up
– Even in the early stages of the project you
should be able to write a rough draft of the
Introduction and Motivation section
• The current state of your Final Presentation
– Your Initial Project proposal presentation
(Due Fri 10/22). Should make for a starting
point for you Final presentation
• What things are work & not working
• What roadblocks are you running into
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Projects: Target Timeline
• Teams Formed and Topic: Mon 10/10
– Project idea in Power Point 3-5 slides
• Motivation (why is this interesting, useful)
• What will be the end result
• High-level picture of final product
– Project team list: Name, Responsibility
• High-level Plan/Proposal: Fri 10/14
– Power Point 5-10 slides
• System block diagrams
• High-level algorithms (if any)
• Concerns
– Implementation
– Conceptual
• Related research papers (if any)
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Projects: Target Timeline
• Work on projects: 10/19 - 12/9
– Weekly update reports
• More information on updates will be given
• Presentations: Finals week
– Present / Demo what is done at this point
– 15-20 minutes (depends on number of projects)
• Final write up and Software/Hardware turned in: Day of
final (TBD)
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Project Grading Breakdown
• 50% Final Project Demo
• 30% Final Project Report
– 20% of your project report grade will come
from your 5-6 project updates. Friday’s
midnight
• 20% Final Project Presentation
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Common Questions
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Overview
• MP2 detailed overview
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What you should learn
• UDP / IP / Ethernet protocol layout
• Basic understanding of how and why tcpdump is
useful
• Quick look at a simple network socket program
used in MP2 to send/receive data
• MP2 testbench organization
• How to tell the FPGA to connect to I/O pins
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MP2 Overview
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Example: Network Processing Tasks
• Raise an alert signal when the pattern (e.g.
“corn!”) is detected
• Return the number of times “corn!” is detected
– Place count value as the last byte of the payload
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Streaming Network application (MP2)
• Detect patterns in payload (e.g. “Corn!”)
• Place the number of detections in last byte
of payload
Send Alert
FSM
Modify Packet
!
n
r
o
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C
length
dest p
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Network Processing Example: UDP
• UDP – User Datagram Protocol
– Popular protocol for sending data over the internet
(TCP is popular another protocol)
– Typical encapsulated within IP (Internet Protocol)
• UDP/IP
– Gives no guarantee of delivery
• Relies on application layer to implement reliability
• Unlike TCP which has reliably delivery build in.
• Reference for more info on IP and UDP details
– http://www.freesoft.org/CIE/
• RCFs
• Course
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UDP/IP Packet Format
Ver IHL
Note: flags 3 bits
TOS
Identification
UDP Protocol = 17
TTL
Total Length
flags fragment offset
Protocol Header Checksum
IP Header
Source IP Address
Destination IP Address
Options
UDP length (bytes) =
UDP header+payload
Padding
Source Port
Destination Port
Length
Checksum
Byte1
Byte2
Byte3
UDP Header
Byte4
Payload
0
32-bits
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Useful Network Protocol Links
• Ethernet
–
http://wiki.wireshark.org/Ethernet#head-477fea80232d5062bbea553c84d4691d42fc9f80
• IP
–
http://www.networksorcery.com/enp/protocol/ip.htm
• UDP
–
http://www.tcpipguide.com/free/t_UDPMessageFormat.htm
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Viewing Low-level network traffic
• Why?
– Because you may corrupt packets, causing the OS to
drop the packet before your application can see it
• Tcpdump
– Useful program for viewing low level network traffic
– Typical need greater than regular user access
• Example usage
– sudo /usr/sbin/tcpdump -i eth0 -v -s 0 -XX
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MP2 structure
• Testbench
– Sends ethernet packets to your design
– Only knows ehternet: treats IP and UDP as part of its
data payload
• Ucf (user constriant file)
– This is how the FPGA knows how to connect to I/O pins
– Lets take a look
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MP2 demo (details)
• Running MP2
• A quick look at a simple network socket C program
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Next Lecture
• Convey: HC1 overview/case study
– Reading 5 and 6
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Questions/Comments/Concerns
• Write down
– Main point of lecture
– One thing that’s still not quite clear
OR
– If everything is clear, then give an example
of how to apply something from lecture
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Lecture Notes
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