Transcript Document
Enabling Coherent FPGA Acceleration Allan Cantle, President & Founder Nallatech #OpenPOWERSummit Join the conversation at #OpenPOWERSummit 1 Overview Nallatech at a Glance Coherent Attached Accelerators…So what’s new? How CAPI Works compared to PCIe Accelerators IBM/Nallatech’s CAPI Developer Kit Overview CAPI to PMC NVMe Demo Join the conversation at #OpenPOWERSummit 2 Nallatech at a glance Server qualified accelerator cards featuring FPGAs, network I/O and an open architecture software/firmware framework Design Services/Application Optimization Leading supplier of FPGA solutions Energy-efficient High Performance Heterogeneous Computing Real-time, low latency network and I/O processing Altera OpenCL partner OpenPower Foundation Member Join the conversation at #OpenPOWERSummit 3 Coherent Accelerators…So what’s new? “In Socket” Coherent Accelerators Decade of Coherent “In Socket” Accelerators • Not commercially successful, Why? • • • • • • 4 Hyper-Transport, FSB & QPI Proprietary “In Socket” attached Server mechanical fit challenges Need to give up processor socket Proprietary Specification Licensing Issues Always lagging 6-12 Month cadence Coherent Accelerators…So what’s new? “In Socket” Coherent Accelerators IBM’s Coherent Decade of Coherent Accelerator “In Socket” Accelerators Processor Interface, CAPI, •Resolves Hyper-Transport, FSBIssues & QPI ALL these Never Alreadycommercialized….Why? Commercialized • • • • • • Proprietary “In Socket” attached Industry Standard PCIe Attached Server mechanical fit challenges PCIe – No Mechanical Challenges Need to give upallprocessor Processors use availablesocket sockets Proprietary poorly documented OpenPowerand & well documented Expensive & complicated Free & simple OpenPowerlicensing Licensing Always lagging 6-12 Month In sync with POWER & PCIe cadence Cadence CAPI PCIe Cards POWER8 Modules Industry Standard Server Configuration 5 How CAPI Works CAPI FPGA Accelerator – (NOTE: Based on a Standard PCIe Accelerator) Acceleration Portion: Data or Compute Intensive, Storage or External I/O Algorithm Algo rithm PCIe Sharing the same memory space Accelerator is a peer to POWER8 Core Application Portion: Data Set-up, Control POWER8 Processor Join the conversation at #OpenPOWERSummit 6 CAPI technology connections FPGA AFU IBM Supplied PSL PCIe CAPP Memory (Coherent) POWER8 Core Proprietary hardware to enable coherent acceleration Operating system enablement – Ubuntu LE – Libcxl function calls Customer application and accelerator Application sets up data and calls the accelerator functional unit (AFU) AFU reads and writes coherent data across the PCIe and communicates with the application – PSL cache holds coherent data for quick AFU access OS App POWER8 Processor Join the conversation at #OpenPOWERSummit 7 Issues with PCIe Accelerators Device Driver Storage Area Virt Addr Variables Variables Input Data Input Data Memory Subsystem Output Data 3 versions of the data (not coherent). 1000s of instructions in the device driver. PCIE Prior to CAPI, an application called a device driver to utilize an FPGA Accelerator. The device driver performed a memory mapping operation. FPGA Output Data Input Variables Data POWER8 Core DD App POWER8 Core POWER8 Core POWER8 Core POWER8 Core POWER8 Core Join the conversation at #OpenPOWERSummit 8 Benefit of Coherent accelerators Virt Addr With CAPI, the FPGA shares memory with the cores Greatly simplifies programming model 1 coherent version of the data. No device driver call/instructions. PCIE PSL Memory Subsystem FPGA Output Data Input Variables Data POWER8 Core App POWER8 Core POWER8 Core POWER8 Core POWER8 Core POWER8 Core Join the conversation at #OpenPOWERSummit 9 CAPI vs. PCIe Device Driver: Data Prep Typical PCIe Model Flow: Total ~13µs for data prep Copy or Pin Source Data DD Call 300 Instructions MMIO Notify Accelerator 10,000 Instructions Acceleration Application Dependent, but Equal to below 7.9µs Poll / Interrupt Completion Copy or Unpin Result Data Ret. From DD Completion 1,000 Instructions 3,000 Instructions 1,000 Instructions 4.9µs Flow with a Coherent Model: Total 0.36µs Shared Mem. Notify Accelerator 400 Instructions 0.3µs Acceleration Application Dependent, but Equal to above Shared Memory Completion 100 Instructions 0.06µs Join the conversation at #OpenPOWERSummit 10 Nallatech CAPI Attached FPGA Accelerator Nallatech’s 385 Card is the CAPI FPGA accelerator card Collaborated with IBM & Altera through OpenPower Offering CAPI Developer Kit for Power8 CAPI Hardware Developer Kit Components Software / IP Components IBM CAPI Power Nallatech 385 FPGA Service Layer (PSL) Accelerator Included in CAPI Nallatech JTAG Developer Kit Debug Kit (Encrypted FPGA IP) CAPI Host Support Library (libcxl) Tools Documentation Altera Quartus FPGA Tools White Paper and Decision Guide PSL Simulation Engine CAPI User's Guide 385 FPGA Card User Guide 'Memcopy' Example Also Required Power 8 System (IBM Model 8247-21L or 8247-22L ) CAPI Enabled O/S HDL Simulator (initially Ubuntu 14.10 LE (i.e. Cadence, from Canonical) Mentor, Synopsis) OpenPOWER Summit Confidential 11 Nallatech 385 FPGA Accelerator Low cost, low power, high performance Half height, half length PCIe form factor (NIC-size) Altera Stratix V FPGA: A7 PCIe Gen3x8 or CAPI host interface 2 SFP+ network IO ports 2 banks of DDR3 SDRAM: up to 32GB total Join the conversation at #OpenPOWERSummit 12 CAPI Developer Kit, Power8 Server Options IBM Power8 System S812L/(S822L) • • • • • 2U server with 1/(2) 10 or 12 Core 3.42 or 3.02GHz Processor(s) 80/96 MB L3 Cache per socket + 512KB L2 Cache/Core Up to 512GB/(1TB) Memory @ 192/(384) GBytes/s Memory Bandwidth Up to 12/(14) Disk/SSD Drives – RAID optional 2/(4) PCIex16 + 4/(5) PCIex8 Low Profile Slots – 2/(4) CAPI Enabled CAPI - Getting Started Resources More details at nallatech.com/capi Discuss your application at nallatech.com/support Join the conversation at #OpenPOWERSummit 14 CAPI to PMC NVMe Demo NVMe SSD to 385 CAPI FPGA Accelerator Accelerating Data Analytic operations Minimal CPU Core Loading See Demo at Booth 1010 IBM S822L POWER8 Server Nallatech 385 CAPI FPGA Accelerator PMC FLASHTEC NVRAM NVMe Drive Join the conversation at #OpenPOWERSummit 15