T3MAP Summer Plan

Download Report

Transcript T3MAP Summer Plan

T3MAPS Summer Final
Report
Yedi Luo & Raymond Mui
Introduction
Control T3MAPS using Atlys card
Set up:
Goal:
Keep developing DAQ system for T3maps.
•
Column test
•
Analog Test
Progress
Reading
T3MAPS Manual
FEI4 Manual
T3MAPS python software code
•
•
•
Testing
Column test with multiIO board (Sam’s code)
Column test with Atlys card(Hard coded version);
Power supply for T3MAPS, development and improvement.
Column test with Atlys card(changeable version);
•
•
•
•
Column test with Atlys card
Expected output:
SRCLK_G
|||||||||||||||| ||||||||||||||||
SRIN_ALL
||||||__||||||
SROUT
||||||__||||||
Column test success
Power supply Improvement
Phase 1
Phase 2
Phase 3
•
New BNC Oscilloscope Probe Connectors
Bo’s New code test
No SRclock generated
only column selection generated
Difference between Bo’s code and joe’s code
•
Compare Joe and Bo’s code
Both Joe and Bo’s code 144 bit of dac value.
Joe has 32 bit for config value.
Bo has 29 bit for config value
Potential Error Part
HOW WE FIXED IT FOR NOW
Next step
T3MAPS test for fixed code (we can not test with T3Maps, when professor is not around)
if that difference I found is the key point for why Bo’s code doesn’t work
We can use the those parameters(is_hit_or, etc) to develop a new code for it.
Then we can test and develop the analog test part’s code(because analog test need to use those parameter with
potential error).
Thank you !