#### Transcript ppt

```MIPS Assembly
Review
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A computer has processor, memory, and IO devices.
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The processor stores values in registers, and modifies values by
sending them to the ALU.
Memory is where the computer stores a large number of
values. Every byte can be accessed by specifying a unique
address. The address goes from 0 to 0xffffffff in MIPS. In MIPS
we mainly work with word which is 4 bytes.
MIPS instructions learned:
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lw, sw.
Constant or Immediate Operands
Many times we use a constant in an operation
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For example, i++, i--, i += 4, and so on
Since constant operands occur frequently, we should
include constants inside arithmetic operations so that
they are much faster
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MIPS has an add instruction that allows one operand to be a
constant
The constant must be in 16 bits, as a signed integer in 2’s
complement format
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# \$s1 = \$s2 + 100
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Logical Operations
Often we need to operate on bit fields within a word.
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Which allow us to pack and unpack bits into words and
perform logical operations such as logical and, logical or, and
logical negation
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Bit-wise AND
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Apply AND bit by bit
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The resulting bit is 1 if both of the input bits are 1 and zero
otherwise
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There is also a version of AND with an immediate
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and \$t2, \$t0, \$t1
andi \$t2, \$t1, 12
The immediate is treated as an unsigned 16-bit number
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Bit-wise OR
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Apply OR bit by bit
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The resulting bit is 1 if at least one of the input bits is 1 and
zero otherwise
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There is also a version of OR with an immediate
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or \$t2, \$t0, \$t1
ori \$t2, \$t1, 12
The immediate is treated as an unsigned 16-bit number
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Bit-wise XOR
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Apply XOR bit by bit
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The resulting bit is 1 if two bits are different
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There is also a version of OR with an immediate
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xor \$t2, \$t0, \$t1
xori \$t2, \$t1, 12
The immediate is treated as an unsigned 16-bit number
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NOR
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Since NOT takes one operand and results in one
operand, it is not included in MIPS as an instruction
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Because in MIPS each arithmetic operation takes exactly three
operands
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How to implement NOT using NOR?
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The resulting bit is 0 if at least one of the input bits is 1
nor \$t2, \$t0, \$t1
Using \$zero as one of the input operands
It is included in MIPS as a pseudoinstruction
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Exercise 1
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After learnt these instructions, how can we load an
integer value (like 100) into a register (\$t0)?
Exercise 1
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After learnt these instructions, how can we load an
integer value (like 100) into a register (\$t0)?
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ori \$t0, \$zero, 80
Which should we prefer?
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ori. Because it is simpler than add. Simpler means less time, less power
consumption.
Shifts
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Shift instructions move all the bits in a word to the left
or to the right
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Shift left logical (sll) move all the bits to the left by the specified
number of bits
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Shift right logical (srl) move all the bits to the right
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sll \$t2, \$t0, 2
srl \$t2, \$t0, 2
Filling the emptied bits with 0’s
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Example
Suppose register \$s0 (\$16) is 9ten
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1
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
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What do we have in \$t2 (\$10) after
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Example
Suppose register \$s0 (\$16) is 9ten
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1
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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
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We have in \$t2 (\$10) after
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1
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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0
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The value is 144ten = 9ten  24
In general, shifting left by i bits gives the same result as
multiplying by 2i
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Example
Suppose register \$s0 (\$16) is 9ten
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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
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We have in \$t2 (\$10) after
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1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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The value is NOT 9ten  228
Note that overflow happens this time (for signed numbers)
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Instructions for Making Decisions
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A distinctive feature of programs is that they can make
different decisions based on the input data
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Instruction beq (branch if equal)
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To support decision making, MIPS has two conditional
branch instructions, similar to an “if” statement with
a goto
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In C, it is equivalent to
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Note that L1 is a label and we are comparing values in
register1 and register2
Label is an address of an instruction
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Instruction bne
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Similarly, bne (branch not equal) means go to the
statement labeled with L1 if the value in register1
does not equal to the value in regster2
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Equivalent to
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Instruction j (jump)
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MIPS has also an unconditional branch, equivalent to goto
in C
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Compiling if-then-else
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Suppose variables f, g, h, i, and j are in registers \$s0
through \$s4, how to implement the following in MIPS?
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Compiling if-then-else
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Suppose variables f, g, h, i, and j are in registers \$s0
through \$s4, how to implement the following in MIPS?
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Compiling if-then-else
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Suppose variables f, g, h, i, and j are in registers \$s0
through \$s4, how to implement the following in MIPS?
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MIPS Assembly for if-then-else
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Now it is straightforward to translate the C
program into MIPS assembly
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```