Transcript Microprocessors I

Microprocessors I
8051 Addressing Modes
CS-00871
Prof. Msc. Ivan A. Escobar
[email protected]
Introduction
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Assembly language is machine dependant.
Each family of microprocessors or
microncontrollers has its own instruction set.
Each instruction has an 8 bit op-code with an
associated mnemonic.
Some instructions have one or two additional
bytes for operand (data or addresses).
Data Transfer Instructions
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Data is stored at the source address and moved
(copied) to a destination address.
The way these addresses are specified are
determined by the addressing mode.
There are 28 different instructions for data transfer,
which can be categorized into three types:
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MOV <dest>, <src>
Push <source> or Pop <dest>
XCH <dest>,<src>
Addressing Modes
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When operating with data, where does it
reside?
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As part of the instruction?
In a register?
In general memory?
In external memory?
The 8051 has numerous modes of
addressing data.
Available Modes
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Immediate
Register
Direct
Indirect
Relative
Absolute
Long
Indexed
Immediate Addressing
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The data is numeric constant in the operand.
Indicated by a # sign.
MOV A, #34h Moves the value of 34 hex
into the Acc.
2 byte instruction:
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Opcode | Data
Useful for getting constants into registers
Immediate Addressing
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The immediate value is a maximum of 8-bits.
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One exception, when dealing with the DPTR register it
can be 16-bits.
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MOV DPTR, #2000H ; Load the value 2000H into the
DPTR register
MOV R0, #0F0H
; Load R0 with the value F0H
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Register Addressing
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Direct access to eight registers – R0 through
R7.
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MOV A, R0
MOV R1, A
ADD A, R1
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Not all combinations are valid.
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MOV
R2, R1
; Invalid
Register Addressing
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There are 4 banks of registers accessible
through register addressing.
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Only one bank can be accessed at a time
controllable through bit RS0 and RS1 of the PSW
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MOV
PSW, #00011000B
Set RS0:RS1 to 11, therefore, accessing register bank
3.
Register Addressing
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The register is part of the Op-code. Allows for
a 1 byte instruction.
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Op-code uses 3 bits for Rn
MOV A, R3
Moves the contents of R3 into the Acc.
Direct Addressing
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Access any on-chip RAM location
General purpose registers.
Control registers.
May be addressed by location or name
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MOV E0h, #33h Moves the hex value of 33 into memory
location E0h.
MOV P0, #85h
Moves the hex value 85 into P0 register
port.
2 byte instruction + possible data
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Opcode | Direct Address | Data
Direct Addressing
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All on-chip memory locations and registers have 8-bit
addresses.
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Can use the 8-bit address in the instruction.
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; Amem[04H]
Or can use the register name.
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MOV A, 4H
MOV A, R4
Don’t get confused with Immediate mode.
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No “#” sign.
Indirect Addressing
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R0 or R1 hold the location of the internal RAM
location.
Indicated by the @ sign.
MOV A, @R1 Moves the contents of the memory
address indicated by R1 to the Acc.
Example: If R1 contains 23h, the contents of
address 23h will be moved to the Acc.
One byte instruction:
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Opcode using 1 bit for R0 or R1.
Indirect Addressing
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Example:
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MOV R1, #40H
MOV A, @R1
; Make R1 point to location 40
; Move the contents of 40H to A
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MOV @R0, R1
; Move contents of R1 into the
memory location pointed to by
R0.
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Indirect Addressing
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Can also be used for accessing external memory:
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Can use R0 and R1 to point to external memory locations
00H to FFH.
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MOVX A, @R1 ; Move contents of external
memory location whose address
is in R1 into A
Can also use DPTR to point to all 64k of external memory.
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MOVX A, @DPTR
Relative Addressing
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Used with certain jumps.
A jump is made from current address to a
+127 or -128 memory location.
SJMP #20h
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PC = PC + 20 (jump ahead 20 addresses).
2 Byte instruction:
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Opcode | Relative offset
Absolute Addressing
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Used with ACALL (Absolute call) and AJMP
(Absolute Jump).
Allows a call within a 2K page of memory.
The op-code contains 3 of the 11 bits of the address,
the operand contains lower 8 bits.
2 bytes instruction:
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3 bits+op-code | lower 8-bit address.
The address being called must be with the same 2K
page.
Long Addressing
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Used with LCALL (Long Call) and LJMP
(Long Jump) instructions.
Allows jumping to any 16-bit address.
3 bytes instruction:
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Opcode | High order | Low order
Indexed Addressing
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Use a register for storing a pointer to
memory and another register for storing an
offset.
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The effective address is the sum of the two:
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EA = Pointer + Offset
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MOVC A, @A+DPTR
; Move byte from memory
located at DPTR+A to A.