Transcript Lecture 17 and 18

CS 3501 - Chapter 4 (Sec 5.1 &5.2)
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Dr. Clincy
Professor of CS
Dr. Clincy
Lecture
Slide 1
MARIE
• Up to this point, we have discussed: (1) the CPU in general,
(2) the ALU, (3) the Control Unit, (4) the Bus, (5) the Clock, (6)
the I/O subsystem, and (7) Memory and Addressing
• We can now bring together many of the ideas that we have
discussed to this point using a very simple computer
architecture model called MARIE
• MARIE stands for the Machine Architecture that is Really
Intuitive and Easy.
• MARIE was designed for the singular purpose of illustrating
basic computer system concepts.
• While this system is too simple to do anything useful in the real
world, a deep understanding of its functions will enable you to
comprehend system architectures that are much more
complex.
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Lecture
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MARIE Characteristics
MARIE in general consist of a CPU (which contains an ALU and
several registers) and Memory (for storing data and programs).
The MARIE architecture has the following characteristics:
• Binary, two's complement data representation.
• Stored program, fixed word length data and instructions.
• 4K words of word-addressable main memory (not byte
addressable)
• 16-bit data words.
• 16-bit instructions, 4 bits for the opcode and 12 bits for the
address.
• A 16-bit arithmetic logic unit (ALU) with seven registers for control
and data movement.
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Accumulator (AC)
Instruction Register (IR)
Memory Buffer Register (MBR)
Program Counter (PC)
Memory Address Register (MAR)
Input Register
Output Register
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MARIE Registers
Registers are storage locations with in the CPU.
MARIE’s seven registers are:
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Accumulator, AC, a 16-bit register that holds a conditional operator (e.g., "less
than") or one operand of a two-operand instruction.
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Memory address register, MAR, a 12-bit register that holds the memory address
of an instruction or the operand of an instruction.
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Memory buffer register, MBR, a 16-bit register that holds the data after its
retrieval from, or before its placement in memory.
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Program counter, PC, a 12-bit register that holds the address of the next
program instruction to be executed.
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Instruction register, IR, which holds an instruction immediately preceding its
execution.
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Input register, InREG, an 8-bit register that holds data read from an input device.
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Output register, OutREG, an 8-bit register, that holds data that is ready for the
output device.
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MARIE Architecture Depicted
ALU carries out the logic operations
(comparisons) and arithmetic
operations (adding, etc).
Each memory location has a unique address.
Addresses go from 0 to 4K-1 (which is 4095).
Each location can store a 16-bit word
Control Unit
monitors and
control the
execution of all
instructions and
the transfer of
all information
CU extracts the instruction from memory, decodes the instructions, make sure data is in the right place
at the right time, tell the ALU which registers to use, services interrupts, turn on the correct circuitry in
the ALU for operation execution
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MARIE Architecture Depicted
Accumulator, AC holds a conditional operator (e.g., "less
than") or one operand of a two-operand instruction.
Output register, OutREG, an 8-bit register,
that holds data that is ready for the output
device
Not shown is the
Status or Flag
register of the
ALU that holds
info indicating
various conditions
such as overflows
Input register,
InREG, an 8-bit
register that holds data
read from an input
device.
Memory buffer
register, MBR, a
16-bit register that
holds the data after
its retrieval from,
or before its
placement in
memory.
Program counter,
PC, a 12-bit
register that holds
the address of the
next program
instruction to be
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executed
Memory address register, MAR,
a 12-bit register that holds the
memory address of an instruction
or the operand of an instruction
Instruction register, IR, which
holds an instruction immediately
preceding its execution.
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MARIE Bus
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A Bus is needed to transfer data or
instructions into or out of registers
The registers are interconnected, and
connected with main memory through a
common data bus.
Each device connected to the bus is
identified by a unique id or number
Before any device can use the bus, the
device’s unique number is set on the
control lines to allow that device to carry
out an operation.
Separate connections are also provided
between the accumulator and the memory
buffer register, and the ALU and the
accumulator and memory buffer register.
This permits data transfer between these
devices without use of the main data bus.
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MARIE Data Path
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Also have separate communication or data paths
outside of the bus to speed up execution
– The benefit is, these paths allow events to occur in
parallel
– One event can be using the bus
– And some other event can using a data path at the same
time
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Have a communication path between the MAR and
Memory
– MAR provides the inputs to the address lines for memory
– So the CPU knows where to read from or write to
memory
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Have a communication path from the MBR to the AC
Have a communication path from the MBR to the ALU
– Allows data in MBR to be used in arithmetic operations
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Also, info can flow from the AC through the ALU and
back into the AC without traveling on the Bus
The datapath in general is the path that information
follows – the figure depicts MARIE’s datapath
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Lecture
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CS 3501 - Chapter 4 (Sec 5.1 &5.2)
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Dr. Clincy
Professor of CS
Dr. Clincy
Lecture
Slide 9
MARIE Instruction Set Architecture
• A computer’s instruction set architecture (ISA) specifies the format of
its instructions and the primitive operations that the machine can
perform.
• The ISA is an interface between a computer’s hardware and its
software.
• Some ISAs include hundreds of different instructions for processing
data and controlling program execution.
• The MARIE ISA consists of only thirteen instructions.
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MARIE ISA
• This is the format
of a MARIE instruction:
Specifies the instruction to be
executed, therefore 24=16
instructions
Allows for a maximum size of
memory of 212 - 1
• The fundamental MARIE instructions are:
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Lecture
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LOAD Instruction
• The Load instruction allows data to be moved from memory into the
CPU via the MBR and the AC
• All data must be first moved into the MBR and then either into the AC
or ALU
• The Load instruction doesn’t have to name the AC as a final
destination, the AC register is implicit in the instruction
• This is a bit pattern for a LOAD instruction as it would appear in the IR:
• We see that the opcode is 1 and the address from which to load the
data is 3.
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Intro to Other Instructions
Allows data to be moved from the
CPU back to memory
Typically represented as ASCII. In
real-life, has to be converted if used
as numeric. For MARIE, assume
numeric only
Causes the current program
execution to terminate
Move the
data value
found at
address X
into the
MBR, then
add the MBR
value to the
value in the
AC
Move the data
value found at
address X into the
MBR, then
subtract the MBR
value from the
value in the AC
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Allows an unconditional branch. When the
instruction is executed, it causes the contents of the
Program Counter (PC) to be replaced with the
value of X, which is the address of the next
instruction to fetch – thus skipping
Lecture
Allows conditional branching (ie.
while loops, if statements). When
the instruction is executed, the
value in the AC is inspected
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SKIPCOND Instruction
• As mentioned earlier, when SKIPCOND is executed, the value in the
AC is examine
• In MARIE’s case, address bits 10 and 11 are examined:
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Bits used to specify the condition to be tested
If 00, translates to “bypass the next instruction if the AC is negative”
If 01, translates to “bypass the next instruction if the AC is equal to 0”
If 10, translates to “bypass the next instruction if the AC is greater than 0”
If 11, an error condition occurred
• This is a bit pattern for a SKIPCOND instruction as it would appear in
the IR:
• We see that the opcode is 8 and bits 11 and 10 are 10, meaning that
the next instruction will be skipped if the value in the AC is greater
than zero.
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Examine Some Instructions
Opcode is binary 1, for LOAD. The
address where the value in located in
memory is 3. Data found at address 3 is
copied into the AC
Opcode is binary 3, for ADD. The address
where the value in located in memory is 13.
Data found at address 13 is placed in the
MBR, then the MBR value is added to the
value in the AC, and then the value in the
AC is over-written with the sum
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Opcode is binary 8, for SKIPCOND. Bits
11 and 10 are 10 indicating bypass the next
instruction if the AC is greater than 0. If the
AC’s value is less than or equal to zero, this
instruction is ignored and the next
instruction is executed. Otherwise, the PC
is incremented by 1, thus skipping
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MARIE Register Transfer Notation
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Instead of using binary values to represent the instruction, instruction
names or mnemonics used (pronounced Nee-Monics)
Binary version – called machine instructions
Mnemonics version – called assembly language instructions
An assembler’s job is to convert the assembly instructions into the
machine instructions
Recall that architectures are comprised of various components like the
ALU, registers, memory decoders and control units
– A single machine instruction causes these components to execute tasks
– Each machine instruction can consist of multiple component-level operations
– Mini-instructions are being executed. These mini-instructions are called
microoperations
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The exact sequence of microoperations that are carried out by an
instruction can be specified using register transfer language (RTL) or
register transfer notation (RTN).
In the MARIE RTL, we use the notation M[X] to indicate the actual data
value stored in memory location X, and  to indicate the transfer of
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bytes to
register or memory location.
MARIE LOAD RTL
• The RTL for the LOAD instruction is:
MAR  X
Loads the contents of memory
location X into the AC.
Address X is placed into the MAR. The IR uses the bus to copy
the value of X into the MAR
Data at location M[MAR] (or address X) is moved into the MBR.
MBR  M[MAR]
AC  MBR
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This operation and the operation above must be in sequence
and can’t occur at the same time
Data is then placed in the AC. This operation can occur
immediately after the above operation because the MBR and AC
have a direct connection with one another
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MARIE STORE RTL
• The RTL for the STORE instruction is:
MAR  X, MBR  AC
M[MAR]  MBR
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Stores the contents of the AC in
memory location X.
Address X is placed into the MAR and also the
content or value in the AC is placed in the MBR
The contents of the MBR is stored at location
M[MAR] (or address X)
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MARIE ADD RTL
• The RTL for the ADD instruction is:
Data stored at memory location X is added
to the AC.
MAR  X
Address X is placed into the MAR
MBR  M[MAR]
Data at location M[MAR] (or address X) is moved into
the MBR
AC  AC + MBR
Data in the MBR is added to the value in the AC and
the result is stored back in the AC
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MARIE SUB RTL
• The RTL for the ADD instruction is:
Data stored at memory location X is added
to the AC.
MAR  X
Address X is placed into the MAR
MBR  M[MAR]
Data at location M[MAR] (or address X) is moved into
the MBR
AC  AC - MBR
Data in the MBR is subtracted from the value in the AC
and the result is stored back in the AC
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MARIE INPUT, OUTPUT, HALT RTL
INPUT
AC  InREG
Input for any input device is first placed into the
InREG, then the data is transferred into the AC
OUTPUT
OutREG  AC
Contents of the AC is placed into the OutREG, and
eventually sent out to an output device
HALT
No Operation
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No operations performed on registers – the machine
simply ceases execution of the program
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MARIE JUMP RTL
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Causes an unconditional branch to the
The RTL for the JUMP instruction is: given address, X.
PC  X
Therefore to execute this instruction, the address X, must be loaded
into the PC
Since the least significant 12 bits of the 16 bits is the
address, the instruction above is really
PC  IR[11-0]
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MARIE SKIPCOND RTL
• Recall that SKIPCOND skips the next instruction according to the value of
the AC.
• Uses bits 10 and 11 to determine what comparison to perform on the AC
• If the condition is true, the next instruction is skipped (PC incremented)
• The RTL for the this instruction is the most complex in our instruction set:
If IR[11 - 10] = 00
If AC < 0 then
else If IR[11 - 10]
Checking if AC
If AC = 0 then
is equal to zero
else If IR[11 - 10]
If AC > 0 then
then
PC  PC + 1
= 01 then
PC  PC + 1
= 11 then
PC  PC + 1
Checking if AC
is negative
Checking if AC
is positive
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Instruction Processing
• The fetch-decode-execute cycle is the series of steps that a computer
carries out when it runs a program.
• We first have to fetch an instruction from memory, and place it into
the IR.
• Once in the IR, it is decoded to determine what needs to be done
next.
• If a memory value (operand) is involved in the operation, it is retrieved
and placed into the MBR.
• With everything in place, the instruction is executed.
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Instruction Processing – Flow Chart
When program is first loaded, the address of
the first instruction is placed into the PC
Copy the contents of
the PC to the MAR
Go to main memory
and fetch the
instruction found at
address in the MAR,
place it in the IR,
then increment the
PC by 1
Decode the leftmost 4 bits of the IR
in determining the opcode – and copy
the rightmost 12 bits of the IR to the
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MAR
If a memory value (operand) is
involved in the operation, it is
retrieved and placed into the
MBR
With everything in
place, the instruction is
executed.
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Instruction Processing - Interrupts
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All computers provide a way of interrupting the fetch-decode-execute cycle.
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Interrupts occur when:
– A user break (e.,g., Control+C) is issued
– I/O is requested by the user or a program
– A critical error occurs
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Interrupts can be caused by hardware or software.
– Software interrupts are also called traps.
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Interrupt processing involves adding another step to the fetch-decodeexecute cycle as shown below
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Interrupt Instruction Processing
Interrupt
service
routines
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Interrupt - Instruction Processing
• For general-purpose systems, it is common to disable all
interrupts during the time in which an interrupt is being
processed.
– Typically, this is achieved by setting a bit in the flags register.
• Interrupts that are ignored in this case are called maskable.
• Nonmaskable interrupts are those interrupts that must be
processed in order to keep the system in a stable condition.
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I/O - Instruction Processing
• Interrupts are very useful in processing I/O.
• However, interrupt-driven I/O is complicated, and is beyond the
scope of our present discussion.
• MARIE, being the simplest of simple systems, uses a modified
form of programmed I/O.
• All output is placed in an output register, OutREG, and the CPU
polls the input register, InREG, until input is sensed, at which
time the value is copied into the accumulator.
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A Simple Program
• Lets consider a program that adds two numbers together, storing the
sum in memory
• Both the assembly language program and data are stored in memory
• Consider the simple MARIE program given below. We show a set of
mnemonic instructions and data stored at addresses 100 - 106 (hex):
Program
Data
Result
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Assembly
Language
Lecture
Machine
Language
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A Simple Program - Continuing
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Let’s look at what happens inside the computer when our program runs.
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This is the LOAD 104 instruction:
The PC is loaded with the
address of the first instruction
The PC’s contents is stored in
the MAR
The instruction at the address
stored in the MAR is stored into
the IR – initial instruction was
fetched
PC is incremented
Address portion of the instruction
is loaded into the MAR
Opcode portion is decoded
The data at the address stored in
the MAR is stored into the MBR
– operand 35 was fetched
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The MBR’s contents is stored in
the AC
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A Simple Program - Continuing
•
The second instruction, ADD 105:
The PC’s contents is stored in
the MAR (101 vs 100)
The instruction at the address
stored in the MAR is stored into
the IR – initial instruction was
fetched
PC is incremented
Address portion of the instruction
is loaded into the MAR
Opcode portion is decoded
The data at the address stored in
the MAR is stored into the MBR
– operand -23 was fetched
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The MBR’s contents is added to
the contents of the AC, and the
results, 12, is stored in the AC
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A Simple Program - Continued
•
The third instruction, STORE 106:
The PC’s contents is stored in
the MAR (102 vs 101)
The instruction at the address
stored in the MAR is stored into
the IR – initial instruction was
fetched
PC is incremented
Address where the result will be
stored is loaded into the MAR
Opcode portion is decoded
No operand – this operation is
not needed
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The AC’s contents is stored in
the MBR
Lecture
The MBR’s contents is stored in
main memory at the address
located in the MAR
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