Transcript ppt

CS232: Computer Architecture II
Fall 2010
AMD dual-core Opteron
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Who we are

Lecturer:
Prof. Viraj Kumar
Visiting Lecturer
[email protected]
Office hours: Wed/Fri 3pm to 4pm and by email appt., 2211 SC

Teaching Assistants/Section Instructor: Room 0212 SC
Rajesh Bhasin
Samer Fanek
Jungyoon Lee

[email protected]
[email protected]
[email protected]
Thu. 4-6pm
Thu. 2-4pm
TBA
MP 1 released this Friday, due next Friday
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Graded work

6 MPs, 25% of grade
— You can work individually, or in groups of 2 or 3
— You will submit your code + three test cases
— If your code fails your test case: 0
— If your code fails someone else’s test case: small penalty
— If your code fails our test case: larger penalty
— If your test breaks our code: 100%

Three Wednesday Midterms 7pm to 8:30pm, 15% each
— Exam 1: 9/22 ; Exam 2: 10/20 ; Exam 3: 11/17
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Final, cumulative, Friday 12/17, 1:30pm to 4:30pm: 25%
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Section attendance: 5%
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What is computer architecture about?

Computer architecture is about building and analyzing computer systems
HLL
Compiler
ASM
Processor
Memory
Input/Output
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Instruction Set Architecture is bridge between hardware and software
— Study the MIPS ISA in detail
— Learn what compilers do when they translate high-level code into
assembly (we won’t learn how they do it)
— Learn how HLL program constructs are represented to the machine
Key techniques: Pipelining, Caching, Virtual Memory
Tuning complex code for performance (course project)
Exploiting parallelism
Hey Prof. Kumar, Today I interviewed at Microsoft.
I referenced spimbot and used concepts learned in
class multiple times. I just wanted to say THANKS!
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Instruction set architectures
Software
ISA
Hardware

The ISA is an interface between software and hardware
— the hardware “promises” to implement all ISA instructions
— the software uses ISA primitives to build complex programs
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The instruction set architecture affects the hardware design
— simple ISAs require simpler, cheaper processors

Also affects software design
— simple ISAs result in longer programs
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Why MIPS?
 We study the MIPS instruction set architecture to illustrate concepts in
assembly language and machine organization
— concepts are not MIPS-specific
— MIPS is just convenient because it is real, yet simple (unlike x86)
 MIPS ISA is used in many places, primarily in embedded systems
— routers from Cisco
— game machines like the Nintendo 64 and Sony Playstation 2
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What you will need to learn for Exam 1

You must become “fluent” in MIPS assembly:
— Translate from C++ to MIPS and MIPS to C++
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Example: Translate the following recursive C++ function into MIPS
int pow(int n, int m) {
if (m == 1)
return n;
return n * pow(n, m-1);
}
How are complex expressions
broken into simple instructions?
How are arguments passed?
How are values returned?
How is recursion done?
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MIPS: register-to-register, three address
 MIPS is a register-to-register, or load/store, architecture
— destination and sources of instructions must all be registers
— special instructions to access main memory (later)
 MIPS uses three-address instructions for data manipulation
— each ALU instruction contains a destination and two sources
 For example, an addition instruction (a = b + c) has the form:
operation
add
operands
a,
destination
b,
c
sources
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MIPS register file
 MIPS processors have 32 registers, each of which holds a 32-bit value
— register addresses are 5 bits long
 More registers might seem better, but there is a limit to the goodness:
— more expensive: because of registers themselves, plus extra hardware
like muxes to select individual registers
— instruction lengths may be affected
32
D data
5
Write
D address
32  32 Register File
5
A address
B address
A data
B data
32
32
5
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MIPS register names
 MIPS register names begin with a $. There are two naming conventions:
— by number:
$0
$1
$2
…
$31
— by (mostly) two-character names, such as:
$a0-$a3
$s0-$s7
$t0-$t9
$sp
$ra
 Not all of the registers are equivalent:
— e.g., register $0 or $zero always contains the value 0
— some have special uses, by convention ($sp holds “stack pointer”)
 You have to be a little careful in picking registers for your programs
— for now, stick to the registers $t0-$t9
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Basic arithmetic and logic operations
 The basic integer arithmetic operations include the following:
add
sub
mul
div
 And here are a few bitwise operations:
and
or
xor
nor
 Remember that these all require three register operands; for example:
add $t0, $t1, $t2
mul $s1, $s1, $a0
# $t0 = $t1 + $t2
# $s1 = $s1 x $a0
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Larger expressions
 Complex arithmetic expressions may require multiple MIPS operations
 Example:
t0  (t1  t2)  (t3  t4)
add $t0, $t1, $t2
sub $t6, $t3, $t4
mul $t0, $t0, $t6
# $t0 contains $t1 + $t2
# temp value $t6 = $t3 - $t4
# $t0 contains the final product
 Temporary registers may be necessary, since each MIPS instructions can
access only two source registers and one destination
— in this example, we could re-use $t3 instead of introducing $t6
— must be careful not to modify registers that are needed again later
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How are registers initialized?
 Special MIPS instructions allow you to specify a signed constant, or
“immediate” value, for the second source instead of a register
— e.g., here is the immediate add instruction, addi:
addi $t0, $t1, 4
# $t0 = $t1 + 4
 Immediate operands can be used in conjunction with the $zero register
to write constants into registers:
addi
Shorthand:
li
$t0, $0, 4
# $t0 = 4
$t0, 4
# $t0 = 4
(pseudo-instruction)
 MIPS is still considered a load/store architecture, because arithmetic
operands cannot be from arbitrary memory locations. They must either
be registers or constants that are embedded in the instruction.
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Our first MIPS program
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Let’s translate the following C++ program into MIPS:
void main() {
int i = 516;
int j = i*(i+1)/2;
i = i + j;
}
main:
li
$t0, 516
addi $t1, $t0,
mul
$t1, $t0,
li
$t2, 2
div
$t1, $t1,
add
$t0, $t0,
jr
$ra
1
$t1
#
#
#
#
start of main
i = 516
i + 1
i * (i + 1)
$t2
$t1
# j = i*(i+1)/2
# i = i + j
# return
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