Transcript Review - TAMU Computer Science Faculty Pages

Review for Midterm 1
CPSC 321 Computer Architecture
Andreas Klappenecker
Administrative Issues

Office hours have been moved:



Wednesday October 15 and 22 canceled
Thursday October 16 and 23 @ 2:00pm3:00pm
Talk by Bjarne Stroustrup

today @ 4:10pm, HRBB 124
Reading Assignments

Chapter 1,2,3,4, Appendix B







How does the algorithm work?
What is the complexity of the algorithm?
Work some examples
Get familiar with number representations
Assembly programming, the gory details
Combinatorial circuits
Read keyword list first, then the chapter
Early History

1938 Zuse’s Z1



electromechanical, experimental
Zuse’s Z2 almost identical to Z1
1941 Zuse’s Z3




first reliable, freely programmable
computer
memory based on relays
did not have stored program concept
Turing-complete
Early History

1943-44 Mark 1 Colossus




memory based on vacuum tubes
special purpose machine, not Turing complete
but it had some flexibility
used in Bletchley Park to break the fish cipher
Early History

1944 Harvard Mark I by Aiken and team



1945 ENIAC by Eckert and Mauchly


decimal number system
memory based on relays
memory based on vacuum tubes
1945 von Neumann et al.


introduce the stored program principle
incorporated in EDVAC design
Questions




How was the memory of xyz realized?
Was xyz Turing-complete?
Who designed xyz?
…
MIPS Assembly Language



Complete a template program
What does the code fragment do?
Stack usage for recursive procedures



know every nut, bolt and screw
slightly different skills needed
Know your [pseudo]instructions

Is blt a,b,c an instruction?
MIPS Addressing Modes




Immediate addressing
Register addressing
Base displacement addressing
PC-relative addressing


address is the sum of the PC and a constant in the
instruction
Pseudo-direct addressing

jump address is 26bits of instruction concatenated
with upper bits of PC
1. Immediate addressing
op
rs
rt
Immediate
2. Register addressing
op
rs
rt
rd
...
funct
Registers
Register
3. Base addressing
op
rs
rt
Memory
Address
+
Register
Byte
Halfword
4. PC-relative addressing
op
rs
rt
Memory
Address
PC
+
Word
5. Pseudodirect addressing
op
Address
PC
Memory
Word
Word
Addressing Modes

Register Addressing



add $s1, $s2, $s3
$s1 = $s2 + $s3
Immediate Addressing


addi $s1, $s2, 100
$s1 = $s2 + 100
Addressing Modes

Base addressing



lw $s1, 100($s2)
$s1 = Memory[$s2+100]
PC-relative branch


beq $s1, $s2, 25
if ($s1 == $s2) goto PC + 4 + 100
Addressing Modes

Pseudo-direct addressing





j 1000
goto 1000
concatenate 26bit address with upper bits
of the PC
Study section 3.8 for further details
In particular, get used to Figure 3.18
Arithmetic



Know how to add and subtract
Know when overflow occurs
Be able to construct an ALU


or something like that
Carry lookahead
Idea of Carry Lookahead
cout=ab+cin(a xor b)
=ab+acin+bcin
=ab+(a+b)cin
= g + p cin
Generate
g = ab
Propagate
p = a+b
cin
0
0
0
0
1
1
1
1
a
0
0
1
1
0
0
1
1
b
0
1
0
1
0
1
0
1
cout
0
0
0
1
0
1
1
1
s
0
1
1
0
1
0
0
1
Carry Lookahead
Iterate the idea, generate and propagate
ci+1 = gi + pici
= gi + pi(gi-1 + pi-1 ci-1)
= gi + pigi-1+ pipi-1ci-1
= gi + pigi-1+ pipi-1gi-2 +…+ pipi-1 …p1g0
+pipi-1 …p1p0c0
Two level AND-OR circuit
Carry is known early!
Booth’s Multiplication


Looking at 2 bits of multiplier
If the bits are




00
10
01
11
=>
=>
=>
=>
do nothing
beginning run of 1’s: subtract
end of run of 1’s: add
do nothing
Booth’s Multiplication

Multiply 0010 by 0110 = 00001100
0000
00100 sub [= add 11111100]
000000
0010000 add [= add 00010000]
0001100
Floating Point

Know the IEEE 754 representation







sign bit s
exponent E with 8 bits
significand S with 23 bits
bias 127
(-1)s x (1+S)x2(E-127)
Given: 32 bits, interpret
Know all conversions
Final Remarks





Use exercises at end of chapter to
check knowledge
Answers are usually easy to figure out
with the help of the text
Do not cheat! Read the text carefully,
then attempt to solve the problems
Appendices A and B are useful bedtime
reading
There is a need for speed!