Transcript Integrated Devices - Photonics Research Group

Heterogeneous Integration of III-V Active Devices
on a Silicon-on-Insulator Photonic Platform
G. Roelkens, J. Brouckaert, J. Van Campenhout, D. Van Thourhout, R. Baets
Photonics Research Group – Ghent University/IMEC
Sint-Pietersnieuwstraat 41,
B-9000 Ghent – Belgium
e-mail: [email protected]
Photonics Research Group
http://photonics.intec.ugent.be
Outline
• Introduction
• Die-to-wafer bonding for hetero-integration
• Heterogeneously integrated laser diodes
• Heterogeneously integrated photodetectors
• Conclusions and outlook
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Introduction
Why combine silicon with III-V?

silicon
 fall back on CMOS technology
 high index contrast
 no emission nor amplification, yet

III-V
 superb emission, amplification and detection
 full active-passive integration is complex and
expensive, still

III-V on silicon
 combine the best of two worlds
 price: bonding technology
 does it work?
 can it turn into a manufacturing technology?
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Introduction
There are several ways to integrate III-V on SOI

Flip-chip integration of opto-electronic components
 most rugged technology
 testing of opto-electronic components in advance
 slow sequential process (alignment accuracy)
 low density of integration

Hetero-epitaxial growth of III-V on silicon
 collective process, high density of integration
 mismatch in lattice constant, CTE, polar/non-polar
 contamination and temperature budget

Bonding of III-V epitaxial layers
 sequential but fast integration process
 high density of integration, collective processing
 high quality epitaxial III-V layers
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Outline
• Introduction
• Die-to-wafer bonding for hetero-integration
• Heterogeneously integrated laser diodes
• Heterogeneously integrated photodetectors
• Conclusions and outlook
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
III-V/Silicon photonics
III-V die bonding
(unprocessed)
InP substrate removal
Wafer-scale
processing
of III-V devices
SOI Waveguide wafer
Bonding of III-V epitaxial layers

Molecular die-to-wafer bonding
 Based on van der Waals attraction between wafer surfaces

Adhesive die-to-wafer bonding
 Uses an adhesive layer as a glue to stick both surfaces
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
III-V/Silicon photonics
Bonding of III-V epitaxial layers

Molecular die-to-wafer bonding
 Based on van der Waals attraction between wafer surfaces
 Requires “atomic contact” between both surfaces
- very sensitive to particles
- very sensitive to roughness
- very sensitive to contamination of surfaces

Adhesive die-to-wafer bonding
 Uses an adhesive layer as a glue to stick both surfaces
 Requirements are more relaxed compared to Molecular
- glue compensates for particles (some)
- glue compensates for roughness (all)
- glue allows (some) contamination of surfaces
While established technology for SOI, III-Vs often do not
meet the requirements for molecular bonding
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Bonding Technology
Requirements for the adhesive for bonding
<0.1dB/cm

Optically transparent

High thermal stability (post-bonding thermal budget) 400C

Low curing temperature (low thermal stress)
250C

No outgassing upon curing (void formation)
OK

Resistant to all kinds of chemicals
HCl,H2SO4,H2O2,…
DVS-BCB satisfies these requirements
CH3
Si
CH3
CH3
O
Si
CH3
1,3-divinyl-1,1,3,3-tetramethyldisiloxane-bisbenzocyclobutene
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Bonding Technology
Overview of the bonding process

Die/wafer cleaning most critical step in processing

SOI wafer: standard clean – 1 (H2SO4:H2O2:H2O @70C)
 Lifts off particles from surface and prevents redeposition

InP/InGaAsP: removal of sacrificial InP/InGaAs layer pair
DVS-BCB
DVS-BCB
DVS-BCB
DVS-BCB
Si
SiO2
Si-substrate
Wafer
cleaning
DVS-BCB
Solvent evap +
Die
coating prepolymerization attachment
DVS-BCB curing
(pressurized)
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Bonding Technology
Overview of the bonding process
Optical SOI wafer
Thinning:
- mechanical grinding
- wet etching till etch stop
layer reached (HCl)
After bonding
thinning
Cross-section
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Bonding Technology
Cross-sectional image of III-V/Silicon substrate
InP/InGaAsP
epitaxial layer stack
InP-InGaAsP
epitaxial layer stack
DVS-BCB
SiO2
Si
Si
DVS-BCB
Si WG
SiO2
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
200nm
200nm
Towards integrated devices
Laser diodes and photodetectors have to be fabricated
in bonded III-V layer and coupled to SOI circuit below
InP/InGaAsP layer stack
Silicon waveguide layer
Oxide buffer layer
Silicon substrate

What architecture is used for the laser diode / photodetector?

How is light efficiently coupled between III-V and SOI layer?

Performance degradation of bonded active devices?
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Outline
• Introduction
• Die-to-wafer bonding for hetero-integration
• Heterogeneously integrated laser diodes

Fabry-Perot lasers

Microring lasers
• Heterogeneously integrated photodetectors
• Conclusions and outlook
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: laser diode
Integrated laser diodes

Fabry-Perot laser cavity by etching
InP/InGaAsP laser facets

Inverted adiabatic taper coupling approach
Laser beam
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Integrated Devices: laser diode
Integrated laser diodes

Fabry-Perot laser cavity by etching
InP/InGaAsP laser facets

Inverted adiabatic taper coupling
approach
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: laser diode
Integrated laser diodes

Only pulsed operation due to high thermal resistivity DVS-BCB

Integration of a heat sink to improve heat dissipation

Continuous wave operation achieved this way
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: laser diode
Integrated laser diodes

Microlasers
top contact
bottom
contact
InP
SiO2/BCB
SiO2
Si waveguide
Si substrate
Simulation results
1000
bend loss [/cm]
“Fundamental Whispering Gallery Modes”
Exponentieel
ts = 0nm
(h0)
Exponentieel
ts = 50nm
(h50)
Exponentieel
ts = 100nm
(h100)
100
10
1
0.1
TE-pol
0.01
0
Meep FDTD
2
4
6
8
microdisk diameter D [mm]
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10
CW Microdisk Laser integrated with SOI wire
top contact
active layer
bottom
contact
tunnel junction
Si waveguide
SiO2
Si substrate
7.5-mm devices exhibit continuous-wave lasing
Threshold current Ith = 0.6mA, voltage Vth = 1.5-1.7V,
up to 7mW CW, 100 mW pulsed (coupled into SOI wire)
J. Van Campenhout et al (Ghent University-IMEC, INL, CEA-LETI),
OFC 2007 and Optics Express, p.6744-6749 (2007)
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: laser diode
Integrated laser diodes

Microlasers (7.5um devices)
8
2.5
-30
I990u
-40
6
5
1.5
4
1
3
2
0
0.5
1
1.5
2
-50
-60
-70
0.5
-80
0
-90
1540
1
0
intensity [au, log]
2
voltage [V]
output power [mW]
7
1560
1580 1600 1620
wavelength [nm]
1640
current [mA]
Thresholdcan
current
Ith = 0.6mA,
voltagedrive
Vth = 1.5-1.7V
Thermal roll-over
be shifted
to higher
current levels
slope
efficiency = 15mW/mA,
up to 7mW
through the
incorporation
of an integrated
heat sink
(Pulsed
regime:
up to 100mW
peak
power)
as
for the
Fabry-Perot
laser
diodes
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
On-Chip Optical Interconnect
“Adding a compact and efficient optical link to a
silicon chip, by heterogeneous integration”
III-V material
microlaser
SOI waveguide
microdetector
SOI Optical
Interconnect
layer
Electrical
Interconnect
layer
Silicon transistor
layer
→ European research programme PICMOS
(Photonic Interconnect Layer on CMOS by Waferscale Integration,
FP6-2002-IST-1-002131)
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Outline
• Introduction
• DVS-BCB die-to-wafer bonding for hetero-integration
• Heterogeneously integrated laser diodes
• Heterogeneously integrated photodetectors

p-i-n

MSM
• Conclusions and outlook
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: detectors
Integrated photodetectors

Side-coupled p-i-n photodetector
 Identical structure as bonded Fabry-Perot laser diode
 Relatively good responsivity (0.23A/W)
 Large number of processing steps – compatible with laser
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: detectors
Integrated photodetectors

Vertical incidence p-i-n photodetector
 Coupling using a diffraction grating
 Low experimental responsivity (0.02A/W) but due to design
 Smaller number of processing steps – more compact design
DVS- BCB layer
Oxide buffer layer
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: detectors
Integrated photodetectors

Evanescently coupled MSM detector
 Small number of processing steps
 High experimental responsivity (1.0A/W)
 Compact devices
 Epitaxial layer structure not compatible with laser epitaxy
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: detectors
Integrated photodetectors

Evanescently coupled MSM detector
 Directional coupling between detector waveguide and SOI
waveguide (3μm)
SOI waveguide
contact
window
Ti/Au
contact
40μm
2 coplanar Schottky contacts
InAlGaAs Graded schottky contact layer
InGaAs absorption layer
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Integrated Devices: detectors
Integrated photodetectors

Evanescently coupled MSM detector
1.E-04
1.E-05
1.E-06
1.26uW
0.126uW
1.E-07
0.0128uW
1.E-08
dark
1.E-09
Normalized quantum efficiency (-).
I(A)
100
12.4uW
90
80
70
60
50
40
30
20
10
0
1480
1.E-10
0
2
4
6
8
10
12
1500
1520
1540
1560
1580
1600
1620
1640
1660
Wavelength (nm)
V(V)
25μm long detector
25μm long detector
R = 1A/W (1550nm), IQE = 80% (5V bias)
Wide spectral range (limited by bandgap
wavelength of InGaAs @ 1.65μm)
Idark = 3nA (5V bias)
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Outline
• Introduction
• DVS-BCB die-to-wafer bonding for hetero-integration
• Heterogeneously integrated laser diodes
• Heterogeneously integrated photodetectors
• Conclusions and outlook
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Conclusions and outlook
Heterogeneous III-V/Silicon PICs hold the promise
to combine best of both worlds, resulting in
complex active/passive integrated optical circuits.
Bonding technology is an enabling technology to
achieve this. Adhesive die-to-wafer bonding is a
robust technology compatible with modest surface
quality of III-V surfaces
Proof-of-principle components have been
demonstrated, illustrating the benefits of this
technology. The design and characterization of
more complex integrated circuits is on the way.
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be
Acknowledgements
• PICMOS consortium, in particular CEALETI, TRACIT and INL Lyon for codeveloping the InP/Si microlaser
• IMEC CMOS pilot line for fabricating the
SOI photonic circuits
• ePIXnet Silicon Photonics Platform
(IMEC+LETI) for organizing MPW runs on a
a cost-sharing basis
(www.siliconphotonics.eu)
© intec 2007 - Photonics Research Group - http://photonics.intec.ugent.be