Transmitter Architectures

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Transcript Transmitter Architectures

Class Representation For
Advanced VLSI Course
Instructor : Dr S.M.Fakhraie
Student : Mohammad Ali Sedaghat
Major Reference :
An Analog GFSK Modulator in 0.35-m CMOS
Hooman Darabi, Brima Ibrahim, and Ahmadreza Rofougaran
IEEE International Solid-State Circuits Conference 2004
Outline
 Introduction
 Analog modulation Concept
 Modulator circuit implementation
 Experimental results
Transmitter Architectures
VCO/PLL Modulation1
Lower power
Sensitive to KVCO variations
Compromises PLL noise &
settling time
Potential frequency drift
issues
Direct I-Q Up-Conversion2
Better performance
More robust
Up-conversion mixers needed
Conventional Modulator Implementation
existing direct-conversion transmitters use a digital modulator at baseband
consists of direct-digital frequency synthesizer (DDFS)
followed by a digital-to-analog converter (DAC)
 DAC is power consuming
 DDFS/DAC switching degrades VCO clock phase noise
 Direct analog implementation eliminates the DAC
FM Differential Equation
General FM Signal:
Instantaneous Frequency:
FM Differential Equation:
GFSK Implementation
 input data is first shaped (limit it’s spectral width) by a Gaussian filter in
the time domain and then applied to the FM modulator
 the modulator take the digital data at
input, and a Gaussian filter with a
bandwidth of half of the data rate will
produce the desired Gaussian
spectrum in the frequency domain
Analog Modulator Circuit Implementation
Active-RC integrators are employed due to their superior dynamic range
RC calibration circuit adjusts the integrator gain by tuning the capacitors
in the opamps’ feedback path
The opamps are two-stage differential amplifiers to drive the resistive load
multipliers, implemented as 4-FET switches
data edges are aligned with the 12-MHz system clock and a logic circuit
produces complementary clock signals to drive the 4-FET switches
analog Gaussian low-pass filter following the modulator
Amplitude Control Loop
To meet the spectrum mask
requirements, the modulator
output swing must be well
defined
 Amplifier gain is a function of the
difference between the modulator
output swing and a reference voltage
Zero once the loop reaches the steady
state
 amplifier A followed by CA result
in a CEQ=A*CA in parallel with the
first integrator resistor that then
creates a zero in the integrator
transfer function Resulting in a
phase shift in the integrator output
that Depends on the sign of A is
negative or positive, which in turn
causes the modulator amplitude to
grow or decay
Amplifier Circuit
The amplifier is a Gilbert-type
current-steering circuit
Assuming the input transistors
are square-law, in the vicinity of
lock, the amplifier gain is linearly
proportional to the difference
between VR and VP Then the slope
is a function of the amplifier
device sizes and the total output
resistance
Amplitude Control Loop Dynamics
 If VP-VR is small, the modulator amplitude is:
where VPO is the initial amplitude
Loop behavior modeled by an integrator with gain of ωI :
Critically damped settling requires:

Amplitude Modulation
 Baseband implementation results in random amplitude modulation
in I-Q outputs.
Thus, a conventional peak detector which finds the highest voltage
fails to determine the output swing properly
Nonetheless, Complex power, I 2  Q 2 , remains constant and is
equal to the peak amplitude
Power Detector Circuit
 the square-law property of
a long-channel MOSFET
is utilized to realize the
power detector
Transistors M1–M4 are identical
and are connected to the
differential I and Q signals
The sum of their currents consists of following two terms squared
1-constant dc term
2-variable component proportional to the input amplitude
The dc term is cancelled by the current source IB, and transistor M5
Modulator Die Photograph
0.35 µm CMOS process
Active area: 0.31 mm2
Summary of Performance
Conclusions
 Direct up-conversion is robust and low-power
 Analog implementation of modulator saves power
 FM differential equation realizes the GFSK modulator in the
analog domain
􀀹Amplitude control loop is essential for low distortion
􀀹Complex power detector is accurate and fast
Refrences:
[1] Hooman Darabi, Brima Ibrahim, and Ahmadreza Rofougaran “An Analog
GFSK Modulator in 0.35-m CMOS” 2004 IEEE International Solid-State
Circuits Conference
[2] Pilar Parra, Antonio Acosta, and Manuel Valencia “Reduction of Switching
Noise in Digital CMOS Circuits by Pin Swapping of Library Cells1”
Instituto de Microelectrónica de Sevilla-CNM / Universidad de Sevilla Avda.
Reina Mercedes s/n, 41012-Sevilla, SPAIN
[3] Alistair McEwan and Steve Collins “ANALOGUE INTERPOLATION BASED
DIRECT DIGITAL FREQUENCY SYNTHESIS” Department of Engineering
Science University of Oxford Parks Road Oxford UK