Transcript 7 IO Port 8051 - UniMAP Portal

Microcontroller Intel 8051
[I/O Ports]
Pin out of the 8051
– 40 pin package
– 32 pins are used for the 4 ports.
– VCC / VSS
– ALE
• Address Latch Enable
– EA / VPP
• External Address
• Program Voltage for EPROM
based versions of the 8051.
– XTAL1 and XTAL2
• Connections for clock crystal.
– PSEN
• “Program Store Enable”
– Read signal for external
program memory
– RST
• Reset
I/O Ports
• The 8051 has 4 bidirectional 8-bit I/O ports.
– Each port is connected to an 8-bit register in the SFR.
• P0 = 80H, P1 = 90H, P2 = A0H, P3 = B0H
– Each port is also connected to an output driver and an input
buffer.
– All ports are configured for output at reset.
• Some of the 4 ports have uses in addition to simple I/O.
– Ports P0 and P2 double as the 8051’s Address and Data
busses.
– Port P3 doubles as the 8051’s external control lines for the
timers and counters.
Port P0
• P0 can be used for input or output.
• The pins of P0 are connected internally to an “open
drain” circuit (similar to open collector but using MOS
transistors).
– Therefore, it must be connected to an external pull-up
resistor (10 KW) to operate properly as an output port.
• To operate P0 as an
input port, it must be
programmed by
writing 1’s to all of its
bits
Port 0 with Pull-Up Resistors
Dual Role of P0
• P0 is also designated as AD0 – AD7 which means that it also
doubles as the multiplexed lower 8 bits of the address bus and
the 8 bits of the data bus.
• P0 will be used in this manner when accessing external
memory.
• Program or data.
– ALE is used to differentiate when the pins are carrying an
address vs. data.
• ALE = 1 when the pins carry an address and 0
otherwise.
• ALE can be used to enable an external address latch
that will hold the address value after it has been
removed from the pins.
Programming P0
•
Using it as an output port:
BACK:
MOV
MOV
ACALL
CPL
SJMP
A, #55H
P0, A
DELAY
A
BACK
– This will continuously output
01010101 followed by
10101010 on P0 separated
by a certain delay.
– Port P0 is initialized as
output by default, so no
need to configure it.
•
Using it as an input port:
BACK:
MOV
MOV
MOV
MOV
SJMP
A, #0FFH
P0, A
A, P0
P1, A
BACK
– This will continuously read
from port P0 and write the
same value to port P1.
– Port P0 is initialized as output
by default, so it needs to be
configured for input by writing
1’s to all of its bits.
Port P1
• Can be used both for
input and output.
• Its pins are connected to
internal pull-up resistors
so no external pull-up is
needed.
– Therefore, if the external pin is left un-connected, the
matching bit will be read as a logic high.
• Configured for output by default.
– To configure it for input a 1 must be written into each
bit.
All Input or All Output?
• Do these ports operate only as 8-bit input
or 8-bit output ports?
• NO.
– The individual bits of each port can be
operated as either input or output.
• A pin is output by default. It can be made an input
by writing 1 in its corresponding bit in the SFR
register.
Dual Role of P1 Pins
• In the 8052, pins P1.0 and P1.1 serve a
second function.
– They are the external controls for timer T2.
– Since there is no T2 in 8051 and 8031, these
pins don’t have any special function in these
chips.
Port P2 and its Dual Role
• P2 is very similar
to P1 in its basic
operation and in
the fact that it
does not need
external pull-up.
• As it was shown for P0, P2 also serves as pins A8 – A15 (the upper
8 bits of he address bus) when accessing external memory.
– The upper 8 bits of the address will be kept on the P2 pins for the
duration of the memory cycle.
• No need for external latching.
Port P3
• P3 is similar to P1 and P2 in its basic
operation and in the fact that it does not
need external pull-up.
Functions of the P3 Pins
• All port P3 pins are multifunctional, they are not only I/O port pins
but they also serve special functions.
MSB
LSB
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
RD
WR
T1
T0
INT1
INT0
TXD
RCD
P3.7
Read Signal
P3.3
External
Interrupt
P3.6
Write Signal
P3.2
External
Interrupt
P3.5
Timer 1 external
input
P3.1
Serial Output
P3.4
Timer 0 external
input
P3.0
Serial Input
Read-Modify-Write Instructions
• All of the following instructions read the last value stored in the latch.
ANL
XRL
CPL
DEC
MOV PX.Y, C
SETB PX.Y
ORL
JBC
INC
DJNZ
CLR PX.Y
– All other instructions will read the value from the pin.
Driving Ability
• The pins of ports P1, P2, and P3 have a fan-out
of 4 LS TTL inputs only.
• The fan-out of the pins of port P0 depends on
the size of the external resistor used for the pullup.
– You should not expect a fan-out for P0 pins of
more than 8 inputs.
Accessing External Memory
• As it has been noted before, the 8051 does not have an address or
data bus. Instead, the pins of ports P0 and P2 are used for that
purpose.
– The pins of port P0 double as AD0 – AD7 (multiplexed).
– The pins of port P2 double as A8 – A15.
• During a memory access (read from/write to external data memory
or instruction fetch from external program memory):
– The pins of port P0 first carry the lower 8-bits of the address,
then switch operation to become the data bus.
– The ALE signal is set to 1 during the period when the address is
on the bus.
– The pins of port P2 carry the upper 8-bits of the address through
out the memory access cycle.
Accessing External Memory
• What about the values that were on the
ports previously?
– The values are stored in the latches in the
SFR and are restored after the memory
access operation.
– The one exception is P0 where the value
stored in the register is always over-written.
• This is due to the use of the P0 pins for the
bidirectional data bus.
Accessing External Memory
• Access to external program memory always requires a 16-bit
address.
– Therefore, ports P0 and P2 are always used during external
instruction fetch operations.
• Access to external data memory may use an 8-bit or 16-bit address
depending on the instruction.
• MOVX A, @DPTR
– Uses a 16-bit address.
• MOVX A, @R0
– Uses an 8-bit address.
– However, using a value placed on P2 before the second MOVX
instruction allows us to provide a 16-bit address if necessary.
The Read and Write Signals
• It has also been noted before that the
8051 has separate program and data
memory spaces.
– It therefore also has separate external
signals for accessing the two different
memories.
• The PSEN signal is used during read cycles from
program memory.
• The RD and WR signals are used during read
cycles from external data memory.
Example #7.1
Single-Bit Instructions
Example #7.2
Example #7.3
Example #7.4
Example #7.5
Example #7.6
Example #7.7
Example #7.8
Example #7.9
Example #7.10
Example #7.11
Example #7.12
Example #7.13
Example #7.14
Example #7.15
Carry-bit related Instruction
Swap Instruction
ASCII Code for 0-9
Example #7.16
Example #7.17