Transistors, Logic Gates and Karnaugh Maps

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Transcript Transistors, Logic Gates and Karnaugh Maps

Transistors, Logic Gates and
Karnaugh Maps
References:
http://www.st-and.ac.uk/~www_pa/Scots_Guide/info/comp/active/BiPolar/page1.html
Lecture 4 from last semester
Introduction to Digital Systems (J.Palmer and D. Perlman)
Transistors


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There are various kinds of transistors: bipolar,
field-effect, etc.
They differ in stability, energy usage, and so
on, but they serve a similar purpose
They are used to amplify a signal or to act as
a switch

It is as switches that they are used in computers
Diode Review


Recall that a pn junction — the joining
together of p-doped (“too few”
electrons) and n-doped (“extra”
electrons) — makes a diode
A diode is a circuit element that allows
current to flow in one direction (forward
bias) but not in the other (reverse bias)
Diode Review (Cont.)


Some of the “extra” electrons from the
n side fill the empty levels in the p side,
forming a region in which the valence
band is filled and conduction band is
empty
This region (called the depletion zone)
is a poor conductor
Bipolar transistors


A bipolar transistor starts with two
back-to-back diodes (pn junctions)
There are two kinds NPN and PNP

The middle region is usually smaller
N-doped
P-doped
P-doped
N-doped
N-doped
P-doped
Third lead


So far the device seems useless; two
back-to-back diodes wouldn’t conduct in
either direction
But we add a third lead (connection)
directly to the middle portion
Not symmetric

The transistor would seem to be
symmetric with the two N-doped
regions being the same, but actually
these regions differ in their amount of
doping and serve different purposes in
the transistor
Collector, base, emitter
Collector
Base
Emitter
Connecting the transistor

C
B
E
Imagine applying a
potential difference
(voltage) across the
base-collector leads
with the collector
higher, this reverse
biases that pn
junction so there
would be no current
flow
No flow


There is no flow because of the
depletion zone (the region in which the
valence band is filled and the
conduction band empty)
Reverse bias voltages tend to make the
depletion zone a bit larger
Connecting the transistor
(Cont.)

C
B
E
Now consider
applying a (smaller)
voltage across the
base-emitter leads
with the base higher,
this forward biases
that pn junction so
current will flow
Flow


Forward biasing a pn junction tends to
eliminate the depletion zone (in this case
putting electrons into the conduction band)
Because the transistor has one shared
depletion zone that has been eliminated by
the base-emitter forward bias, both currents
(collector-base and base-emitter) can flow
NPN in a circuit

C
B
E
The arrow on an
NPN points from
base to emitter
indicating the
forward-bias
direction that turns
the transistor “on”
Off
Off

Base-emitter circuit



Little to no current flowing
Most of the voltage dropped across the baseemitter as opposed to the resistor in the circuit
Collector-emitter circuit


Little to no current flowing
Most of the voltage dropped across the collectoremitter as opposed to the resistor in the circuit
On
On

Base-emitter circuit



Current flowing
Most of the voltage dropped across the resistor as
opposed to the base-emitter in the circuit
Collector-emitter circuit


Current flowing
Most of the voltage dropped across the resistor as
opposed to the collector-emitter in the circuit
Unusual feature


One feature that people find unusual when
learning about transistors is that when the
transistor is “on” the collector-emitter voltage
is less than the base-emitter voltage
This is because in the collector-emitter, one is
going from n-doped material to n-doped
material, whereas in the base-emitter, one is
going from p-doped to n-doped
Logic gates


As seen in lab, the on-off nature of
diodes and transistors make them ideal
for building logic gates
Logic gates have input which is
interpreted as a logic value (0 or 1, low
or high, false or true) and have output
which can also be interpreted logically
Logic gates
Logic
NOT
AND
OR
NAND
NOR
Circuit Symbol
A Truth Table
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
Out
0
0
1
1
0
0
1
1
Simplifying
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A´BC´ + A´BC + ABC´ + ABC
A´B (C´ + C) + AB (C´ + C)
A´B + AB
(A´ + A) B
B
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ABC means A and B and C
A + B means A or B
A’ means not A
Simplifying made easy
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Simplifying Boolean expressions is not
always easy
So we introduce next a method that is
supposed to make simplification more
visual
Gray code
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In addition to binary numbers, there is
another way of representing numbers
using 1’s and 0’s
It is not useful for doing arithmetic, but
has other purposes
In gray code the numbers are ordered
such that consecutive numbers differ by
one bit only
Gray code (Cont.)
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
Constructing Gray code
0
1
Reflect lower bits and 0’s then
1’s in front
Lower bits
0
0
1
1
0
1
1
0
Reflect
through
red line
Reflect lower bits and 0’s then
1’s in front (again)
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
Reflect
through
red line
An important property


In gray-code order, two consecutive
rows of a truth table differ by one bit
only
If two consecutive rows contain a 1,
then a simplification of the Boolean
expression is possible
A Truth Table Revisited
A
0
0
0
0
1
1
1
1
B
0
0
1
1
1
1
0
0
C
0
1
1
0
0
1
1
0
Out
0
0
1
1
1
1
0
0
Improving
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
Some combinations that differ only by a
single bit are not in consecutive rows
Thus we might miss such a
simplification
So we put some of the inputs in as
columns
A
0
0
0
0
1
1
1
1
B
0
0
1
1
1
1
0
0
C
0
1
1
0
0
1
1
0
Out
0
0
1
1
1
1
0
0
A row-column version
A
B\C
0
1
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
Karnaugh-map
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This way of arranging truth tables
combined with the rules for simplifying
Boolean expressions goes under the
name Karnaugh map
The rules
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One identifies blocks (as large as
possible) containing 1’s
The blocks must contain all 1’s
The number of 1’s should be a power of
2 (1, 2, 4, 8, …)
A given 1 can belong to more than 1
block
Wrapping
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Imagine that the rows wrap around, so
for instance, a block can include the top
and bottom rows (without intermediate
rows)
Similarly for columns
Example
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WXY’Z + W’XY’Z + WX’Y’Z’ + W’X’Y’Z’ +
WXYZ’ + WXY’Z’ + W’XY’Z’ + W’XYZ’
Example in Karnaugh
Z
W
0
0
1
1
0
X\Y 0
0
1
1
0
0
0
1
1
0
1
W’XY’Z’
W’XY’Z
1
1
WXY’Z’
WXY’Z
1
0
0
1
W’X’Y’Z’
0
1
1
1
1
0
WX’Y’Z’
W’XYZ’
0
1
WXYZ’
0
0
Result
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Y’Z’ + XY’ + X Z’
A block of size two eliminates one Boolean
variable; a block of four eliminates two
Boolean variables; and so on
For a block identify the elements in the block
that don’t change, AND them together, that’s
your expression for the block
Obtain an expression for each block and OR
them together