Serial Communication
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Transcript Serial Communication
Interfacing
Abstract digital values are fine but...
We have to deal with the realities of voltage and current
e. g.
Technology: CMOS vs. Bipolar
Voltage level: 5v vs. 3.3v vs. 2.5v
Current sink/source
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CMOS Inverter
“Ideal” device
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Voltage/Digital Abstraction
“Ideal” device: CMOS inverter
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CMOS Static Logic
Logic gate:
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Interfacing: Sourcing/Sinking Current
Output Low -> Input Low:
Output sinks current <- Input sources current
Output High -> Input High:
Output sources current -> Input sinks current
The good news: CMOS inputs require very small currents
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CMOS Interface Example
This is an “open-drain” output
No pullup path
But we only need to sink current
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Another Open-Drain Example
Question: What size should the pullup resistor be
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Data Book for CMOS
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Bipolar Logic: TTL
Bipolar transistor
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Transistor as a Switch
We can control Ic current by voltage on B
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TTL Logic
2-input NAND
Key is the totem pole output
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TTL Voltages
Squeezed towards the low end
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TTL/CMOS Transfer Characteristics
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TTL Databook
Bad news: inputs source/sink substantial current
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TTL/CMOS Interfacing
HCT/ACT directly compatible with TTL
HC/AC is not
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CMOS/TTL Interfacing
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CMOS/TTL Interfacing
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Driving Loads with High Current
We can sink some current
with logic gates
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Sinking More Current Takes Real Transistors
Example:
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Driving Inductive Loads
Switch turns off, dI/dt induces voltage across inductor
Va > Vb -> blows out the switch/transistor
Protect using a diode
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Shaft encoders
Need to determine the wheel velocity
Use sensor to detect wheel moving
Determine speed of a bicycle
attach baseball card so it pokes through spokes
we know number of spokes
count clicks per unit time to get velocity
Baseball card sensor is a shaft encoder
click!
bike wheel
baseball card
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Shaft encoders
Instead of spokes we’ll use black and white segments
Black segments absorb infrared light, white reflects
Count pulses instead of clicks
We could use a light source and transparent/opaque segments
wheel
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emitter
detector
pulse
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Analog to digital conversion
Use charge-redistribution technique
no sample and hold circuitry needed
even with perfect circuits quantization error occurs
Basic capacitors
sum parallel capacitance
C
C
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2C
3C
C
2C
4C
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A/D - sample
During the sample time the top plate of all caps switched to VL
Bottom plate set to unknown analog input VX
Largest cap. corresponds to MSB
Q = CV
QS = 16 (VX - VL) = 16VX
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A/D - hold
Hold state by logically controlled analog switches
Top plates disconnected from VL
Bottom plates switched from VX to VL
QH = 16 (VL - VI) = -16VI
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A/D - approximation
Conservation of charge QS = QH so VI = -VX
16 VX = -16 VI
Each cap. switched from VL to VH
Output of comparator determines bottom plate voltage of cap
1: remain connected to VH
0: return to VL
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A/D example - MSB
Suppose VX = 21/32 VH , VI = -VX = -21/32 VH
QS = 16VX = 16 * (21/32) VH = 21/2 VH
QH = 8 (VH - VI) + 8 (VL - VI) = 8VH - 16VI
QS = QH or 21/2 VH = 8 VH - 16VI
VI = -5/32VH
Comparator output
is logic one
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A/D example - (MSB-1)
QH = 12 (VH - Vi) - 4Vi
QS = QH or 21/2 VH = 12VH - 16Vi
Vi = 3/32 VH
Output of comparator is logic zero
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A/D example - (MSB - 2)
QH = 10 (VH - Vi) - 6Vi = 10VH - 16Vi
21/2 VH = 10VH - 16Vi
Vi = -1/32 VH
Output comparator
is logic one
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A/D example - LSB
QH = 11 (VH - Vi) - 5Vi = 11VH - 16Vi
21/2 VH = 11VH - 16Vi
Vi = 1/32
Output of comparator
is logic zero
Input sample of 21/32
gives result of 1010 or
10/16 = 20/32 or 3% error
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