Transcript Introduction to Object Technology

Computer System
Overview
Chapter 1
Operating System

Exploits the hardware resources of one or more
processors
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Provides a set of services to system users
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Manages secondary memory and I/O devices
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Provides support for networking/communications
Basic Elements
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Processor
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Main Memory (real memory/primary memory)
I/O modules
 secondary memory devices
 communications equipment
 terminals
System bus
 communication among processors, memory, and
I/O modules
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Top-Level Components
User-Visible Registers
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May be referenced by machine language
Available to all programs - application
programs and system programs
Types of registers
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Data
Address
 Index
 Segment pointer
 Stack pointer
Control and Status Registers
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Program Counter (PC)
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Instruction Register (IR)
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has the address of the instruction to be fetched
Contains the instruction most recently fetched
Program Status Word (PSW)
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condition codes / flags
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e.g. Interrupt enable/disable, supervisor/user mode
Can be accessed by a program but not altered
Instruction Cycle
The processor fetches the instruction from memory where the
Program Counter (PC) is pointing
 PC is incremented after each fetch
 Fetched instruction is placed in the instruction register
and then decoded for execution
 Types of instructions
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Processor-memory - transfer data between processor and memory
Processor-I/O - data transferred to or from a peripheral device
Data processing - arithmetic or logic operation on data
Control - alter sequence of execution (e.g. jump, branch etc.)
Interrupts
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An interruption of the normal sequence of execution
A suspension of a process caused by an event
external to that process and performed in such a way
that the process can be resumed
Improves processing efficiency
Allows the processor to execute other instructions
while an I/O operation is in progress
Interrupt Cycle
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At the end of each cycle, processor checks for interrupts
If no interrupts  fetch the next instruction
If an interrupt is pending, suspend execution of the current
program, and execute the interrupt handler
Classes of Interrupts
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Program interrupts
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arithmetic overflow
division by zero
execute illegal instruction
reference outside user’s memory space
Timer
I/O interrupt
Hardware failure
Interrupt Handler (ISR – interrupt Service Routine)
• Whenever there is an interrupt, control is transferred to this program.
It determines the nature of the interrupt and performs the necessary
actions to handle it.
Transfer of Control via Interrupts
Simple Interrupt Processing
Changes in Memory and Registers for an Interrupt
Multiple Interrupts
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Disable interrupts while an
interrupt is being processed
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Interrupts remain pending
until the processor enables
interrupts
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After interrupt handler
routine completes, the
processor checks for
additional interrupts
OR
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Lower-priority interrupt
handler can be interrupted
(nested)
I/O Techniques
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When the processor encounters an instruction
relating to I/O,
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it executes that instruction by issuing a command to the
appropriate I/O module.
Three techniques are possible for I/O operations:
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Programmed I/O
Interrupt-driven I/O
Direct memory access (DMA)
Direct Memory Access
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I/O exchanges occur directly with
memory without processor involvement
(1) Initiate Block Read
Processor
Reg
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Processor grants I/O module authority
to read from or write to memory
Cache
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Relieves the processor responsibility for
the exchange. Processor is free to do
other things
The processor is only involved at the
beginning and end of the transfer. An
interrupt is sent when the task is
complete
(3) Read Done,
interrupt!
Memory-I/O bus
(2) DMA
Transfer
Memory
I/O
controller
disk
Disk
disk
Disk
Multiprogramming
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Processor has more than one program to execute
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The sequence that the programs are executed
depends on their relative priority and whether they
are waiting for I/O
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After an interrupt handler completes, control may not
return to the program that was executing at the time
of the interrupt
Memory Hierarchy
Going Down
the Hierarchy
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Cost per bit decreases
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Capacity increases
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Access time increases
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Frequency of access by
the processor decreases
Cache Memory
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Processor speed is much faster than memory speed. Therefore,
Increase the speed of memory by adding a small fast memory
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Cache contains a portion of main memory
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Processor first checks cache. If not found in cache, the block of
memory containing the needed information is moved to the cache
Because of locality of reference, likely future memory references
are in that block
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Transfers are not visible to the OS (i.e. no OS involvement)
START
RA - read address
Receive address
RA from CPU
Is block
containing RA
in cache?
Access main
memory for block
containing RA
No
Yes
Allocate cache
slot for main
memory block
Fetch RA word
and deliver
to CPU
Load main
memory block
into cache slot
Deliver RA word
to CPU
DONE
Figure 1.18 Cache Read Operation
cache
size
number of
cache
levels
block size
Main
categories
are:
write
policy
mapping
function
replacement
algorithm
Mapping Function
∗
Determines which cache
location the block will occupy
when one block is read in,
another may have to be
replaced
Two constraints affect design:
the more flexible the mapping
function, the more complex is
the circuitry required to search
the cache
Cache Design
Cache size
 Block size
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Mapping function
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the unit of data exchanged
between cache and main memory
hit means the information was
found in the cache
determines which cache location
the block will occupy
Replacement algorithm
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determines which word in the
block to replace
Least-Recently-Used (LRU)
Initializing the Machine
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Power up  fetch-execute cycle begins
Initial (or hardware) process begins to run
Executes ROM diagnostic program
Then bootstrap loads the OS
OS initialization
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Setup & initialize all system data structures
Initialize all devices
Start daemons – including idle process
Branches to the scheduler
Bootstrapping
Bootstrap loader (“boot sector”)
1
BIOS loader
0x0000100
0x0001000
Fetch Unit
PC
0000100
IR
…
Decode Unit
Execute Unit
Primary Memory
Bootstrapping
Bootstrap loader (“boot sector”)
1
2
Fetch Unit
PC
0001000
IR
…
BIOS loader
0x0000100
0x0001000
Loader
0x0008000
Decode Unit
Execute Unit
Primary Memory
Bootstrapping
Bootstrap loader (“boot sector”)
1
2
Fetch Unit
0x0001000
3
PC
Loader
0008000
Decode Unit
OS
IR
Execute Unit
BIOS loader 0x0000100
…
0x0008000
0x000A000
Primary Memory
4. Initialize hardware
5. Create user environment
6. …
Windows 7 Startup
http://www.techsupportalert.com/content/windows-7-startup.htm
http://www.techsupportalert.com/content/windows-7-components-startup.htm
Hardware Process Starts
BIOS
Idle Process Kernel
ISRs
Process i Process j
Program
I/O
Process
running
Switch to
Another
program