Transcript Operating Systems I: Chapter 2

Chapter 2: Computer-System Structures
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The traditional/general computer-system architecture consists of one or
more CPUs and a number of device controllers connected via a
common bus that provides access to shared memory
The CPU(s) and device controllers execute concurrently competing for
memory cycles (access synchronized by the memory controller)
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Computer-System Operation
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I/O devices and the CPU can execute concurrently
Each device controller has a local buffer
– I/O is from the device to local buffer of controller
– OS provides mechanism for issuing commands to device
controllers
 Device driver - portion of OS which converts OS
requests into controller register loads/reads
 OS provides main memory “buffer” for I/O
– CPU issues commands by setting device control registers
– CPU moves data from/to main memory to/from local buffers
 w/o DMA, CPU must transfer each word (bus size)
 w/DMA, CPU is invoked once per transaction (block)
Device controller informs CPU that it requires attention by
causing an interrupt
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Common Functions of Interrupts
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When powered-up, a computer needs an initial program to run
– Bootstrap program - initializes the machine
– Loads the OS
The OS kernel starts the first process, after which it only
processes events.
– Hardware Interrupt - generally from I/O devices
– Trap (Exception) - software-generated interrupt caused
either by an error or a user request
– An operating system is event (or interrupt) driven
An interrupt is a request to transfers control of the CPU from the
current process to the OS via the interrupt service routine
Some devices do not support the interrupt structure and simply
set flags in one of their local registers to request service
– The OS must periodically poll such devices
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Interrupt Handling
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An interrupt is handled by:
– A hardware check against the interrupt mask to see if the
interrupt is enabled
– Incoming interrupts of lower priority are disabled to prevent
a lost interrupt
– Storing the current state of the process
 The operating system preserves the state of the CPU by
storing registers and the program counter
– Calling the interrupt handling routine which determines the
type of interrupt and determines the OS response
– Re-enable interrupts and restore normal operation
Separate segments of code determine what action should be
taken for each type of interrupt
– The OS response is dependent upon the interrupt vector,
which contains the addresses of all the service routines
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Interrupt Time Line For a Single Process Doing Output
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I/O Structure
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Synchronous I/O Operation
– After I/O request, OS returns control to user program only
upon I/O completion
– CPU is idle (wait loop) in OS until the next interrupt.
– The next interrupt will be from the specified device since at
most one I/O request is outstanding (No vectoring)
– Simple, but not efficient
 No overlapping of computation or additional I/O with I/O
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I/O Structure
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Asynchronous I/O Operation
– After I/O request, control returns without waiting for I/O to
complete
– Blocking I/O library function: includes a system call to to
allow the user to wait for I/O completion
 CPU idles or control is passed to another process
– Non-Blocking I/O: The user program continues
 Requires more complex user code to handle the
completion of the I/O event
– Pro: The OS may have multiple outstanding I/O requests
 One process may make several concurrent requests
 Multiple processes may make requests on multiprogrammed systems
– Con: The OS must maintain a device-status table to record
current and requested transactions for each I/O device
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Storage Structure
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Main memory – only large storage media that the CPU can
access directly
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Secondary storage – extension of main memory that provides
large nonvolatile storage capacity (requires I/O operation)
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Storage systems organized in hierarchy
– Speed, cost, volatility
Memory Hierarchy
– Speed Vs. Cost
– . . . registers, cache, main memory, disk, CD, tape . . .
Caching – copying information into faster storage system; main
memory can be viewed as a last cache for secondary storage
Cache management is generally handled below the OS level by
dedicated hardware
– requires an policy for replacement, coherency, etc.
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Moving-Head Disk Mechanism
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Magnetic disks – rigid metal or
glass platters covered with
magnetic recording material
– Disk surface is logically
divided into tracks, which
are subdivided into
sectors
– The disk controller
determines the logical
interaction between the
device and the computer
Transfer rate - drive to memory
(MB/s)
Access time - seek time (arm
movement) + rotational delay
(platter movement) (ms)
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Hardware Protection
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How do we keep erroneous/malicious processes from interfering
with other processes on a timesharing system?
Dual-Mode Operation
– Provide hardware support to differentiate between at least
two modes of operations
1. User mode – execution done on behalf of a user
2. Monitor mode (also supervisor mode or system mode) –
execution done on behalf of operating system
– When an interrupt or fault occurs hardware switches to
monitor mode
Interrupt/fault
monitor
user
set user mode
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Dual-Mode Operation
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Mode bit added to computer hardware to indicate the current mode:
monitor (0) or user (1)
The OS is called (via trap) to handle hardware-generated exceptions
(ex: seg. fault) in monitor mode
Privileged instructions can be issued only in monitor mode
– All I/O instructions are privileged instructions (I/O Protection)
 Must ensure that a user program could never gain control of
the computer in monitor mode (i.e., a user program that, as
part of its execution, stores a new address in the interrupt
vector)
– Load-timer is a privileged instruction (CPU Protection)
 Timer – interrupts computer after specified period to ensure
operating system maintains control
 When timer reaches the value 0, an interrupt occurs
 Timer commonly used to implement time sharing
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Memory Protection
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Problem: We must protect the OS and other user’s routines from
a deranged or malicious process without compromising the
speed of memory access
– Must provide memory protection at least for the interrupt
vector and the interrupt service routines
In order to have memory protection, add two registers that
determine the range of legal addresses a program may access:
– base register – holds the smallest legal physical memory
address.
– Limit register – contains the size of the range
Memory outside the defined range is protected.
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A Base And A limit Register Define A Logical Address Space
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Protection Hardware
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When executing in monitor mode, the operating system has
unrestricted access to both monitor and user’s memory.
The load instructions for the base and limit registers are
privileged instructions.
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General-System Architecture
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Time-sharing led directly to hardware modifications to allow the
OS to maintain control of the system
Problem: How do users programs access necessary privileged
instructions (such as I/O)?
– The user must ask the OS to perform the operation on the
user’s behalf
System call – the method used by a process to request action by
the operating system
– Usually takes the form of a trap to a specific location in the
interrupt vector
– Control passes through the interrupt vector to a service
routine in the OS, and the mode bit is set to monitor mode
– The monitor verifies that the parameters are correct and
legal, executes the request, and returns control to the
instruction following the system call
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Use of A System Call to Perform I/O
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System calls are complex
– Information must be passed via
registers or ordered in the stack
– Library functions exist which act as
wrappers for the trap
– These library functions are the
system functions provided in each
language’s system library
Example: Memory Management
– The OS only provides sbrk() which
increases or decreases the
address space of the process by
some number of bytes
– C provides the language specific
malloc() and free() routines to
manage the heap
– Consider java
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System Calls
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An application written to a standard set of supported system calls
(such as POSIX) is dependent upon the OS, not the machine!
User Interface
System Programs
Programmer Interface
Application Code
C function library
System Interface
System Calls
Kernel
Hardware Abstraction Layer
Hardware
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