Transcript Computer Architecture CST 250

Computer Architecture
CST 250
INTEL PENTIUM PROCESSOR
Prepared by:Omar Hirzallah
Contents
• Microprocessor
– Three basic characteristics
• INTEL
• CPU Architecture (Von Neuman)
• Comparison
• Cache, Memory Caching, L1, L2, L3
• Instruction Set (CISC & RISC)
• Comparison (CISC Vs. RISC)
MICROPROCESSOR: (A silicon chip that contains a CPU)
In the world of PCs, the terms microprocessor and CPU are used
interchangeably. At the heart of all personal computers and most
workstations there is a microprocessor. Microprocessors also control the logic
of almost all digital devices, from clock radios to fuel-injection systems for
automobiles.
Three basic characteristics to differentiate microprocessors:
Instruction Set:
The set of instructions that the microprocessor can execute.
Bandwidth:
The number of bits processed in a single instruction.
Clock Speed:
Given in megahertz (MHz), the clock speed determines how many
instructions per second the processor can execute.
In addition to bandwidth and clock speed, microprocessors are classified as
being either RISC (reduced instruction set computer) or CISC (complex
instruction set computer).
INTEL:
The world's largest manufacturer of computer chips. Although it has been
challenged in recent years by newcomers AMD and Cyrix, Intel still
dominates the market for PC microprocessors. Nearly all PCs are based on
Intel's x86 architecture.
Intel was founded in 1968 by Bob Noyce and Gordon Moore. Strategically, it
is closely allied with Microsoft because the Windows 3.x and 95 operating
systems are designed for x86 microprocessors. The popularity of Windows
creates a demand for Intel or Intel-compatible microprocessors. Many people
refer to this alliance as Wintel (short for Windows-Intel).
CPU Architecture (Von Neuman)
Data Bus
Processor
C.U.
A.L.U.
R
O
M
R
A
M
Address Bus
Control Bus
Input /
Output
COMPARISON CHART:
Below is a chart that compares and contrasts important features found on some of the more
popular processor chips in the market.
Processors
Transistors CPU Speed
L2 Cache
Bus Speed
Celeron
7,500,000
1.06 GHz - 2 GHz
256 KB, full speed
133 and 400 MHz
Pentium II
7,500,000
233 MHz - 450 MHz
512 KB, half speed
100 MHz
Pentium III
9,500,000
450 MHz - 1 GHz
256 KB, full speed
133 MHz
Pentium III Xeon
28,100,000
500 MHz - 1 GHz
256 KB - 2 MB, full speed
100 MHz
Pentium 4
55,000,000
1.4 GHz - 3.4 GHz
256 KB, full speed
800 MHz
K6-II
9,300,000
500 MHz - 550 MHz
N/A
100 MHz
K6-III
21,300,000
400 MHz - 450 MHz
256 KB, full speed
100 MHz
Athlon (K7)
22,000,000
850 MHz - 1.2 GHz
256 KB, full speed
200 and 266 MHz
Athlon XP
37,500,000
1.67 GHz
384 KB, full speed
266 MHz
PowerPC G3
6,500,000
233 MHz - 333 MHz
512 KB, 1 MB, half speed
100 MHz
PowerPC G4
10,500,000
400 MHz - 800 MHz
1 MB, half speed
100 MHz
Athlon 64
105,900,000
800 MHz
1 MB, half speed
1.6 GHz
G5
58,000,000
2.5GHz
512 KB
900MHz - 1.25G
CACHE
It is pronounced as cash, a special high-speed storage mechanism. It can be either a
reserved section of main memory or an independent high-speed storage device. Two
types of caching are commonly used in personal computers: memory caching and disk
caching.
MEMORY CACHING:
A memory cache, sometimes called a cache store or RAM Cache, is a portion
of memory made of high-speed static RAM (SRAM) instead of the slower and
cheaper dynamic RAM (DRAM) used for main memory. Memory caching is
effective because most program access the same data or instructions over
and over. By keeping as much of this information as possible in SRAM, the
computer avoids accessing the slower DRAM.
Some memory caches are built into the architecture of microprocessors. The
Intel 80486 microprocessor, for example, contains an 8K memory cache, and
the Pentium has a 16K cache. Such internal caches are often called Level 1
(L1) caches. Most modern PCs also come with external cache memory, called
Level 2 (L2) caches. These caches sit between the CPU and the DRAM. Like
L1 caches, L2 caches are composed of SRAM but they are much larger.
L1 CACHE:
It is short for Level 1 cache, a memory cache built into the microprocessor.
The L1 cache is also called the primary cache.
L2 CACHE:
Short for Level 2 cache, cache memory that is external to the
microprocessor. In general, L2 cache memory, also called the secondary
cache, resides on a separate chip from the microprocessor chip. Although,
more and more microprocessors are including L2 caches into their
architectures.
L3 CACHE:
As more and more processors begin to include L2 cache into their
architectures, Level 3 cache is now the name for the extra cache built into
motherboards between the microprocessor and the main memory. Quite
simply, what was once L2 cache on motherboards now becomes L3 cache
when used with microprocessors containing built-in L2 caches.
Instruction set
It is also called a command set, the basic set of commands, or instructions, that a
microprocessor understands. One of the principal characteristics that separates RISC from
CISC microprocessors is the size of the instruction set -- RISC microprocessors have
relatively small instruction sets whereas CISC processors have relatively large instruction
sets.
CISC
It is pronounced as sisk, and stands for complex instruction set computer. Most PCs, use a
CISC architecture, in which the CPU supports as many as two hundred instructions. The
primary goal of CISC architecture is to complete a task in as few lines of assembly as
possible. This is achieved by building processor hardware that is Capable of understanding
and executing a series of operations. An alternative architecture, used by many
workstations and also some personal computers, is RISC (Reduced Instruction Set
Computer), which supports fewer instructions.
RISC
It is pronounced as risk, and stands for reduced instruction set computer, a type of
microprocessor that recognizes a relatively limited number of instructions. Until the mid1980s, the tendency among computer manufacturers was to build increasingly complex
CPUs that had ever-larger sets of instructions. At that time, however, a number of
computer manufacturers decided to reverse this trend by building CPUs capable of
executing only a very limited set of instructions.
CISC
Emphasis on hardware
Includes multi-clock
complex instructions
only Memory-to-memory
"LOAD" and "STORE“
incorporated in instructions
instructions
 High cycles per second, small
code size
 Transistors used for storing
complex instructions




RISC
Emphasis on software
Single-clock
reduced instruction
Register to register:
"LOAD" and "STORE"
are independent
Low cycles per second,
large code sizes
Spends more transistors
on memory registers