Transcript Lattice Product Map

Lattice Semiconductor
The Mobile Consumer FPGA Leader
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Lattice Semiconductor Confidential
Engineered for Volume
Over 1 Billion
Shipped
Low Cost, Low Power
Programmable Devices
Sold in the last Ten Years
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Lattice Semiconductor Confidential
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DIFFERENT TECHLOLOGY
FOR DIFFERENT MARKETS
Lattice Focus
• Low Density
FPGA Markets
High-Mid Density
FPGA Markets
•
Targeted for Low Volume
•
High Power = 1+ Watt
•
High Cost
•
Large Size = 100mm2
Thousand Unit Markets
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One Order of
Magnitude
Differentiated
•
Lower Power = mWatt
•
Lower Cost
•
• Ultra-Low
Density FPGA
Markets
Lower Size =
25mm2
Million Unit Markets
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•
Ten Orders of
Magnitude
•
Differentiated
•
Lowest Power = uWatt
•
Ultra Lowest Cost
2
100
Million
Markets
•
Lowest
SizeUnit
= 6mm
Lattice Semiconductor Confidential
FPGA Value Proposition
$0 NRE
Classic Router Line Card
Fast Time to Market
Flexibility
Smartphone
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Perception vs. Reality
• The NEW FPGA Paradigm
FPGA Perception
New Reality
Big
• Lattice manufactures the world’s smallest FPGA
• Package size starting at 1.40 x 1.48 mm in 0.35mm pitch
High power
• Lattice has power optimized FPGA product families
• Standby Power as low as 21 µW
Expensive
• Lattice has FPGAs that are priced as low as $0.50 in
high volume
Complicated for
CM / ODM
• Lattice FPGAs have embedded non-volatile memory
• Capable of creating “ASSP” like solution
• Custom marking and Lattice factory programming option
available to meet your specification
High
Volume
• Lattice ships over 1M units / day for consumer products
• Lattice has Tier-1 supply chain partners for Foundry, Test
& Assembly
• Lattice has Quality & Reliability systems consistent with
top tier consumer OEMs
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Lattice Semiconductor Confidential
Lattice FPGAs
Meet Consumer Product Constraints
Price
Lattice FPGAs are Low Cost
High volume Price starting at ~$0.50
Power
Lattice FPGAs are Low Power
Standby Power as low as 21 µW
Space
Lattice FPGAs are Small Size
Starting at 1.40 x 1.48 mm
@ 0.35mm ball pitch
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Lattice Semiconductor Confidential
Today’s FPGA Applications for
Consumer Products
Products
Function
Application
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RFFE bridging for antenna tuning
SLIMbus to I2S
IR LED control
Barcode emulation LED control
Sensor Management
•
Low power “always on” sensor management
Peripherals
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Control logic (Headset control, etc.)
Authentication & Security
Cameras
Video Management
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CSI2/DSI to Parallel bridge
Image rotation, Overlay
Custom logic (ASIC companion)
Laptops /
Tablets
Smart Batteries/
Ink Cartridges
Panel Interface
•
TCON, Panel I/F Mux
Bridge Chips
Smartphones
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Timing Critical Offload
Sensor management
Authentication
•Low power “always on” sensor management
•Security and authentication
•MIPI BIF / Custom interface
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Lattice Semiconductor Confidential
Integrating more functions
• New Innovation, New Possibilities
• New creative ideas?
• Larger Density = Greater Integration
• Cost Sensitive?
• Lowest Cost Per K LUTs
• Limited PCB area?
• World’s Smallest FPGAs
• Power Budget?
• Extremely Low Active Power
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Lattice Semiconductor Confidential
Consumer Electronics
•
Market Dynamics drives innovation
Innovation
+
Integration
=
Differentiation
Lattice Enables
Leadership
• Always-on
functions
• Custom
bridging
• Timing Critical
functions
Cost
Market Share
• Optimized
custom solutions
• ZERO NRE
• ZERO
development
time
• Differentiation
through cutting
edge features
Lattice FPGAs Enables Industry Leading Innovation in
Wearable Products
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Lattice Semiconductor Confidential
Simple Complex
Display Display
Wearable product overview
• Functionality vs Size/Power
MachXO2ZE/
MachXO3
iCE40LP/LM/i
CE40-Ultra
Basic
Logic
LED
Functionality
Smallest / Lowest
Larger
Size / Power
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Lattice Semiconductor Confidential
Worlds Smallest FPGA for consumer
solutions
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Lattice Devices:
iCE40LP / iCE40LM / iCE40Ultra / MachXO2/MachXO3
16 WLCSP
25 WLCSP
1.40mm x 1.48mm x 0.45mm
0.35mm pitch
1.71mm x 1.71mm x 0.45mm
0.35mm pitch
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World’s Smallest FPGA Packaging
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Lattice Semiconductor Confidential
Teardowns
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CHIPWORKS
S5
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Note 3
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Lattice Semiconductor Confidential
Possible Application in smartphone
Sensor
Manager
Bar Code
Emulator
Infrared
Tx/Rx
Indication
LED
Space is
Valuable
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Lattice Semiconductor Confidential
Public Teardown
• Chipworks Galaxy S5 Teardown
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Chipworks
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Samsung Galaxy S4 mini-LTE(i9195)
Lattice Low
power FPGA
ICE40LP640CM36A
Part-Number: ICE40LP640CM36A
Function: IrDA
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Lattice Semiconductor Confidential
Samsung Galaxy S4 mini(i9192)
Part-Number: ICE40LP640-CM36A
Function: IrDA
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Lattice Semiconductor Confidential
Samsung Galaxy S4 Mega(i9205)
Part-Number: ICE40LP1K-CM36A
Function: IrDA + Bar Code
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Lattice Low
power FPGA:
ICE40LP1KCM36A
Lattice Semiconductor Confidential
Ultra-low density FPGA for Mobile
eReaders
PNDs
USB Modem
Laptop
Wearable Camera
DSCs
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Lattice Semiconductor Confidential
Google Video Glass
Part-Number: ICE40LP4KCM81
Function: Sensor Bridge
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Lattice Semiconductor Confidential
SENSOR CONTROL Custom Mobile
Device™ 3D Smart Phone
Lattice Product
Image
Sensor
A
Lattice Device
Mux & Control
Processing
Application
Processor
Image
Sensor
B
Lattice enabled Mux and control processing
between two image sensors on a 3D Smart Phone
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Lattice Semiconductor Confidential
Video Expansion CMD™ for
Personal Navigation Devices
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MIPI Battery Interface (BIF) Master
• MIPI Standard for Phone
Battery Communications
• FPGA Based BIF-master
solution
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Customizable host interface
Ultra-Low 40µA static power
Low Cost <1K LUTs
2.5 x 2.5 mm footprint
Proven interoperability with
multiple 3rd party slaves
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Lattice Semiconductor Confidential
Traditional TV/multimedia block diagram
HDMI
S-Video
RCA
YCbCr
RF
(HD)
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Custom
TV scalar
SOC
LVDS
RF
Tuner
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Lattice Semiconductor Confidential
Using an AP for additional multimedia
Extend the capability of an applications processor for multimedia
applications such as STB, Smart TV, video mux, scaler, etc.
Video i/f device
such as MSD6306
HDMI
DVI
RCA
YCbCr
Etc.
HDMI/DV
I/RCA.. to
LVDS or
LVDS
RGB
or RGB
MACH
XO3
CSI-2
Application
Processor
LVDS
4 data lanes supported in 49wlcsp 3mmx3mm
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Consumer Mobile
•
Example
BLOCK DIAGRAM
Sub-LVDS 4 Lane
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MIPI-CS2 4 Lane
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Consumer Mobile
•
Example
BLOCK DIAGRAM
ST
MCU
i8080
i8080
DSI [1:0]
Qualcomm
AP
DSI [1:0]
MIPI TX
COMMENTS
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Consumer project
•
Example
BLOCK DIAGRAM
COMMENTS
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FPGA Advantages
• Implement multiple
concurrent functions
• Near zero latency for
timing critical functions
• Supports multiple clock
domains
• Efficient interface to AP
across multiple
functions
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Color-sequential Display Controller
Lattice FPGA
AP
LVDS
OR
Parallel
Or
DSI
Interface
Buffer
Color
Sequential
Driver
Sequential
R,G,B
CS-LCOS
Display
Several application processors do not have the capability
to drive color sequential displays
Lattice FPGA implements
•Flexible interface to AP (Parallel / LVDS/DSI)
•Breaks down RGB display data and drive R,G,B display
data in sequence
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RGB LED AND/OR BARCODE SCANNER
Lattice FPGA
AP/
Micro
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SPI
I2C, etc
Interface
Color
Ramp &
Barcode
logic
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RGB
Driver
Lattice Semiconductor Confidential
Auto Time Calibration + IO Bridge
Lattice FPGA
GPS
Module
2.5V
GPS Module
Master
Precision
Time
Calculation
Host
Interface
1.5V
Precision
Time Calibration
MCU
Some MCUs do not support 2.5V IOs that is required to interface with
GPS modules
Precision time calibration data is required by some wearable devices to
automatically reset time when the user travels to a new time zone
Lattice FPGA Advantages
•Flexible interface to GPS modules
•Provides precise time calibration to the host based on GPS data
•Interfaces to the host at 1.5V
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Lattice Semiconductor Confidential
Always-on Engine + Display Bridge
Always-on FPGA
AP
LVDS /
Parallel
/ DSI
User Input
(Time Display)
Data
Buffer
Interface
D-Phy Driver
DSI
RGB, etc
320 x 320
LCD
Time
RTC
Several application processors do not have the capability to drive RGB
displays
Some wearable devices require an always-on chip to compute time
Lattice FPGA Advantages
•Flexible interface to AP (Parallel / LVDS/DSI)
•Low power always-on “Time” computation. Allows the AP to sleep
•Bridges between LVDS/Parallel display data and MIPI DSI display when AP
is driving the display
•When AP is in sleep mode – the FPGA drives the LCD and displays the
accurate time
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Lattice Semiconductor Confidential
Lattice Pedometer Solution
AP
Interrupt
Logic
Sensor
Configu
re
S
PI
M
as
te
r
SPI Slave
(Hard IP)
I2C
Master
(Hard IP)
I2C
LSM330 DLC
(Accelerometer)
Step
Detect
iCE40LM 4K
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Lattice Semiconductor Confidential
Pedometer
“Always-on” Low power pedometer
• 3-Axis Accelerometer based Pedometer algorithm
• Supports step count, distance & calorie expended
calculations
• Power optimized – uses only the accelerometer
• Accelerometer sampled at 50Hz
• Configurable interrupt to the AP
• Supports on demand AP polling
Features & Benefits
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Ultra Low power
AP Sleep mode support for power reduction
Interrupt Aggregation, Configurable interrupt to AP
Activity Detection : Idle, Walking, Jogging, Running
Data Buffering for Log/History recording
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Executive Summary
Lattice is leading disruptive change in the FPGA industry
•
Consumer market focused innovation
Consumer OEMs adopting FPGA value proposition
• $0 NRE, Fast TTM, Flexibility, Low Cost, Low Power, Small
Footprint
• Driven by need for rapid differentiation
Lattice supply chain meets Consumer market demands
• Shipping million units per day @ < 30 DPM
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Lattice Semiconductor Confidential
Thank you
黄晓鹏 [email protected]