Transcript OPA549 Negative Whiskerx - TI E2E Community

OPA549 and
Negative Whisker on Enable
Tim Green, MGTS
Precision Linear Analog Applications
July 27, 2015
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Customer Circuit
2
Customer Problem
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Customer Problem
When 9-pin(E/S) are made Low⇒High and OPA549 output is done in Disable⇒Enable,
the negative voltage whisker is output.
※Waveform is attached below
Please let me know about below.
・When OPA549 is Disable, is the internal circuit down which -15V is flowing here?
⇒When there is information of internal circuit, please give me.
・Is there a measure?
【Additional information】
・Supply voltage:±15V
・When -VS is changed to GND from -15V, it becomes good. （No whisker）
・Control of E/S is High/Low signal of MCU into buffer IC.
⇒The amplitude of whisker is depend on off/on timing.
（Max:0.6uS width/ -5V.）
・Even if a loop of OPAMP is cut off, it occurs.
・The customer request, the negative output is bad.
～Customer Information is below～
What is end Application
⇒Portable healthcare
What is subsystem part is used on?
⇒±15V current output AMP
Part input signals: amplitude
Part output load: dynamic
Power supply:LDO
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TINA Loop Stability Analysis
R12 1k
R11 1k
C4 3.3n
Loop Gain = VFB
C1 470p
R8 2k
VFB 3.500209V
Vdac 4.6
V4 15
+
Ref
-
R6 1k
C2 3.3n
+ +
+
Out1
RS 0
Vo_POA 10.172905V
Out2
E/S
U2 OPA549
NC
R4 4.7k
+
A
V1 5
A
AM1
-103.547682uA
+
Iout 341.146853mA
V_Rs 3.411469mV
U1 AD8429
IN+
R1 6.04
V3 15
Rload 30
R7 1k
ILim
Rs 10m
C5 1T
R9 3.6k
L1 1T
VG1
V5 3.5
C3 220p
R10 82k
RG+
V+
Vo_IA 3.293113V
OUT
Ref
RGIN-
V-
At 100uA
Vast = 1.4V at 25C
V2 5
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TINA Loop Stability Analysis
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Feedback Current
A
AM1
R11 1k
C1 470p
R9 3.6k
Vdac 4.6
V4 15
Ref
C2 3.3n
+ +
V3 15
+
RS 0
Vo_POA 10.172905V
Out2
E/S
U2 OPA549
V6 4
R4 4.7k
R6 1k
Out1
+
V1 5
A
Iout 341.146853mA
V_Rs 3.411469mV
U1 AD8429
IN+
R1 6.04
R7 1k
ILim
Rload 30
-
Rs 10m
R8 2k
V5 3.5
-103.547682uA
C3 220p
R10 82k
C4 3.3n
R12 1k
+
RG+
V+
Vo_IA 3.293113V
OUT
Ref
RG-
V-
IN-
V2 5
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Vo_IA Feedback Current (see speaker notes)
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OPA549 E/S Pin Comments
OPA549 E/S pin:
1) When E/S = 0V part is going into output high impedance. Internal bias circuitry
for the output stage is being disabled.
2) The design of the output stage of OPA549 is all NPN. This means that the
negative swing devices on the output are NPN transistors. The negative swing
Circuitry has an additional circuit with local feedback around it to make the NPN
Transistor look like a PNP transistor. Because of this local feedback I would
Suspect that coming out of shutdown you would be most likely to see a negative
glitch since there is an inner loop that must settle .
3) When using E/S pin there is no way to predict the “Whisker” or glitch when you
turn back on the bias circuitry for the output stage. Whatever you see on one part
may be different on another part made on a different day. Or may also be
different over temperature changes.
4) E/S pin of OPA549 is not designed or guaranteed to be glitch free coming out of
or going into shutdown.
5) If you need glitch free turn-on turn-off with E/S pin on OPA549 consider an external
switch to short out load until E/S is totally into the on mode.
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Recommended supply changes for Vo_IA
headroom and “minimal” glitch on OPA549
output
A
+
AM1
R11 1k
C3 220p
R10 82k
C4 3.3n
R12 1k
C1 470p
R8 2k
R9 3.6k
Vdac 4.6
V4 5
Ref
V3 15
+
Vo_POA
Out2
E/S
U2 OPA549
V6 4
R4 4.7k
V5 3.5
C2 3.3n
+ +
RS 0
+
V1 15
A
Iout
V_Rs
U1 AD8429
IN+
R1 6.04
R6 1k
Out1
Rload 30
R7 1k
ILim
Rs 10m
-
RG+
V+
Vo_IA
OUT
Ref
RG-
V-
IN-
V2 5
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Op Amp Stability Reference
For detailed, definition-by-example of 10 different ways to stabilize
op amps driving capacitive loads, and additional technical information
on solving op amp stability problems, visit the Texas Instruments
E2E Forum at:
http://e2e.ti.com/support/amplifiers/precision_amplifiers/w/design_notes/
2645.solving-op-amp-stability-issues.aspx
Download Part 1, Part 2, Part 3, and Part 4.
All Embedded Schematics in this presentation can be run in
the Free TINA_TI SPICE simulator available at:
http://www.ti.com/tool/tina-ti
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