Transcript Unit 3

ARM CASE-STUDY: THE
RASPBERRY PI
Razvan Bogdan
Microprocessor Systems
Content
Raspberry Pi Board Configurations
 Architecture Overview
 Interfacing the Pi
 1-wire interface
 Serial Interface
 USB Interface

Introduction


Created by Eben Upton, Rob Mullins, Jack Lang and Alan Mycroft at
University of Cambridge
They, in conjunction with Pete Lomas and David Braben, formed the
Raspberry Pi Foundation

Was created to provide inexpensive programming machines

Raspberry Pi is a small, cheap ARM-based PC for education

Runs Debian GNU/Linux from an SD card



Now the Raspberry Pi is being considered as a popular platform for
embedded systems
The Raspberry Pi is an open hardware platform, which means the schematics
for the board is publicly published
The Raspberry Pi comes in different models and configurations
Introduction. Raspberry Pi Roadmap

February 2016 – Raspberry Pi 3
Raspberry Pi Board Configurations
Raspberry Pi 1

Initially it was decided to have two main models,





Model B was first released in Feb 2012, while Model A was first released in
Feb 2013
Model A did not get much attention
The Model B went through two revisions, with minor changes





Model A: A low cost model (around $25) with less capabilities
Model B: A higher cost model (around $35)
Model B rev 1
Model B rev 2 (Released in Sept 2012)
Aiming for using the Raspberry Pi in commercial and industrial products, the
Raspberry Pi Compute module was announced in April 2014, this is a new
form factor (200 Pin SO-DIMM Form factor), and much more signals
available for developer than the other form
In July 2014, a new model (Model B+) was released, with few upgrades in
the power supply, USB ports, GPIOs and other changes
In Nov. 2014, a new model (Model A+) was released with several upgrades
from the original Model A
Raspberry Pi Board Configurations
Raspberry Pi 1
Raspberry Pi Board Configurations
Raspberry Pi 1
Raspberry Pi Board Configurations
Raspberry Pi 1

SoC: Broadcom BCM2835 media processor system-on-chip featuring:




CPU core: ARM1176JZF-S ARM11 core clocked at 700MHz. The ARM11 core
implements the ARMv6 Architecture.
GPU core: a Broadcom VideoCore IV GPU providing OpenGL ES 1.1, OpenGL ES
2.0, hardware-accelerated OpenVG 1.1, Open EGL, OpenMAX and 1080p30
H.264 high-profile decode.
DSP core
256MiB of (Hynix MobileDDR2 or Samsung Mobile DRAM) SDRAM (or 512MB
Mobile DRAM on later boards). The RAM is physically stacked on top of the
Broadcom media processor (package-on-package technology).
Raspberry Pi Board Configurations
Raspberry Pi 1

LAN9512 (Model B) providing:
 10/100Mb Ethernet (Auto-MDIX),
2x USB 2.0
S1: Micro USB power jack (5v - Power Only)
S2: DSI (Display Serial Interface) interface. 15-pin surface mounted flat flex connector,
providing two data lanes, one clock lane, 3.3V and GND.
S3: HDMI connector providing type A HDMI 1.3a out; S4: Composite Video connector:
RCA; S5: MIPI CSI (Camera Serial Interface)-2 interface. 15-pin surface mounted flat flex
connector.
S6: Audio connector: 3.5mm stereo jack (output only); S8: SD/MMC/SDIO memory card
slot (underside); S7: Either 1x USB 2.0 (Model A) 2x USB 2.0 (Model B)





Raspberry Pi Board Configurations
Raspberry Pi 1



P1: 26-pin (2x13) 2.54 mm header expansion, providing
 8 GPIOs (General-purpose input/output) at 3v3
 2-pin UART serial console, 3v3 TTL (debug); or 2 GPIOs at 3v3
 I²C interface (3v3); or 2 GPIOs at 3v3
 SPI interface (3v3); or 5 GPIOs at 3v3
 3v3, 5v and GND supply pins
 ARM JTAG (Joint Test Action Group)
 I²S (Integrated Interchip Sound) interface
TP1 and TP2: Test Points giving access to +5V and GND respectively
5 Status LEDs:





D5(Green) - SDCard Access (via GPIO16) - labelled as "OK" on Rev1.0 boards and "ACT" on
Rev2.0 boards
D6(Red) - 3.3 V Power - labelled as "PWR" on both Rev1.0 and Rev2.0 boards
D7(Green) - Full Duplex (LAN) (Model B) - labelled as "FDX" on both Rev1.0 and Rev2.0
boards
D8(Green) - Link/Activity (LAN) (Model B) - labelled as "LNK" on both Rev1.0 and Rev2.0
boards
D9(Yellow) - 10/100Mbit (LAN) (Model B) - labelled (incorrectly) as "10M" on Rev1.0 boards
and "100" on Rev2.0 boards
Raspberry Pi Board Configurations
Raspberry Pi 1
Raspberry Pi Board Configurations
Raspberry Pi 2


Uses a different Broadcom chip (BCM2836)
A big upgrade from the older platforms



The new ARM Core supports the ARMv7 Instruction set



Quad core ARM Cortex A7 (900 MHz)
1 GB SDRAM
This enables it to run Ubuntu and Windows 10 OSs
Fully backward compatible with the older models
Like the (Pi 1) Model B+, it also has:









4 USB ports
40 GPIO pins
Full HDMI port
Ethernet port
Combined 3.5mm audio jack and composite video
Camera interface (CSI)
Display interface (DSI)
Micro SD card slot
VideoCore IV 3D graphics core
Raspberry Pi Board Configurations
Raspberry Pi 2
Raspberry Pi Board Configurations
Raspberry Pi 3









SoC: Broadcom BCM2837
CPU: 4× ARM Cortex-A53, 1.2GHz
GPU: Broadcom VideoCore IV
RAM: 1GB LPDDR2 (900 MHz)
Networking: 10/100 Ethernet, 2.4GHz 802.11n wireless
Bluetooth: Bluetooth 4.1 Classic, Bluetooth Low Energy
Storage: microSD
GPIO: 40-pin header, populated
Ports: HDMI, 3.5mm analogue audio-video jack, 4× USB 2.0, Ethernet,
Camera Serial Interface (CSI), Display Serial Interface (DSI)
Raspberry Pi Board Configurations
Raspberry Pi 3
Raspberry Pi Board Configurations
Raspberry Pi 3
http://hackaday.com/2016/02/28/introducing-the-raspberry-pi-3/
Raspberry Pi Board Configurations
Raspberry Pi 3
the biggest
gains go to
multi‐threaded
programs
Raspberry Pi Board Configurations
Raspberry Pi 3
The Raspberry Pi’s GPIO
pins are most commonly
used with Python, but this
leads to a CPU bottleneck.
In this test, a simple
RPi.GPIO program
toggles a pin as rapidly as
possible while a frequency
counter measures how
quickly it actually
switches.
Raspberry Pi Board Configurations
Raspberry Pi 3
The classic twitch shooter
from industry pioneer id
Software, Quake III Arena
is heavily tied to the CPU
performance of the Pi. The
standard ‘timedemo’ was
run at 1280×1024, high
geometric, maximum
texture detail, 32-bit
texture quality, and
trilinear filtering to obtain
these results.
Raspberry Pi Board Configurations
Raspberry Pi 3
You can’t get extra
performance without a few
sacrifices. The Pi 3 draws
the most power of the test
group, but its extra
performance means it
spends more time at idle.
Those looking for
maximum battery life
should look at the Model
A+ or the Pi Zero as an
alternative.
Source:
https://www.raspberrypi.org/magpi/raspberrypi-3-specs-benchmarks/
Architecture Overview. System on Chip (SoC)

System on a chip or system on chip (SoC or SOC)



an integrated circuit (IC) that integrates all components of a computer or
other electronic system into a single chip.
It may contain digital, analog, mixed-signal, and often radio-frequency
functions—all on a single chip substrate.
SoCs are very common in the mobile electronics market because of their low
power consumption
System on Chip (SoC)

A typical SoC consists of:
 a microcontroller, microprocessor or digital signal processor (DSP) core –
multiprocessor SoCs (MPSoC) having more than one processor core
 memory blocks including a selection of ROM, RAM, EEPROM and flash
memory
 timing sources including oscillators and phase-locked loops
 peripherals including counter-timers, real-time timers and power-on reset
generators
 external interfaces, including industry standards such as USB, FireWire,
Ethernet, USART, SPI
 analog interfaces including ADCs and DACs
 voltage regulators and power management circuits

ARM Advanced Microcontroller Bus Architecture (AMBA) Interface (an open-standard,
on-chip interconnect specification for the connection and management of functional
blocks in system-on-a-chip (SoC) designs)
System on Chip (SoC)

Benefits of SoC




Reduce overall system
cost
Increase performance
Lower power consumption
Reduce size
System on Chip
(SoC)
System on Chip (SoC). BCM2835


The Raspberry Pi 1 main chip is the
Broadcom BCM2835 System on a
Chip (SoC); it contains a single ARM
core CPU (ARM11, ARM1176) running
at 700 MHz
The ARM1136JF-S processor
 incorporates an integer unit that
implements the ARM architecture
v6.
 It supports the ARM and Thumb
instruction sets,
 Jazelle technology to enable direct
execution of Java bytecodes, and
a range of SIMD DSP instructions
that
 operate on 16-bit or 8-bit data
values in 32-bit registers.
System on Chip (SoC). BCM2835

BCM2835 SoC (right) and Samsung K4P2G324ED Mobile DRAM (left)
BCM2835. ARM1176 CPU overview

Core

Load Store Unit

Prefetch Unit

Memory System

Level One Mem.

System

Interrupt Handling

System Control

AMBA Interface

Coprocessor

Interface

Debug

Instruction cycle

summary and interlocks

Vector Floating-Point
BCM2835. GPU overview






Broadcom Videocore IV
Uses OpenGL ES2.0
Performance: 24 GFLOPS
RPi can play 1080p Blu-Ray quality
videos
Graphical capabilities are similar to
the those of the original XBOX
Applications:





Robotics
Game emulation
Media Servers
Education (Python is the primary
language used)
Powerful enough to be used as a
personal computer
System on Chip (SoC). BCM2836


The Raspberry Pi 2 main chip is the Broadcom BCM2836 System on a Chip (SoC); it is
running at 900Mhz, based on the quad-core ARM Cortex-A7
The ARM Cortex-A7 processor
 is a 32-bit processor core
 implementing the ARMv7-A architecture.
System on Chip (SoC). BCM2837


The Raspberry Pi 3 main chip is the
Broadcom BCM2837 System on a
Chip (SoC); it is running at 1.2Ghz,
based on the quad-core ARM CortexA53
The ARM Cortex-A53 processor
 supporting 32-bit and 64-bit code
 Implementing ARMv8-A
architecture
 8-stage in-order pipeline
System on Chip (SoC). BCM2837



The Raspberry Pi 3 -> BCM2837 System on a Chip (SoC)
The Advanced SIMD extension (aka NEON or "MPE" Media Processing Engine) is a
combined 64- and 128-bit SIMD (Single Instruction Multiple Data) instruction set
that provides standardized acceleration for media and signal processing
applications.
NEON can execute MP3 audio decoding on CPUs running at 10 MHz and can run
the GSM adaptive multi-rate (AMR) speech codec at no more than 13 MHz
Interfacing the Pi

The Raspberry Pi can be interfaced to external devices and
peripherals via:
 Existing Connectors


Ethernet, USB, A/V, HDMI, Power, SDIO
Signal Header Connectors

GPIO Header (26 pin in B, 40 Pin in B+)



Pins can be configured to be input/output
Reading from various environmental sensors
 Ex: IR, video, temperature, 3-axis orientation, acceleration
Writing output to dc motors, LEDs for status.
CSI (For Camera Interface)
 DSI (For Display Interface)


Unconnected Signal Headers


These headers need some soldering to use it
Mainly the chip RESET signal
Interfacing the Pi. GPIO Header in Model B
Interfacing the Pi. GPIO Header in Model B+
Interfacing the Pi. B Versus B+ Models
Interfacing the Pi. GPIO Header




The GPIO header is the main method for hardware interfacing
In Model B, it contains 26 pins, and in Model B+ it was upgraded
to 40 Pin
The GPIO header in Model B+ is backward compatible with the
older model, this means that pins 1-26 in model B+ are identical to
those in model B
This way, any hardware designed to interface with the Model B can
interface with model B+ with no need for any change
GPIO Header Signals. Power/GND





The Raspberry Pi requires a 5V power line
This is normally provided using the Micro-USB Connector
You can also power the Raspberry Pi through the GPIO Header
This is used when the Pi is powered from another board that is
connected to it
You can also use the power signal in the GPIO header to power
other boards (as long as they are a light load)
GPIO Header Signals. Power/GND



The Pi can be used to feed power to other boards connected to it
The maximum current you can take from the 5V rail is based on the
used power supply
The board takes around 700 mA from the 5V power supply, any
extra current the power supply can provide can be used to
external circuits
5V vs. 3.3 V





Note that although that the Pi is powered using 5V, all of its signaling is done
using 3.3V
This is a VERY IMPORTANT thing to watch for, NEVER connect the Pi directly
to any circuits using 5V signaling
Note that Arduino uses 5V signaling, so all Arduino circuits can not be
connected to the Pi
The Pi does not have an over voltage protection for its pins, hence you can
easily destroy the board by connecting it to 5V circuits
If you need to use chips that run with 5V logic such as those running with
Arduino boards,



If the chip only takes output from the Pi, sometimes, the 3.3V of the Pi is good
enough for the external chip to detect logic 1
If the 3.3V of the Pi is not enough to drive the chip, then you need a 3.3V to
5V Level Shifter
If the chip provides input to the Pi, then you will always need to use a 5V to
3.3V Level Shifter. Not doing that will damage your Pi Board
GPIO Header Signals. 3.3V Line


These pins can be used to provide power to 3.3V circuits (If not going to
overload the Pi)
This is NOT an input signal, the Pi only takes 5V line, this is an output line
GPIO Header Signals. Ground Line

These pins represent common signals between the Pi and external circuits
connected to it
GPIO Header Signals. GPIO Signals





26 Pin for GPIO (General Purpose Input Output)
These pins can be programmed to be either input or output signals
These signals use 3.3V logic
Some of the GPIO pins have a dual role (either GPIOs or part of another interface)
The default for these pins is to be a GPIO, to switch to the other role, you need to
load the driver for the needed interface
GPIO Header Signals. ID EEPROM Signals



These two pins are introduced in model B+ to enable a new concept called
Raspberry Pi HATs
A Pi HAT (Hardware Attached on Top), is a daughter board that can be connected
on top of the Pi
The Pi uses those two pins to read an ID EEPROM that describes the attached
hardware and the required configuration of the GPIO pins
GPIO Header Signals. ID EEPROM Signals
Interfacing to the GPIO Header





You can connect wires directly to the Pi Header
However, it is safer to use a breakout connector (also called Cobbler)
Before you do any hardware connection, make sure that the cable is connected in
the right direction (test that the signals on the breadboard maps correctly to the pins
on the Pi)
Also make sure that no connection or disconnection is done while the Pi is powered
on (power on the Pi after all connections are made, and power it off before any
modification in the connections)
Review your connections thoroughly before power up of the board. Any mistake can
destroy the board
How to Damage a Pi

The following actions may destroy the Pi,







Touching the chips of the Pi (Statics in your body may damage the chips)
Connecting the Pi to the wrong Power supply (It is not protected against over
voltage)
Making new connections in the circuit while the Pi is connected and powered up
(transient currents may result in damage to the board)
Disconnecting a USB while the Pi is powered
Connecting the Pi GPIO to 5V signal (the Pi uses 3.3V signaling )
Connecting the output of a device to a Pi GPIO while it is configured as output
Connecting an output GPIO directly to GND or Vcc
Raspberry Pi. The 1-wire Interface


The 1-Wire protocol was developed by Dallas Semiconductor Corp. initially for
the iButton
The 1-Wire protocol actually uses two wires:




Data: The single wire used for data communication
Ground: The ground or “return” wire
The 1-Wire protocol was designed for communication with low–data content
devices like temperature sensors
It provides for low-cost remote sensing by supplying power over the same wire
used for data communications



Each sensor can accept power from the data line while the data line is in the high state
When the data line is active (going low), the sensor chips continue to run off of their
internal capacitors (in parasitic mode)
The device also provides an optional VDD pin, allowing power to be supplied to it
directly. This is sometimes used when parasitic mode doesn’t work well enough. This, of
course, requires an added wire, which adds to the cost of the circuit.
The 1-wire Interface. Line Driving


The data line is driven by open collector transistors in the master and slave devices.
The line is held high by a pull-up resistor when the driver transistors are all in the Off
state.
To initiate a signal, one transistor turns on and thus pulls the line down to ground
potential.
The 1-wire Interface. Line Driving



Some voltage V (typically, +5 V) is
applied to the 1-Wire bus through
the pull-up resistor Rpullup.
When the transistor M2 is in the Off
state, the voltage on the bus remains
high because of the pull-up resistor.
However, when the master device activates transistor M2, current is caused to flow
from the bus to the ground, acting like a signal short-circuit. Slave devices attached
to the bus will see a voltage near zero.
The 1-wire Interface. Master and Slave



The master device is always in control of the 1-Wire bus. Slaves speak only to
the master, and only when requested.
There is never slave-to-slave device communication.
If the master finds that communication becomes difficult for some reason, it may
force a bus reset. This corrects for an errant slave device that might be jabbering
on the line.
The 1-wire Interface. Data I/O protocol (1 of 2)





Whether writing a 0 or 1 bit, the
sending device brings the bus line low.
This announces the start of a data bit.
When a 0 is being transmitted, the line is
held low for approximately 60 microsec.
Then the bus is released and allowed to
return high.
When a 1 bit is being transmitted, the line is held low for only about 6 microsec
before releasing the bus.
Another data bit is not begun until 70 microsec after the start of the previous bit.
This leaves a guard time of 10 microsec between bits. The receiver then has ample
time to process the bit and gains some signal noise immunity
The 1-wire Interface. Data I/O protocol (2 of 2)


The receiver notices a data bit is
coming when the line drops low.
It then starts a timer and samples the
bus at approximately 15 microsec.






If the bus is still in the low state, a 0
data bit is registered.
Otherwise, the data bit is interpreted
as a 1.
Having registered a data bit, the receiver then waits further until the line returns
high (in the case of a 0 bit).
The receiver remains idle until it notices the line going low again, announcing the
start of the next bit.
The sender can be either the master or the slave, but the master always has control.
Slaves do not write data to the bus unless the master has specifically requested it.
The 1-wire Interface. Slave Devices





Dallas DS18B20 slave device; this temperature sensor is typical of many 1-wire
slave devices
Slave devices are identified by a pair of digits
representing the product family, followed by a hyphen
and serial number in hexadecimal.
The ID 28-00000478d75e is an example. You might also
want to try different devices, like the similar DS18S20.
The Raspberry Pi does not have any ADC (analogue to
digital converter) pins in its GPIO, and so a digital
temperature sensor should be used.
DS18B20: relatively cheap, very easy to find, easy to
use, and supply readings accurate to +/-0.5 degrees
across the range -10 to +85 degrees Celsius.
The 1-wire Interface. Slave Devices


In order to interface this with the Raspberry Pi we just need one resistor - a 4k7
which acts as a pull-up resistor
Raspbian Linux has its driver support for the 1-Wire bus on GPIO 4 (P1-07).
The 1-wire Interface. Slave Devices

Reading temperature readings from multiple sensors down one wire is possible
because each DS18b20 sensor has a unique serial number coded into it at
manufacture which the Raspberry Pi can be used to identify them by.
Serial interface



The serial interface consists of all the basic circuits and programs that
provide communication between the central unit and a peripheral
equipment, which is of bit by bit type .
Serial transfer is very useful when there are large distances (more than 3 m)
between communicating devices.
There are two reasons that support this recommendation: cost and the
resistance to interferences:


Cost is determined by the number of wires in the cable that connects the 2
devices: if this number is low, the cost will be lower;
Serial transfer has a greater resistance to interferences than parallel transfer for
two reasons :


the possibility of disrupting lines decreases if the number is lower and
the distance between two voltage levels corresponding to logic levels is higher than the
parallel transfer.
Serial interface



Often used in data communication between a DTE and a DCE with or without
a modem.
DTE stands for data terminal equipment and can be either a computer or a
terminal.
DCE stands for data communication equipment. A modem is a DCE.
Communication link
DTE
DCE
DCE
DTE
Computer
or terminal
Modem
Modem
Computer
or terminal
Figure 9.0 A data communication system
Serial interface

There are many types of serial interfaces:

Wireless: Bluetooth, WiFi, ZigBee etc.

Wired: RS232, RS485, I2C, CAN, USB, FlexRay etc.

Varies by:





Information transmission medium,
Method of allocating logic levels voltage,
Parameters: baud rate, resistance to interference, error correction coding method,
using or not the clock, the number of modules that can be connected, the ranking
modules etc.
ON PC: RS232 and USB.
The oldest and most widespread: RS232; is used for remote data
transmission;

In the industrial environment: RS485;

In the areas of audio, video: I2C;

In the automotive industry, CAN, FlexRay etc.
Serial interface
(a) Point-to-point
Station
(b) Multi-drop
Master
Station
Slave 1
Slave 2
......
Slave n
Figure 9P.2 Point-to-point and multi-drop communication links
The RS232 Standard







Was the most widely used physical level interface for data communication
Specifies 25 interchange circuits for DTE/DCE use
Established in 1960 by Electronics Industry Association (EIA)
Revised to RS232C in 1969
Revised to RS232D in 1987
Revised to RS232E in 1992 and renamed as EIA-232-E
Revised and renamed to TIA-232F in 1997
Serial interface
The EIA-232E Electrical Specifications









The interface is rated at a signal rate of < 20 kbps
The signal can transfer correctly within 15 meters
The maximum driver output voltage (with circuit open) is -25 V to +25 V
The minimum driver output voltage (loaded output) is -25 V to -5 V and +5 V to +25 V
The minimum driver output resistance when power is off is 300 W
The receiver input voltage range is -25 V to +25 V
The receiver output is high when input is open circuit
A voltage more negative than -3 V at the receiver input is interpreted as a logic 1
A voltage more positive than +3 V at the receiver input is interpreted as a logic 0
Serial interface
Signal
Direction
The EIA-232E Electrical
Specifications
to DCE
to DTE
to DTE
to DTE
to DCE
to DCE
to DTE
to DTE
Both
to DCE
Signal Name
Secondary transmitted data
Transmit clock
Secondary received data
Receiver clock
Unassigned
Secondary request to send
Data terminal ready
Signal quality detect
Ring indicator
Data rate select
Transmit clock
Unassigned
Signal Name
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
Signal
Direction
Protective ground
Transmitted data
Received data
Request to send
Clear to send
Data set ready
Signal ground
Carrier detect
Reserved
Reserved
Unassigned
Secondary carrier detect
Secondary clear to send
Figure 9.1a TIA-232F DB25 connector and pin assignment
Ring indicator
9
Clear to send
8
Request to send
7
DCE ready
6
5
Ground
4
DTE ready
3
Transmitted data
2
Received data
1
Received line signal detect
Figure 9.1b TIA-232F DB9 connector and signal assignment
Both
to DCE
to DTE
to DCE
to DTE
to DTE
Both
to DTE
to DTE
to DTE
Serial interface

Basic characteristics of the RS232 interface:

Voltage levels:


No TTL but EIA and have the following values:

- 25V ÷ - 3V for “1” and

+ 3V ÷ + 25V for “0”.
TTL → EIA conversion circuits is required and EIA → TTL: MAX232
Serial interface

The data direction:

Simplex transfers:



Unidirectional transfers;

One equipment is always the transmitter, the other is always the receiver and the transfer is
always from the transmitter to the receiver;

Is performed on a single signal line, accompanied by corresponding mass line;
Half duplex transfers:

are bidirectional transfers but at different times;

both devices are transmitters and receivers, and transfers can take place in any direction
but at different times;

requires only one signal line, accompanied by corresponding mass line;
Duplex or full duplex transfers:

are bidirectional transfers that can occur simultaneously;

both devices are transmitters and receivers;

requires two signal lines accompanied by corresponding table line or lines.
Serial interface

The speed:

Slow;

There are two units of the speed of transfer: bit per second (bps) and baud.

A baud is defined as a power transition line.

If the transfer between the two devices, for example, two computers, takes place
in digital form, that the two devices are connected to serial lines directly without
MODEM, then 1 bps = 1 baud.

If the transfer takes place in analog form, on the telephone lines between two
modems, for example, then1baud ≠ 1 bps.

The relationship between them depends on the method of encoding data lines
used by MODEMs.

It is customary to work with certain speeds. Most common speeds used are: 300,
600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 rarely
230400, 460800 bps.
Serial interface

Synchronization between transmitter and receiver:

Synchronous Transfer,

Asynchronous Transfer: character transfer, a character can be submitted at any time;

The waveform of a character:

Features:

Character-level synchronization by the START bit,

5-8 bits of data,

Optional parity bit

1, 1.5, 2 stop bits.
Serial interface

START false pulse rejection and reading information from the receiver:

Notation established:



8n2 is meaning asynchronous transfer with 8 data bits, no parity, and 2 stop
bits
7e1 is meaning transfer with 7 data bits , even parity and 1 STOP bit etc.
The letter e indicates parity (“even") and the letter o indicates odd parity
("odd").
Serial interface
Serial interface

The possibility of desynchronization between transmitter and receptor exists

The two devices work under the control of different clock cycles and although they are
scheduled to work at the same serial speed, phase shift between clock cycle makes the
receiver to not be able to read the delivered bit exactly at half of its length, but
delayed; this gap accumulates and if it is too high, there appears the risk that the
latest or the last bit are not read; the risk of information loss is minimized in two ways:
 bits are read from the middle of their length which provides a safety margin and
 The cumulation (aggregation) is being done only up to the level of a single
character, ie a maximum of 12 bits, because at the next character, the transmitter
and the receiver resynchronizes and previous aggregation disappears;

Advantages:



The transmitter can transmit a character whenever it wants,
Easy to implement.
Disadvantages :


Transfer of useless information (framing): minimum 20%
Low transfer rate.
Serial interface

Synchronous Transfer: block transfer, the transfer is made at block level or message .

The transmitter can start at any time the transmission of a block but once started, it must
submit all characters that form it.

A block starts with one to five special characters that serve as synchronization.

The receiver continuously test the line, it assembles received data and compares the
received data with synchronization characters.

From the programming phase, the receiver knows how many synchronization characters
the transmitter uses and what are these characters.

If the appearances of these characters has been detected, following next, there will be
the assembling of characters’ bits that make up the sent message.

If at the asynchronous transfer there is a synchronization at the character level, realized
through the START bit, here is a bit-level synchronization; each bit is transmitted at welldefined time moments, determined by clock, commissioned by the transmitter.

There are techniques for combining data and clock on the same line.
Serial interface

Advantages:

Provides higher speed due to:



Disadvantages:



The existence of the clock;
Removes framing information on character level.
Synchronization characters are necessary so if the block is short, less than 8
characters, the synchronous mode is no longer effective;
Additional line tact.
Alphanumeric information coding through codes:

BAUDOT: Use only 5 bits to encode a character which is limited to 32 the number
of characters that could be transferred;

EBCDIC;

ASCII (“American Standard Code for Information Interchange”): 96 bytes
correspond to letters, numbers or special characters and 32 bytes correspond to
the control characters.
Serial interface

Flow control: how does the transmitter find that the receiver can not retrieve
any character? - For various reasons, for example: its buffer is full, the line is
disconnected etc., it is useless to send them because, otherwise, they are lost.




There are three solutions:
 Without control;
 With software control ( “software handshaking” ) and
 With hardware control ( “ hardware handshaking” ).
The first solution: the transmitter and the receiver working at the same low speed;
The second solution: the use of two control characters: XON with DC1 code (11h)
and XOFF with DC3 code (13h); the receiver sends XON if it wants a transfer
and XOFF if it does not want a transfer.
A third solution: makes a dialogue between the transmitter and receiver via two
signals. When the transmitter wants to transfer something, enables RTS line. If the
receiver can receive information, will respond by activating the CTS line and
when it can not get any information, it will disable the CTS line. This solution is
faster than the previous one but requires an extra 2-wire cable.
Serial interface

Errors:







Framing (“Frame Error“),
parity (“Parity Error”),
Rate (“Overrun Error”) and
stop (“Break”).
“Break”: a special situation created intentionally by the transmitter; normally, if
the line is inactive, it is logical 1; the Break condition is forced by the transmitter
which passes the line to logic 0 for a relatively long period, from 0.25 to 0.5 sec.
and it is seen by the receiver;
For all errors, the specialized circuit does not stop the transfer but it announces
them by activating ranks of its status byte or bytes; it is the duty of the software
to handle these situations, for example requiring retransmission bytes.
Standardization:


Electronic Industries Association (EIA): the standard RS232, ...
International Telegraph and Telephone Consultative Communitee (CCIT) which
changed its name to International Telecommunications Union (ITU): the standard
V24, ...
Raspberry Pi. Serial interface



The Raspberry Pi has a UART (universal asynchronous receiver/transmitter)
interface to allow it to perform serial data communications.
The data lines used are 3.3 V logic-level signals and should not be connected to
TTL logic (+5 V) (they also are not RS-232 compatible).
To communicate with equipment using RS-232, you will need a converter module,
like MAX232CSE chip
Raspberry Pi. Serial interface

To communicate with equipment using RS-232, you will need a converter module,
like MAX232CSE chip

This unit supports only the RX and TX lines

When searching for a unit, be sure that you get one that works with 3 V logic
levels.

Some units work only with TTL (+5 V) logic, which would be harmful to the Pi.

The MAX232CSE chip will support 3 V operation when its VCC supply pin is
connected to +3 V.
Raspberry Pi. Serial interface





When choosing your RS-232 converter, keep in mind that there are two types
of serial connections:

DCE: Data communications equipment (female connector)

DTE: Data terminal equipment (male connector)
Consequently, for your Pi, choose an RS-232 converter that provides a female
(DCE) connector.
Likewise, make sure that you acquire for the laptop/desktop a cable or USB
device that presents a male (DTE) connection.
Connecting DTE to DTE or DCE to DCE requires a crossover cable, and
depending on the cable, a “gender mender” as well. It is best to get things
“straight” right from the start.
Assuming that you used a DCE converter for the Pi, connect the RS-232
converter’s 3 V logic TX to the Pi’s TXD0 and the RX to the Pi’s RXD0 data
lines.
Raspberry Pi. Serial interface

excerpt of the UART section of the Raspberry Pi, the UART connections are shown
as TXD0 and RXD0.
Raspberry Pi. Serial interface



Also when selecting a converter, consider
whether you need only the data lines, or
the data lines and the hardware flow
control signals.
Some units support only the RX and TX
lines.
For hardware flow control, you’ll also want
the CTS and DTR signals. A full RS-232
converter would also include DTR, DSR, and
CD signals
Raspberry Pi. Serial interface
Raspberry Pi. Serial interface


The Broadcom SoC supports 1 or 2 stop bits only;
The use of 2 stop bits was common for teletypewriter equipment and probably
rarely used today. Using 1 stop bit increases the overall data throughput.
Raspberry Pi. Serial interface



Hardware Flow Control for RPi: additional signal lines to regulate the flow of
data.
The RS-232 standards have quite an elaborate set of signals defined, but the main
signals needed for flow control on RPi are shown in table
Unlike the data line, these signals are inactive in the space state and active in the
mark state
Raspberry Pi. Serial interface





Hardware Flow Control for RPi: additional signal lines to regulate the flow of
data.
When CTS is active (mark), for example, the DCE (Pi) is indicating that it is OK to
send data. If the DCE gets overwhelmed by the volume of data, the CTS signal will
change to the inactive (space) state.
Upon seeing this, the DTE (laptop) is required to stop sending data. (Otherwise, loss
of data may occur.)
Similarly, the laptop operating as the DTE is receiving data from the DCE (Pi). If the
laptop gets overwhelmed with the volume of incoming data, the RTS signal is
changed to the inactive state (space). The remote end (DCE) is then expected to
cease transmitting.
When the laptop has caught up, it will reassert RTS, giving the DCE permission to
resume.
Raspberry Pi. Serial interface





Hardware Flow Control for RPi: additional signal lines to regulate the flow of
data.
The DTR and DSR signals are intended to convey the readiness of the equipment at
each end.
If the terminal was deemed not ready (DTR), DSR is not made active by the DCE.
Similarly, the terminal will not assert DTR unless it is ready.
In modern serial links, DTR and DSR are often assumed to be true, leaving only CTS
and RTS to handle flow control.
Where flow control is required, hardware flow control is considered more reliable
than software flow control
Raspberry Pi. Serial interface


The Raspberry Pi supports two UARTs
Some websites have incorrectly stated that the mini UART is the one being used. But
this does not in accordance with the Broadcom documentation, nor the Raspbian
Linux device driver. The Broadcom BCM2835 ARM Peripherals manual states that
the mini UART is UART1. UART1 is available only as alternate function 5 for GPIO
14 and 15. Raspbian Linux boots up using alternate function 0 for GPIO 14 and
15, providing the UART0 peripheral instead.
Raspberry Pi. Serial interface



The Raspberry Pi supports two UARTs
By default, UART0 is provided after reset and boot-up, on GPIO 14 (TX) and 15
(RX), configured as alternate function 0
UART0 is the full UART, referred to as the ARM PL011 UART.
Raspberry Pi. Serial interface


MAX232 RS232 to TTL Converter Adapter Board
A level shifter is a circuit that can take the low voltage (±3.3VDC) TTL signals for serial transmit (TX)
and receive (RX) from the UART on the Pi and shift them to ±5VDC the voltage signals required for
RS232 standard communication
USB Interface
 Two factors contributing most to the success of the personal digital revolution that
encompasses desktop computers, laptops and notebooks, MP3 players and both
still and digital cameras as well as cellular phones, are flash memory and the
universal serial bus, USB.
 Flash memory provides robust, high-density, low size, non-volatile storage at low
prices, and USB technology allows you to connect almost any modern digital device
to a computer – or even to connect two digital devices together without a host
computer (e.g., a camera and a printer).
 Indeed, the USB is the single most successful digital interface ever, with over one
billion USB devices sold by 2009.
USB Interface
USB History
USB was developed by a consortium of Compaq, DEC, IBM, Microsoft, NEC,
and Nortel in 1994. The first USB specification, 1.0, was introduced in 1996
and supported a data rate of 12 Mb/s. USB 1.1 was released in 1998 to
deal with problems related to hubs. USB 1.1 was widely adopted.
In 2000 USB 2.0 emerged to provide a maximum data rate of 480 Mb/s.
USB had jumped into FireWire territory and it became the de facto standard
for most PC interfaces to printers, external drives, keyboards, mice, and so on.
It wasn’t until 2009 that version 3.0 USB saw the light of day with an
operating speed of 300 MB/s (i.e., 2,400 Mb/s) displacing FireWire from its
eight-end niche. USB 3.0 is a giant leap forward over version 2.0 and
requires a new cable format and technology.
USB Interface
 The Universal Serial Bus was devised a consortium of companies and
later established as a standard interface.
 A USB bus uses low cost connectors and cabling to connect a computer to
a range of peripherals from the mouse/keyboard/printer/scanner to
memory devices such as external hard-drives and flash memory devices
(so called pen drives).
 USB is an alternative to FireWire.
USB Interface
 USB is host controlled.
 Unlike other buses such as PCI, it
does not support a multimaster
arrangement.
 There can be only one USB
master (or host) per bus.
 Figure 12.70 describes the tiered
star topology of a USB system.
USB Interface
 At the top of the hierarchy sits the host
which communicates with the computer
and controls the USB bus.
 The host is connected to a hub which is a
device that distributes the USB bus to
lower levels in the hierarchy.
 A hub may be connected directly to a
peripheral, or to several peripherals, or
to another hub.
 Each hub may be connected to a lowerlevel hub.
USB Interface
USB Interface
 USB uses a simple multicore connector with dedicated connectors. However, since the
introduction of USB, peripherals have become smaller and smaller and USB cables have
been forced to follow this trend with the result that there are now four basic sizes.
 Figure 12.71 illustrates both USB plugs and sockets. The computer end of the link uses type
A sockets and type B plugs which are fairly substantial. Type B plugs and sockets are used
at the other end of the link (i.e., at a hub or a peripheral such as a printer).
 Mini-B plugs and sockets were developed for digital cameras, cell phones, and portable
disk drives
USB Interface
Figure 12.73 illustrates the structure of a USB system.
USB Interface
 USB cables use four conductors. Data is transmitted differentially between a twisted
pair of wires labeled D+ and D- in Figure 12.74.
 Recall that differential mode
transmission increases reliability be
rejecting common mode
interference.
 The twisted pair is enclosed in a
metal shield to further reduce the
dangers of picking up stray signals.
 The specified maximum length of
the cable is 5 meters. Of course,
you can use a hub at the end of a
5m cable to increase the length of
the USB path.
USB Interface
More Power
The USB’s ability to deliver power was intended to support hubs and
peripherals like the mouse and keyboard.
In practice, many manufacturers have taken advantage of this facility; for
example, the USB’s built in power supply has been used to charge cell phones
and MP3 players.
A new power mode was added to the USB specification called battery
charging. A host can supply up to 1.5A when communicating at 12 Mbps, or
0.9A when communicating at 480 Mbps.
Furthermore, by 2010, many of the world’s cell phone manufacturers had
provided micro USB ports to charge their phones.
USB Interface. Physical Layer Data Transmission
 At the electrical level the USB employs NRZI data encoding where a logical 1 is
represented by no change of level and a 0 is represented by a change of level. Sending a
string of 0s requires the greatest bandwidth and transmitting a sequence of 1s results in a
constant level with no signal transitions.
 Figure 12.75 illustrates a NRZI sequence, the two signal levels on a USB bus are referred to
as J and K.
USB Interface. Logical Layer
 Logically, a communications channel exists between the host and device, and in USB-speak
this channel is called a pipe. The USB host can support 32 active pipes at any instant (16
up-stream and 16-down-stream pipes).
 The pipe is terminated at a peripheral by an endpoint. Although the physical structure of a
USB system is a tiered star, it is logically a star network. All nodes have to communicate with
each other via the single central node.
USB Interface
USB 3.0
 The most radical change to the universal bus took place in 2010 with the
introduction of USB 3.0 which provides a tenfold increase in performance and
uses less power.
 Even more remarkably, USB 3.0 is physically compatible with USB 2. USB 3.0
is interesting because it is not really a development or extension of USB 2.0,
but a replacement bus that coexists with USB 2.0; that is, a USB 3.0 bus
incorporates a USB 2.0 bus as well.
USB Interface
 Figure 12.77 illustrates the structure of the USB 3.0 cable. The two data carrying
conductors of USB 2.0 are maintained as well as the two power conductors.
 Two new differential pairs of conductors (SSRX and SSTX) have been added carry the new
USB 3.0 data in a full duplex bidirectional mode.
USB Interface
 The additional functionality of USB 3.0 is called the SuperSpeed bus which
provides a maximum speed of 4.8 Gb/s.
 To put this into context, it takes USB 2.0 13.9 minutes to transfer an HD movie,
whereas USB 3.0 can perform the transfer in only 70s.
 In short, USB 3.0 is an impressive feat of engineering that take a great leap
ahead in terms of functionality and performance, while maintaining backward
compatibility with a vast existing market of USB 2.0 users.
USB Interface
 Figure 12.78 illustrates the logical structure of the USB 3.0 bus in terms of protocol layers
(like the ISO 7 layer model for open systems interconnection).
 The SuperSpeed bus that adds all the new functionality to USB 3.0
 Data is scrambled on SuperBus. This is not a security mechanism but a means or converting
data into a sequence that appears random in order to improve the electrical properties of
the data link.
Raspberry Pi. USB Interface

The Model B
Raspberry Pi supports
two USB 2 ports, the
Model A just one,
Raspberry Pi 3 has 4
USB 2.0
Raspberry Pi. USB Interface



SERIAL COMMUNICATION VIA USB
communication to Raspberry Pi via its serial UART, then the USB interface can be
used also
a USB to serial converter chip: PL2303HX USB to TTL to UART RS232 COM Cable
module Converter
NOTE: Please secure the RED lead from
the USB adapter so that it does not come
into contact with any of the other pins or
components on the Raspberry Pi. This RED
pin carries +5VDC and could damage the
Pi if it makes contact.
Raspberry Pi. USB Interface

SERIAL
COMMUNICATION
VIA USB
Raspberry Pi. USB Interface

SERIAL COMMUNICATION VIA USB
Raspberry Pi. DHT11 Sensor




humidity and temperature sensor, manufactured by D-Robotics UK
It is capable of measuring relative humidity between 20 and 90% RH (Relative
Humidity) within the operating temperature range of 0 to 50°C, with an accuracy
of ±5% RH.
Additionally, temperature is measured in the range of 0 to 50°C, with an
accuracy of ±2°C.
Both values are returned
with 8-bit resolution
Raspberry Pi. DHT11 Sensor





The signaling used by the DHT sensor is similar to the 1-Wire protocol, but the
response times differ;
there is no device serial number support. These factors make the device
incompatible with the 1-Wire drivers
The datasheet states that the DHT11 can be powered by a range of voltages,
from 3 V to 5.5 V.
Powering it from the Raspberry Pi’s 3.3 V source keeps the sensor signal levels
within a safe range for GPIO.
draws between 0.5 mA and 2.5 mA. Its standby current is stated as 100 mA to
150 mA, for those concerned about battery consumption
Raspberry Pi. DHT11 Sensor



Pin 4 connects to the common ground, while pin 1 goes to the 3.3 V supply.
Pin 2 is the signal pin, which communicates with a chosen GPIO pin (e.g. GPIO 4
or 22 etc)
When the Pi is listening on the GPIO pin and the DHT11 is not sending data, the line will
float. For this reason, R1 is required to pull the line up to a stable level of 3.3 V. The
datasheet recommends a 5 kOhm resistor for the purpose (a more common 4.7 kOhm
resistor can be substituted safely). This presents less than 1 mA of load on either the GPIO
pin or the sensor when they are active. The datasheet also states that the 5 kOhm resistor
should be suitable for cable runs of up to 20 meters.
Raspberry Pi. DHT11 Sensor


Pin 4 connects to the common ground, while
pin 1 goes to the 3.3 V supply.
Pin 2 is the signal pin, which communicates
with a chosen GPIO pin (e.g. GPIO 4 or
22)
Raspberry Pi. DHT11 Sensor



The sensor speaks only when spoken to by the master (Raspberry Pi).
The master must first make a request on the bus and then wait for the sensor to
respond.
The DHT sensor responds with 40 bits of information, 8 of which are a checksum.
 The datasheet states 16 bits of relative humidity, 16 bits of temperature in Celsius, and
an 8-bit checksum. However, the DHT11 always sends 0s for the humidity and
temperature fractional bytes. Thus the device really has only 8 bits of precision for each
measurement
Raspberry Pi. DHT11 Sensor

Overall protocol:

1. The line idles high because of the pull-up resistor.





2. The master pulls the line low for at least 18 ms to signal a read request and
then releases the bus, allowing the line to return to a high state.
3. After a pause of about 20 to 40 ms, the sensor responds by bringing the line
low for 80 ms and then allows the line to return high for a further 80 ms. This
signals its intention to return data.
4. Forty bits of information are then written out to the bus: each bit starting with a
50 ms low followed by:

a. 26 to 28 ms of high to indicate a 0 bit

b. 70 ms of high to indicate a 1 bit
5. The transmission ends with the sensor bringing the line low one more time for 50
ms.
6. The sensor releases the bus, allowing the line to return to a high idle state.
Raspberry Pi. DHT11 Sensor

Overall protocol:

Master control is shown in thick lines, while sensor control is shown in thin lines.



Initially, the bus sits idle until the master brings the line low and releases it
(labeled Request).
The sensor grabs the bus and signals that it is responding (80 ms low, followed by
80 ms high).
The sensor continues with 40 bits of sensor data, ending with one more transition
to low (labeled End) to mark the end of the last bit.
Content
Raspberry Pi Board Configurations
 Architecture Overview
 Interfacing the Pi
 1-wire interface
 Serial Interface
 USB Interface
 DHT11 Sensor


Homework:

For a Raspberry Pi board, present the design (scheme,
explanations, algorithm – pseudocode or logic scheme) of
the following system:
Connect to the RPi one of the sensors presented in the course
 Read the data from it
 Send the information on the serial interface (the method you
prefer) to PC/laptop
 Acknowledge the correct reception on the laptop by lighting a LED
on the Raspberry Pi


Additional resources:
Introducing the Raspberry PI 3:
http://hackaday.com/2016/02/28/introducing-theraspberry-pi-3/
 SoC vs SIP:
http://www.eetimes.com/document.asp?doc_id=1153043
