Transcript Shunt regulator block for the SPI chip - Indico

PIXELS
at Fermilab
generally and for CMS
CMS pixel bootstrap meeting
05/22/2010
G.Deptuch
Measurement of amplitude
• ToT requires extending signals for multiple BXs – source of dead time
that dominates after problems of buffer depths and R/O speed are
solved; FEI4 is proposing using truncation (stop TOT when new
hit occurs in the same location – loss of resolution)
• Regional Logic Units (called so in FEI4) or Pixel Regions (in Jorgen’s
proposal), where one hit pixel defines ToA for all pixels in the region and
the whole region needs to wait till the end of ToT measurement to activate
again
• Fast digitization of a registered peak (requires peak detector) signal could
be an alternative to ToT; the value of this method would increase if
real-time, on-detector clusterization with reconstitution of full cluster signal
was implemented (data reduction and elimination of time walk)
• Using two alternately switched peak detectors would allow avoiding dead
time
Work on pixels @ Fermilab
Reconstitution of full signals in a cluster
Formation of clusters (arbitrary size and position)
Get ToA measurement to 10ns
130 nm 100x100 um^2 pixel ~2000 transistors total
45uW in analog
Work on pixels @ Fermilab
Tripple well GF 130nm (are the same arrangements in 65nm)
vd0
vpwell
VSUB
NW
NW
PFIELD
NW
PFIELD
NW
DNWELL
psub
C-ed
Getting full signal by comparing neighbors and use whole
Full signals for time-walk-less ToA measurement
C-ed
System is “very analog” – and similar ideas have bee tried before
C-ed
Where we are:
- Have access to standard cell libraries in 65nm (TSMC, IBM, GF)
we (all of us not only Fermilab) need to decide in which process
start making first steps
- Chose between digitally driven (poor analog and digital doing all
processing and correction) or analog driven approach
– power consumption may be the main issue – limit?
- We need to specify what we need to have common design
platform between institutions! Can we port verilog simulations
to Fermilab from CERN or Torino? Can we send our libraries
to have them opened elsewhere?
- We need to select direction… more signs are indicating that
a 65 nm FEI4 is the platform (common for ATLAS and CMS)
or we come to the conclusion that there is alternative,
optimized way (no doubt that the PSI designapproach is
obsolete, but having <<1% of acceptance maybe analog storage
is still not to be abandon)
- Still valid trading size of the pixel for complexity and vice versa,
this is still an open question