2010-004.Basic gates.Wakerly.chpt2

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Transcript 2010-004.Basic gates.Wakerly.chpt2

Modified from John Wakerly
Lecture #2 and #3
CMOS gates at the transistor level
Boolean algebra
Combinational-circuit analysis
CMOS NAND Gates
• Use 2n transistors for n-input gate
• CMOS NAND -- switch model
• CMOS NAND -- more inputs (3)
• Inherent inversion.
• Non-inverting buffer:
• 2-input AND gate:
CMOS NOR Gates
• Like NAND -- 2n transistors for n-input gate
NAND vs. NOR
• For a given silicon area, PMOS transistors are
“weaker” than NMOS transistors.
NAND
NOR
• Result: NAND gates are preferred in CMOS.
Boolean algebra
• a.k.a. “switching algebra”
– deals with boolean values -- 0, 1
• Positive-logic convention
– analog voltages LOW, HIGH --> 0, 1
• Negative logic -- seldom used
• Signal values denoted by variables
(X, Y, FRED, etc.)
Boolean operators
• Complement:
• AND:
• OR:
X (opposite of X)
binary operators, described
XY
functionally by truth table.
X+Y
• Axiomatic definition: A1-A5, A1-A5
More definitions
• Literal: a variable or its complement
– X, X, FRED, CS_L
• Expression: literals combined by
AND, OR, parentheses, complementation
– X+Y
–P Q  R
–A+ B  C
– ((FRED  Z) + CS_L  A  B  C + Q5)  RESET
• Equation: Variable = expression
– P = ((FRED  Z) + CS_L  A  B  C + Q5)  RESET
Logic symbols
Theorems
• Proofs by perfect induction
More Theorems
Duality
• Swap 0 & 1, AND & OR
– Result: Theorems still true
• Why?
– Each axiom (A1-A5) has a dual (A1-A5
• Counterexample:
X + (X  Y) = X (T9)
X + X  Y = X (T9)
X  X + Y = X (dual) X  (X + Y) = X (dual)
(X  X) + (X  Y) = X (T8)
X + Y = X (T3)
X + (X  Y) = X (T3)
This is wrong! IT IS
NOT A CORRECT
DUAL
Remember about parentheses,
operator precedence!
good
N-variable Theorems
• Prove using finite induction
• Most important: DeMorgan theorems
DeMorgan Symbol Equivalence
Likewise for OR
• (be sure to check errata!)
DeMorgan Symbols
Even more definitions (Sec. 4.1.6)
• Product term
• Sum-of-products expression
• Sum term
• Product-of-sums expression
• Normal term
• Minterm (n variables)
• Maxterm (n variables)
Truth table vs. minterms & maxterms
Combinational analysis
Signal expressions
• Multiply out:
F = ((X + Y)  Z) + (X  Y  Z)
= (X  Z) + (Y  Z) + (X  Y  Z)
New circuit, same function
“Add out” logic function
• Circuit:
POS
CIRCUIT
Shortcut: Symbol substitution
You can use
this method
to write
equations
from
schematics
Different circuit, same function
You need tautology
checking to
compare functions
of two schematics
Another example: factorization and conversion to NAND and NOR gates
Short Review of Exor Logic
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AA=0
A  A’ = 1
A  1=A’
A’  1=A
A  0=A
A  B= B  A
AB=B A
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A(B  C) = AB  AC
A+B = A  B  AB
A+B = A  B when AB = 0
A  (B  C) = (A  B)  C
(A B) C = A (B C)
A+B = A  B  AB =
A B(1  A) = A  BA’
These rules are sufficient to minimize Exclusive Sum of
Product expression for small number of variables
We will use these rules in the class for all kinds of
reversible, quantum, optical, etc. logic. Try to remember
them or put them to your “creepsheet”.
Challenge Problems for ambitious students
• Problem 2. Prove that
• Problem 1. Express
function AB+CD+A’C
A+B = A  B  AB
using only EXORs and • Problem 3 . Prove that A+B = A 
AND gates
B when AB = 0
Problem 4. Given are three functions of three inputs:
A = NOT(a), B = NOT(b), C = NOT(c).
You have only two inverters. You can have an arbitrary large set of
two-input AND and OR gates.
Realize these three functions with the gates that you have at your
disposal. You cannot use other gates. You can use only two
inverters. Draw the schematic of the solution