Transcript Self-aligned base Ohmic

xxx
Miguel Urteaga
A Ph. D. thesis proposal,
July 16th, 2002
Outline
• Motivation
• Research to Date
• Proposed Research
Demonstration of high-bandwidth
manufacturable InP mesa-HBTs
Circuit demonstrations in technology
Motivation
Why do we want fast transistors?
Fiber Optic Communication Systems
40 Gb/s, 160 Gb/s(?) long haul links
mm-Wave Wireless Transmission
high bandwidth communication links,
atmospheric sensing, automotive radar
Military Electronics Applications
> 100 GHz mixed-signal ICs for digital
microwave radar
InP vs Si/SiGe HBTs
InP system has inherent material advantages over Si/SiGe
20x lower base sheet resistance,
5 x higher electron velocity,
4x higher breakdown-at same ft.
but…
Current generation production Si/SiGe HBTs are almost as
fast as InP counterparts due to 5x smaller scaling
and…
SiGe HBTs offer much higher levels of integration due to
underlying Si platform
Scaling Laws for HBTs
Reduce vertical dimensions to decrease transit times
Reduce lateral dimensions to decrease RC time constants
Increase current density to decrease charging resistances
For a x 2 improvement of all parasitics: ft, fmax, logic speed...
base 2: 1 thinner
collector 2:1 thinner
emitter, collector junctions 4:1 narrower
current density 4:1 higher
emitter Ohmic, collector Ohmic 4:1 less resistive
Which technology is built to scale?
C
E
B
InP mesa-HBT before passivation
Wide emitter: >1 um
Self-aligned base metal liftoff: low yield
Low current density: 2 mA/um2
Parasitic base collector capacitance
under base contacts
Non-planar device : low yield
Cross-section of SiGe HBT
Narrow emitter: 0.18 um
Self-aligned regrown emitter
High current density: 10 mA/um2
SiO2 trenches: small collector
capacitance
Planar device : high yield
Key Challenges for InP HBTs
•
Scaling of collector-base junction
•
High yield self-aligned base-emitter junction formation
•
Improving emitter Ohmic contacts
•
Heat flow for high current-density operation
•
Device passivation for long-term reliability
•
Planar process flow for high levels of integration
Revolutionary Approach: Si like InP HBT
Objectives:
Extreme parasitic reduction: speed
Fully planar device: yield
Silicon-like structure: yield
emitter contact
regrown emitter *
Si N
3 4
base contact
regrown
extrinsic base*
collector
contact
Approach:
Implanted isolated subcollector
planar surface: yield
Pedestal collector, regrown base
submicron collector scaling: speed
small collector junction: speed
thick extrinsic base: speed
planar base-collector junction: yield
Regrown submicron emitter
submicron emitter scaling: speed
no submicron etching: yield
no emitter-base liftoff: yield
large emitter contact: low Rex, speed
large emitter contact: yield
Si N
3 4
N+ subcollector
S.I. substrate
intrinsic base*
N- collector
*monocrystalline where
grown on semiconductor
polycrystalline where
grown on silicon nitride
Approach currently being pursued
by D. Scott and N. Parthasarathy at
UCSB
Evolutionary Approach: Optimized InP mesa-HBT
Objectives:
Emitter contact
Improve speed, yield, and integration
density of mesa-HBT technology
Contribute processes for development of
Si-like technology
Approach:
Si3N4 Sidewall
SiO2 sidewall
Base contact
Si3N4 Sidewall
Base layer
Collector contact
N- collector
N+ subcollector
Dielectric sidewall processes
self-aligned base-emitter junction with
improved yield: no liftoff
self-aligned definition of base Ohmic
contact width for minimum Cbc
Ion implantation for base pad isolation
Extrinsic Cbc reduction
S.I.Substrate
Planar View
Collector contact
Base
contact
Optimize Ohmic contact metallurgies
Rex reduction essential for high-speed logic
Skip lateral scaling generation with
improved base Ohmics
Emitter contact
Ion Implant
Region
Base contact
Sidewall
Research to Date
Submicron HBTs by Substrate Transfer
Submicron transferred-substrate HBTs with
electron-beam defined emitter and
collector contacts
Device measurement and characterization
to 220 GHz
G-band (140-220 GHz) small-signal amplifier
designs
On-wafer Device Measurements
Submicron HBTs have very low Ccb
(< 5 fF)
230 mm
230 mm
Small reverse transmission characteristics
and small output conductance make
accurate device measurements difficult
UCSB measurement set-up allows device
measurements to 220 GHz
Transistor Embedded in LRL Test Structure
Accurate on-wafer calibration is essential
LRL calibration with correction for Line
standard complex characteristic
impedance
First reported transistor measurements
in 140-220 GHz band
2001 DRC, Notre Dame, IN
UCSB 140-220 GHz VNA Measurement Set-up
Transferred-Substrate Device Results
40
unbounded
U
35
U
RF Gains, dB
30
25
20
15
Recent device measurements
show singularity in Unilateral
Power Gain due to small
negative output conductance
MSG/MAG
Not predicted from hybrid-p
transistor model
h21
Cannot extrapolate fmax from
device measurements
10
5
0
-5
1E10
1E11
Frequency, Hz
Emitter: 0.3 x 18 mm2,
Collector: 0.7 x 18.6 mm2
Ic = 5 mA, Vce = 1.1 V
1E12
Effect may arise from secondorder transport effects in
collector space charge region
• Ccb cancellation
• weak IMPATT effects
“Power gain singularities in
Transferred-substrate
InP/InGaAs-HBTs,” submitted
to IEEE TED
Ultra-high Frequency Amplifiers (140-220 GHz)
Applications:
 Wideband communication systems
 Atmospheric sensing
 Automotive radar
Utilize high available gain of submicron transferred substrate HBTs for
tuned small-signal amplifiers in 140-220 GHz band
State-of-the-art InP-based HEMT Amplifiers with submicron gate lengths
 3-stage amplifier with 30 dB gain at 140 GHz.
Pobanz et. al., IEEE JSSC, Vol. 34, No. 9, Sept. 1999.
 3-stage amplifier with 12-15 dB gain from 160-190 GHz
Lai et. al., 2000 IEDM, San Francisco, CA.
 6-stage amplifier with 20  6 dB from 150-215 GHz.
Weinreb et. al., IEEE MGWL, Vol. 9, No. 7, Sept. 1999.
First Generation: Single-Stage Amplifier
8
• Gain per-stage amongst highest reported
6
• Common-emitter design with microstrip
matching network
4
• Device dimensions:
 Emitter area: 0.4 x 6 mm2
 Collector area: 0.7 x 6.4 mm2
S21, dB
• Measured 6.3 dB peak gain at 175 GHz
S21
2
0
-2
-4
140 150 160 170 180 190 200 210 220
• Presented at 2001 GaAsIC Conference
Frequency, GHz
0
S22
S11, S22, dB
-4
-8
S11
-12
-16
-20
140 150 160 170 180 190 200 210 220
Cell Dimensions: 690mm x 350 mm
Frequency, GHz
Second Generation: Multi-Stage Amplifiers
20
• Three-stage amplifier designs:
10
0
dB
 12.0 dB gain at 170 GHz
 8.5 dB gain at 195 GHz
S21
S11
S22
• Cascaded 50 W stages with interstage
blocking capacitors
• To be presented 2002 GaAsIC conference
-10
-20
-30
140
150
160
170
180
190
200
210
220
frequency (GHz)
20
S21
S11
S22
10
dB
0
-10
-20
-30
Cell Dimensions:1.6 mm x 0.59 mm
140
150
160
170
180
190
frequency (GHz)
200
210
220
Technological
Implementation
Evolutionary Approach: Optimized InP mesa-HBT
Objectives:
Emitter contact
Improve speed, yield, and integration
density of mesa-HBT technology
Contribute processes for development of
Si-like technology
Approach:
Si3N4 Sidewall
SiO2 sidewall
Base contact
Si3N4 Sidewall
Base layer
Collector contact
N- collector
N+ subcollector
Dielectric sidewall processes
self-aligned base-emitter junction with
improved yield: no liftoff
self-aligned definition of base Ohmic
contact width for minimum Ccb
Ion implantation for base pad isolation
Extrinsic Ccb reduction
S.I.Substrate
Planar View
Collector contact
Base
contact
Optimize Ohmic contact metallurgies
Rex reduction essential for high-speed logic
Skip lateral scaling generation with
improved base Ohmics
Emitter contact
Ion Implant
Region
Base contact
Sidewall
Technological Implementation
•
Optimized Ohmic contacts
•
Self-aligned base-emitter junction formation
•
Self-aligned base Ohmic width definition
•
Ion Implantation for base-pad capacitance reduction
InP HBT Ohmic Contacts
Optimized Ohmic contacts are essential for realization of
high performance mesa-HBTs
Currently UCSB has the world’s best base Ohmic contacts
and the world’s worst emitter Ohmic contacts
Collector contacts have not been closely examined
because of Schottky collector contact TS-HBTs and the
use of thick InGaAs sub-collector layers
Base Ohmic Contacts
TLM Measurements
Improvement seen for C and Be doped
samples
Transfer length of < 0.1 mm allows
aggressive scaling of base Ohmic
contact width for reduced Ccb
250
y = 0.6 + 38.5x R= 0.99998
200
Resistance (Ohm)
Base Ohmic process developed by
M. Dahlstrom has reduced specific
contact resistivity of p-type contacts to
< 10-7 W-cm2
150
100
-7
 < 10 W-cm
50
2
c
0
Process
• UV Ozone treatment of InGaAs surface
• NH4OH oxide strip
• Pd/Ti/Pd/Au metallization
0
1
2
3
4
5
6
7
Spacing (mm)
Proposed Research
• Incorporate process with new selfaligned base-emitter junction processes
• Investigate thermal stability of contacts
Emitter Ohmic Contacts
UCSB InP HBTs have large extrinsic
emitter resistance Rex
Emitter resistance has contributions from
vertical contact resistance, and
resistances of semi-conductor layers.
Approximate as
Rex = e/Ae
UCSB: e= 30-50 W-mm2
NTT:
e= 7 W-mm2
M. Ida et. al. 2001 IEDM
Variability of UCSB contacts suggest
processing related problems
R ex  ρc ,e L e We ,contact  ρcap Tcap L e We ,contact
ρe 2 Te 2 L e We , junct  ρe1 Te1 L e We
Proposed Research
• Optimize Ohmic contacts to n-InGaAs using
refractory metallization if possible
• Determine source of high emitter resistance
and optimize epi-layers and/or process to
reduce Rex
Collector Ohmic Contacts
Wc,gap
In typical mesa-HBT, extrinsic
collector resistance Rc is much
smaller than Rex
but…
Subcollector thickness should be
minimized for device planarity, and
for base-pad capacitance isolation
implant, Tsubcollector < 1500 Ang
and,
Wmesa
Wc,gap
N- collector
N+ subcollector
S.I.Substrate
R c  ρ sheet Wc ,gap 2L e  ρ sheet Wmesa 12L e

ρsheet ρ cont 2L e
InGaAs should be eliminated from
subcollector for thermal
considerations
Proposed Research
Collector contacts should be made
to thin InP subcollector regions and
Rc will be comparable to Rex
• Investigate use of alloyed contacts
(i.e. AuGe, Pd/Ge)
• Optimize Ohmic contacts to n-InP
Base-Emitter Junction Formation
Current UCSB base-emitter junction formation relies on
undercut of emitter semiconductor and self-aligned
liftoff of thin base metal
Acceptable process for high-performance, small-scale
integration, research fabrication
Unacceptable process for high-performance, large-scale
integration, production fabrication
Base-Emitter Junction Formation
Current Base-Emitter Process
Failure Mechanisms
emitter
liftoff failure:
emitter-base
short-circuit
base
sub collector
base contact
S.I. substrate
base
sub collector
S.I. substrate
base
sub collector
S.I. substrate
excessive
emitter undercut
base contact
emitter
contact
base contact
base contact
base
sub collector
base
sub collector
S.I. substrate
S.I. substrate
planarization failure: interconnect breaks
base
sub collector
base
Dielectric Sidewall Formation
Utilize isotropic deposition of CVD dielectric films and
anisotropic etch rates of RIE to form sidewall spacers
Emitter Contact/ Mesa formation
Reactive Ion Etch
CVD Dielectric film
Sidewall Formation
Dielectric Sidewall Formation: Current Status
1 mm Tungsten Emitter w/ 1000A SiN sidewall
•
Dielectric sidewall process has been
developed at UCSB
•
Utilize dry-etched tungsten emitter
contacts for improved emitter profile
and sidewall formation
Key challenges
Etch damage to base semiconductor
Passivation of InP/InGaAs surfaces
with dielectrics
Scaling sidewall thickness
Hydrogen passivation of carbon
doped InGaAs base
Key Challenge: Hydrogen Passivation of C-doped InGaAs
Carbon is preferred to Beryllium as base dopant because of lower diffusion
coefficient and higher solubility
Hydrogen passivation of Carbon acceptors in InGaAs is observed in
MOCVD growth and during Methane base dry-etches
SixNy CVD deposition utilizes SiH4 carrier gas. Carbon passivation during
ECR-CVD of SixNy has been reported.
Ren, F et. al. Solid-State Electronics May, 1996
Possible Solutions
•
SixNy deposition on base-emitter grade
•
Anneal out hydrogen; 400 C ~10 min anneal requires refractory contacts
•
Use Be doped base
•
GaAsSb base layer
InAlAs/GaAsSb/InP DHBTs
MOCVD of C-doped GaAsSb shows
no hydrogen passivation
Large area
DC I-V
Initial experiments at UCSB show no
passivation after SixNy deposition
High performance InP/GaAsSb/InP
DHBTs have been demonstrated
f t,
fmax = 300 GHz
Dvorak, et. al. IEEE EDL Aug. 2001
InAlAs/GaAsSb/InP HBTs have
favorable band lineup and good
surface properties for BE passivation
GaAs50Sb50
MBE growth of p-type GaAsSb looks
promising
Be : NA = 6.6E19 cm-3; m = 26.6 cm2/Vs
C : NA = 4E19 cm-3; m = 46 cm2/Vs
InP
In52Al48As
Self-aligned base-emitter junction formation
Approaches to base-emitter junction formation with
sidewall spacers
•
Blanket metallization and planarization etch back
•
Selective metallization of base semiconductor:
CVD, or electroplating
•
Self-aligned liftoff of thin base metal with sidewalls
to prevent metal-to-metal short circuits
Base-emitter junction formation: Base metal liftoff
Self-aligned emitter mesa
Sidewall formation
Thin metal liftoff
Base-emitter junction formation: Selective metallization
CVD
Sidewall Formation
Selective CVD Tungsten ???
Electroplate
Sidewall Formation
Thin seed metal
Electroplate
Base-emitter junction formation: Planarization etchback
Sidewall Formation
Blanket metallization
Planarization
Etchback
Metal sidewall removal
Strip planarization material
Planarization etchback experiments
Similar process is incorporated in Hitachi
GaAs HBT process
Reference
Planarization etch back experiments at
UCSB were unsuccessful due to nonuniformity of RIE system
Experiments at Rockwell Science Center
look better but still work to be done
Etch selectivity between planarization
material and Tungsten is a key
processing issue
Proposed Research
• Further experiments at RSC to
determine feasibility of process
• If unsuccessful, look at alternative selfaligned processes
Self-aligned base Ohmic formation
Base Ohmic transfer length < 0.1 mm allows for aggressive
scaling of base Ohmic contacts for reduced Cbc
Current self-aligned liftoff process requires accurate
stepper alignment and emitter topology presents
challenges for further scaling
Low yield seen for 0.3 mm base Ohmic width
Utilize sidewall process for base Ohmic definition
Self-aligned base Ohmic: Process Flow
Sidewall thickness
determined by thickness of
PECVD deposition
Self-aligned metallization
Outer sidewall formation
Repeatable definition of base
Ohmic width if base metal can
be selectively dry etched
Continue process with selfaligned base-mesa etch
RIE base metal
Goal:
Repeatable, high-yield
definition of < 0.3 mm base
metal width
Self-aligned base Ohmic
Base-pad Capacitance
Base contact pad represents considerable fraction of total extrinsic
base collector capacitance
~34 % of total Ccb for current generation ECL logic transistors with 0.7 mm emitter
and 0.5 mm base Ohmic width operating at 2.5 x 105 A/cm2
Fraction of total Ccb will increase dramatically as devices are laterally
scaled for reduced Ccb and vertically scaled for high current
density operation
~52 % of total Ccb, for next generation ECL logic transistors with 0.5 mm emitter and
0.3 mm base Ohmic width operating at 5 x 105 A/cm2
Planar View
Collector contact
Base contact pad
Emitter contact
Base contact
Base-pad capacitance reduction
Approaches to reducing extrinsic base pad capacitance include:
•
Lateral undercut of contact region for isolation
•
Dielectric refill and planarization of extrinsic region
•
Ion implantation of extrinsic base region
Ion Implantation of InP
Damage implants of light ions in InP tend to generate shallow level traps
Unsuitable for device isolation
Adequate for base-pad capacitance reduction
Base-pad capacitance reduction: He+ Implant
Circuit simulations show sheet resistance
> 1MW/square is adequate to provide
base-pad isolation
Planar View
Implant Region
Implant experiments with He+ into
1500 Ang. InP sub-collector show sheet
resistance of ~ 10 MW/square
Projected range of He+ implant will allow
implant as first processing step
Proposed Research
Cross-section
• Transistor fabrication with base-pad
isolation implant
• Determine minimum implant to device
separation
• Explore Fe implant for device isolation
pending experiments by N. Parthasarathy
Implant Region
emitter
base
collector
subcollector
Layer Structure for Advanced mesa-HBT
InAs 2E19 Si 200 Å
InGaAs 1E19 Si 300 Å
Grade 1E19 Si 200 Å
InAlAs 8E17 Si 300 Å
Grade 8E17 Si 233 Å
Grade 2E18 Be 67 Å
InGaAs 8E19 C 300 Å
InGaAs 1E16 Si 200 Å
Grade 1E16 Si 200 Å
InP 2E18 Si 1100 Å
InGaAs 1E19 Si 50 Å
InP 1E19 Si 1500 Å
Emitter cap, InAs for improved contact
resistance
Thin InAlAs emitter
GaAsSb or Be-doped if necessary
Collector setback layer
1500 Ang. total collector thickness
Thin subcollector etch stop
Subcollector; no buffer layer
Predicted
Performance
State-of-the-art InP mesa-HBTs
NTT: ft = 341 GHz, fmax = 250 GHz
M. Ida et. al. 2001 IEDM
SFU: ft = 300 GHz, fmax = 300 GHz
GaAsSb base, 2000 Ang. collector,
airbridge contacts for base pad isolation,
lateral etch collector undercut
M. Dvorak, et. al. IEEE EDL Aug. 2001
UCSB: ft = 280 GHz, fmax >450GHz
25
21
Gain (dB) H , U
1500 Ang. collector, high current density 8
x 105 A/cm2, lateral undercut for base pad
isolation
30
20
15
f =282 GHz
t
10
f
=480 GHz
max
5
0
10
10
10
11
frequency (GHz)
UCSB record fmax mesa-HBT
Graded C-doped InGaAs base,
2000 Ang. composite collector, highlyscaled base Ohmics, no base pad isolation
M. Dahlstrom, et. al. 2002 IPRM
Figures-of-merit do not tell the whole story
10
12
Mesa-HBTs for Digital Logic
87 GHz input, 43.5 GHz output
-0.06
Transistor figures-of-merit do not
accurately predict digital logic speed
UCSB record 87 GHz static frequency
divider fabricated with ft = 200 GHz,
fmax = 180 GHz device operating at
Je = 2.5 x 105 A/cm2
PK Sundararajan PhD thesis
Similarly,
MSG/MAG is better metric for
mm-wave tuned amplifier design
than Unilateral power gain used to
extrpolate fmax
out
(Volts)
-0.1
V
Time constants CcbDVlogic/Ic and CcbRex
have larger contribution to digital logic
gate delays than to ft
-0.08
-0.12
-0.14
-0.16
-0.18
-0.2
22
22.02 22.04 22.06 22.08
time (nsec)
22.1
22.12 22.14
Predicted Performance: SPICE Simulations
Use HBT SPICE model to predict improvements in device
performance from process enhancements
Next generation ECL transistor:
We= 0.5 mm, Le= 3.0 mm, Je= 5 x 105 A/cm2, Tcollector= 1500 Ang, Tbase= 300 Ang
Physical parameters from current generation mesa-HBTs
Consider improvements in
•
ft and fmax
•
Maximum ECL static divider frequency (no layout parasitics)
•
Maximum available gain at 175 GHz ( Le = 6 mm)
Predicted Performance: Rex Reduction
Base Ohmic width = 0.5 mm, Standard base-pad capacitance
e (W-mm2)
ft
fmax
Max Divider
Freq.
MAG @ 175 GHz
50
233 GHz
423 GHz
64 GHz
4.9 dB
40
248 GHz
434 GHz
81 GHz
5.0 dB
30
266 GHz
446 GHz
92 GHz
5.1 dB
20
287 GHz
458 GHz
102 GHz
5.3 dB
10
313 GHz
472 GHz
117 GHz
5.6 dB
5
329 GHz
478 GHz
121 GHz
5.8 dB
Predicted Performance: Self-aligned base Ohmic
e = 30 W-mm2, Standard base-pad capacitance
Base Ohmic
Width
ft
fmax
Max. Divider
Freq.
MAG @ 175 GHz
0.5 mm
266 GHz
446 GHz
92 GHz
5.1 dB
0.25 mm
290 GHz
464 GHz
109 GHz
6.0 dB
Predicted Performance: Base-pad Isolation
e = 30 W-mm2, Base Ohmic width = 0.5 mm
Base Pad
Isolation
ft
fmax
Max. Divider
Freq.
MAG @ 175 GHz
No
266 GHz
446 GHz
92 GHz
5.1 dB
Yes
289 GHz
450 GHz
112 GHz
5.7 dB
Predicted Performance: All Enhancements
e = 10 W-mm2, Base Ohmic width = 0.25 mm,
Base-pad Isolation
ft
fmax
Max. Divider
Freq.
MAG @ 175 GHz
344 GHz
487 GHz
160 GHz
7.2 dB
8.8 dB with
b_cont = 1 x 10-8 W-cm2
Proposed Circuit Demonstrations
Static Frequency Dividers:
divide-by-two, divide-by-four
Analog Wideband Amplifiers:
Cherry-Hooper
mm-Wave Tuned Amplifiers:
140-220 GHz frequency band
Research Timeline
Implement process enhancements using
current device mask set
Base pad isolation:
Things to do when:
SEM Rockwell experiments
More samples for S3 processing at Rockwell: Thicker emitter, thinner base metal (how thin?)
Emitter contact experiments on remaining InGaAs wafer
Literature search on N+ InGaAs contacts ---Work function stuff???? Something besides Ti
Mask set for Ion Implant of InP DHBTs for base pad reduction
Implant through whole structure or just base collector??
Measure straggle on bits an pieces of He implanted structure
Layer structures from Dennis
InAs cap on InAlAs for Ohmic contact studies
InAlAs grade on carbon doped InGaAs. Check for H passivation maybe able to use old mattias Epi, also for implant stuff.
GaAsSb when system B comes back up!!
Order IQE epi.
Go See Val tomorrow!!!