Transcript Chapter 1
ECE200 – Computer Organization
Chapter 1 - Computer
Abstractions and
Technology
Homework 1
1.1-1.44
Number in brackets indicates difficulty
We’ll
also use this as the number of points for the problem
Due in class one week after the lecture in which
we finish Chapter 1
The amazing computer revolution
Relentless improvement in computer systems
performance and cost, especially in last 15 years
PC
of today outperforms the fastest supercomputer in the
world from 1988 at 1/1000 the cost
If transportation industry improved comparably, could travel
from east to west cost in 5 seconds for 50 cents
Ubiquity of computing technology
PCs,
laptops, ATMs, cell phones, digital cameras, answering
machines, PDAs, microwaves, automobiles, gas pumps, …
In
Think how computer technology has replaced mechanical components
the future, smart buildings, smart homes, smart clothing, …
This makes computer architecture a very
interesting field of study
Constantly
changing
New applications
Relentless innovation
Job is never done (growing faster than we can keep up)
Growth in workstation performance
Performance has doubled every 1.6 years
How has this revolution occurred?
Great market
High
demand from both business and consumers
Most recently, web, communications driving demand
Advances in integrated circuit, memory, and disk
technologies
Increased
level of integration allows architects to create more
powerful chips, memories, and disks at less cost or provide
the same functionality in a smaller space
Moore’s Law (mid 60’s): integrated circuit density doubles
every 18 months, and it’s been true for 35 years running!
Systems software advances
Optimizing
compilers that rapidly generate fast, compact
machine code from high-level languages
Operating systems that efficiently manage memory, multiple
processes, etc.
Relentless innovation in computer architecture
Many
smart people developing innovative new ways to
architect computer systems
The big picture of a computer
Central
Processing
Unit
(2) CPU fetches instructions and data from memory,
executes instructions, and writes results to memory
(1) program loaded
into memory
Memory
(3) Results written
to output
Input/
Output
disk
keyboard/mouse
network
etc
Stored-program concept
A more detailed view
CPU fetches instructions and
operands (data), performs
operations, writes results
L1 and L2 caches bridge
speed gap between CPU and
main memory
Interconnect provides
communication datapaths
and protocols for L2 cache,
MM, and I/O
MM holds most instructions
and operands
I/O provides interface to
peripherals
instructions
Central
operands
Processing
Unit
Level1
Instruction
Cache
Level1
Data
Cache
Level2
Cache
Interconnect
Main
Memory
Input/
Output
disk
keyboard/mouse
network
etc
The technology that drives computing
For the CPU and caches
CMOS
logic and static RAM (SRAM)
Both typically placed on single die of 10’s to 100’s of millions
of transistors (for PC, workstation, server CPUs)
High speed of SRAM needed for caches to match CPU speed
Microprocessor (uP): today defines everything on the CPU die
For interconnect
Buses
or switches
May be integrated with CPU, on boards, or in chips
For main memory
Dynamic
RAM (DRAM) technology plus control logic
DRAM provides high density at the expense of speed
For input/output
Control
logic plus busses for connecting
peripherals (magnetic disks, display, network, etc.)
Older Macintosh microprocessor (604e)
instructions
Central
operands
Processing
Unit
Level1
Instruction
Cache
Level1
Data
Cache
Level2
Cache
Interconnect
Main
Memory
Input/
Output
Recent Macintosh microprocessor (G4)
instructions
Central
operands
Processing
Unit
Level1
Instruction
Cache
Level1
Data
Cache
Level2
Cache
Interconnect
Main
Memory
Input/
Output
SGI workstation microprocessor (R10K)
Levels of abstraction in computer design
CS
{
Application software
System software
software
Assembly language
our level
of interest
EE
{
higher levels
of abstraction
Instruction set architecture
Computer organization
Circuits/VLSI/logic design
Device design
Semiconductor physics/materials
hardware
What is computer architecture?
Instruction set architecture (ISA)
Specification
of the instruction types, operand (data) storage
(registers), ways to access memory (addressing modes), etc
that the compiler and assembly language programmer can use
and that the hardware designer must support
This is not just hardware or software, but rather a
hardware/software contract
Examples: X86, PowerPC, SPARC, ARM, MIPS, IA-64
May have multiple hardware implementations of the same ISA
Example: i386, i486, Pentium, Pentium Pro, Pentium II, Pentium III,
Pentium 4
Computer organization
The
high level organization of the computer hardware
Above logic design level of abstraction
Cache
size, multiplier algorithm, interconnect datapath width,
etc.
Result is a hardware specification that can be implemented
in particular technologies (CMOS logic, DRAM memory, etc.)
The ISA as the “middleman”
User writes high-level
language (HLL) program
Compiler converts HLL
program into assembly for
the particular ISA
Assembler converts
assembly into machine
language (bits) for ISA
Resulting machine
language program is loaded
into memory and run
Software and hardware
instructions
Central
operands
Processing
Unit
Level1
Instruction
Cache
Level1
Data
Cache
Level2
Cache
Interconnect
Main
Memory
Input/
Output
disk
keyboard/mouse
network
etc
Why are HLLs necessary?
Why not simply write code in assembly?
Why is the ISA necessary?
Why not simply convert HLL statements into bits
for the hardware to interpret?
The role of the compiler
The compiler translates a HLL program into the
machine language for the given ISA
Compilers allow software developers to work at
the HLL level without worrying about low-level
details of the underlying machine
The compiler writer’s first responsibility is to
ensure that the machine language program
Exactly
matches the functionality of the HLL program
Exactly conforms to the ISA specification
Compiler product differentiators include
Speed
of code execution on the hardware
Code density (reduces memory requirements)
Compilation speed (how long from HLL to machine code)
Debugging capabilities
The ISA and computer hardware
The designer of computer hardware (CPU,
caches, MM, and I/O) must first ensure that the
hardware correctly executes the machine code
specified in the ISA spec
Hardware product differentiators include
Performance
(emphasis of this course)
Power dissipation (a huge issue today!)
Cost (die size, package pin count, cooling costs)
Reliability, availability, serviceability
Ability to upgrade
Where we’re headed this semester
Defining, measuring, evaluating performance
(Ch 2)
Instruction set architecture and assembly
language programming (Ch 3)
Computer arithmetic (Ch 4)
Basic CPU organization (Ch 5)
Advanced CPU organization (Ch 6)
Caches and main memories (Ch 7)
Input/Output (Ch 8 and Motorola HC11
manuals)
Multiprocessors (Ch 9)
Questions?