Transcript Measuring and Improving Design Capability

EDP - 2001 CONFERENCE
Session 7: Analog and Analog-mixed-signal (A/AMS) Design Flows
Current Analog Design Methodologies and Practices
Bill Guthrie
Numetrics Management Systems, Inc.
April 10, 2001
Page 1
Investigating Analog & Mixed-Signal Design Practices
 What is the definition of an analog or mixed-signal chip?
 How do AMS chip design projects compare to SoC design
projects?
 What is the AMS content of an SoC design?
 Are AMS blocks increasing in size?
 Is AMS design productivity increasing?
Data from Numetrics’ Design Productivity Management System
database is used to investigate these issues.
Page 2
DPMS Database Used in This Investigation
Design Projects Accumulated in the DPMS Database
400
368 Projects
No. of Designs
350
As of 27-Mar-01
300
250
ASIC Projects
200
150
100
ASSP Projects
50
0
1998
1999
2000
Data Capture Date
Page 3
Companies Represented in the DPMS Database
Page 4
Characteristics Used to Define & Select AMS
Projects in the DPMS Database
 Projects are included if one of the following criteria is met
• Analog circuitry contains ≥ 1,000 transistors
• RF circuitry is used
• Analog or Mixed-Signal circuitry comprises more than 10% of all
transistors
• BiCMOS or Bipolar process is used
• Large geometry process is used (≥ 0.6 micron)
• Only 1 metal layer is used
 Projects are excluded if one of the following criteria is met
• Design style is “Gate Array” or “Embedded Array”
• No Analog, Mixed-Signal, or RF circuitry is used
• Small geometry process is used (≤ 0.25 micron)
• High layer count metal system is used (≥ 5 layers)
Page 5
Comparison of AMS and SoC Projects
CYCLE TIME
TEAM SIZE
12.7
SoC
49%
51%
73
Weeks
1st Tape-out
4.5
AMS
39%
61%
54
Weeks
SoC
AMS
SIZE, REUSE & COST
SoC:
4.9M Transistors
$2.5M Development Cost
New
Circuitry
41%
Physical
Reuse
35%
Logical
Reuse
24%
New
Circuitry Physical
33%
Reuse
45%
Logical
Reuse
22%
Projects were started in 1998 or later. Sample size is 112 projects.
AMS:
330K Transistors
$780K Development Cost
Page 6
AMS Content in SOC Designs
SoC BREAKDOWN BY CIRCUIT TYPE
AVERAGE SoC BLOCK COUNT
Analog & Mixed-Signal
0.5%
Analog
Logic &
Datapath
21.7%
0.86
DSP & Comm
Average Number
of Blocks: 12.50
1.49
Memory
2.10
Mixed Signal
Memory
77.8%
2.60
Interface
2.65
CPU & Control
2.81
0.00
0.50
1.00
1.50
2.00
2.50
3.00
Number of Functional Blocks
Average Size = 4,900,000 Transistors
AMS Content = 24,000 Transistors
Based on 72 designs started in 1998 or later
Page 7
AMS Block Size Growth is Due to Reuse
AMS Block Size & Effort
4,210
4,200
1,172
2,400
708
2,396
1,178
2,330
538
48%
50%
Frequency
Transistor Count
Total Reuse per AMS Block
40%
30%
20%
19%
11%
10%
6%
680
0%
2%
1997-1998
1999-2000
Effort = 16.3
Effort = 13.6
(Person-weeks)
(Person-weeks)
0%
13%
0%
1%
121- 41- 61- 81- 100%
20% 40% 60% 80% 99%
Percentage of Circuitry Reused
(Projects started 1999-2000)
New Circuitry
Logical Reuse
Physical Reuse
Based on sample of 400 AMS blocks
Page 8
AMS Block Design Productivity Trend
Transistors per Person-week
3,000
2,630
2,500
2,000
1,500
1,000
677
500
80
0
19971998
165
19992000
19971998
Productivity does not include adjustments for circuit complexity or effort
for chip-level or project-level development tasks.
19992000
Page 9
Conclusions
 AMS Projects are substantially smaller in scope than SoC projects
• 25% shorter cycle times
• 65% smaller teams
• 69% lower development cost
 SoC designs contain miniscule amounts of AMS circuitry on a
percentage transistor basis, but on a block-count basis AMS
represents over one-fourth of the design.
 AMS blocks have grown in size by 33% per year, but all the
growth is due to reused circuitry.
 The productivity of raw AMS transistor design has increased
• 33% per year for NEW AMS circuitry
• 97% per year for REUSED AMS circuitry
• REUSED AMS circuits require only 6% of
NEW AMS circuit design effort
Page 10