Transcript Systems Architecture, Fifth Edition

Chapter Goals
• Describe CPU instruction and execution cycles
• Explain how primitive CPS instructions are
combined to form complex processing operations
• Describe key CPU design features, including
instruction format, word size, and clock rate
• Describe the function of general-purpose and
special-purpose registers
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Chapter Goals (continued)
• Compare and contrast CISC and RISC CPUs
• Describe the principles and limitations of
semiconductor-based microprocessors
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CPU Operation
• Control unit
– Moves data and instructions between main memory
and registers
• Arithmetic logic unit (ALU)
– Performs computation and comparison operations
• Set of registers
– Storage locations that hold inputs and outputs for
the ALU
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Actions Performed by CPU
Fetch cycle
CPU:
• Fetches an instruction from primary storage
• Increments a pointer to location of next instruction
• Separates instruction into components (instruction code
and data inputs)
• Stores each component in a separate register
Execution
cycle
ALU:
• Retrieves instruction code from a register
• Retrieves data inputs from registers
• Passes data inputs through internal circuits to perform
data transformation
• Stores results in a register
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Instructions and Instruction Sets
• Instruction
– Lowest-level command
– A bit string, logically divided into components (op
code and operands)
– Three types (data movement, data transformation,
sequence control)
• Instruction sets
– Collection of instructions that a CPU can process
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Data Movement Instructions
• Copy data (MOVE) among registers, primary
storage, secondary storage, and I/O devices
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Data Transformations
• Implement simple Boolean operations (NOT,
AND, OR, and XOR)
• Implement addition (ADD)
• Implement bit manipulation (SHIFT)
– Logical shift
– Arithmetic shift
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Sequence Control Operations
• Control the next instruction to be fetched or
executed
• Operations
– Unconditional branch
– Conditional branch
– Halt
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Complex Processing Operations
• Implemented by appropriate sequences of
primitive instructions
• Represent combinations of primitive processing
operations
• Represent a tradeoff between CPU complexity and
– Programming simplicity
– Program execution speed
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Instruction Set Extensions
• Additional instructions required when new data
types are added
• Some include instructions that combine data
transformation with data movement
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Instruction Format
• Template describing op code position and length,
and position, type, and length of each operand
• Vary among CPUs (op code size, meaning of
specific op code values, data types used as
operands, length and coding format of each type
of operand)
• Most CPUs support multiple instructional formats
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Instruction Length
Fixed length
• Amount by which instruction pointer
must be incremented after each fetch is
constant
• Simplify control unit function at expense
of efficient memory use
Variable length • Amount by which instruction pointer is
incremented after a fetch is the length of
the most recently fetched instruction
• Use primary and secondary storage more
efficiently
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Reduced Instruction Set
Computing (RISC)
• Uses fixed length instructions, short instruction
length, large number of general-purpose registers
• Generally avoids complex instructions, especially
those that combine data movement and data
transformation
• Simpler but less efficient than CISC (Complex
Instruction Set Computing)
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Clock Rate
• Number of instructions and execution cycles
potentially available in a fixed time interval
• Typically measured in thousands of MHz
(1000 MHz = 1 GHz)
• Rate of actual or average instruction execution is
measured in MIPS or MFLOPS
• CPU cycle time – inverse of clock rate
• Wait state
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CPU Registers
• Primary roles
– Hold data for currently executing program that is
needed quickly or frequently (general-purpose
registers)
– Store information about currently executing
program and about status of CPU (special-purpose
registers)
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General-Purpose Registers
• Hold intermediate results and frequently needed
data items
• Used only by currently executing program
• Implemented within the CPU; contents can be
read or written quickly
• Increasing their number usually decreases
program execution time to a point
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Special-Purpose Registers
• Track processor and program status
• Types
– Instruction register
– Instruction pointer
– Program status word (PSW)
• Stores results of comparison operation
• Controls conditional branch execution
• Indicates actual or potential error conditions
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Word Size
• Number of bits a CPU can process simultaneously
• Increasing it usually increases CPU efficiency, up
to a point
• Other computer components should match or
exceed it for optimal performance
• Implications for system bus design and physical
implementation of memory
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Enhancing Processor Performance
Memory caching
(See Chapter 5.)
Pipelining
Method of organizing CPU circuitry to
enable multiple instructions to execute
simultaneously in different stages
Branch prediction Ensure pipeline is kept full while
and speculative
executing conditional branch
execution
instructions
Multiprocessing
Duplicate CPUs or processor stages
execute in parallel
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Range of Possible Approaches for
Multiprocessing
• Duplicate circuitry for some or all processing
stages within a single CPU
• Duplicate CPUs implemented as separate
microprocessors sharing main memory and a
single system bus
• Duplicate CPUs on a single microprocessor that
also contains main memory caches and a special
bus to interconnect the CPUs
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The Physical CPU
• Electrical device implemented as silicon-based
microprocessor
• Contains millions of switches, which perform
basic processing functions
• Physical implementation of switches and circuits
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Switches and Gates
• Basic building blocks of computer processing
circuits
• Electronic switches
– Control electrical current flow in a circuit
– Implemented as transistors
• Gates
– An interconnection of switches
– A circuit that can perform a processing function on
an individual binary electrical signal, or bit
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Electrical Properties
Conductivity
Ability of an element to enable electron flow
Resistance
Loss of electrical power that occurs within a
conductor
Heat
Negative effects of heat:
• Physical damage to conductor
• Changes to inherent resistance of conductor
Dissipate heat with a heat sink
Speed and
Time required to perform a processing operation is
circuit length a function of length of circuit and speed of light
Reduce circuit length for faster processing
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Processor Fabrication
• Performance and reliability of processors has
increased with improvements in materials and
fabrication techniques
– Transistors and integrated circuits (ICs)
– Microchips and microprocessors
• First microprocessor (1971) – 2,300 transistor
• Current memory chip – 300 million transistors
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Microprocessors
• Use small circuit size, low-resistance materials,
and heat dissipation to ensure fast and reliable
operation
• Fabricated using expensive processes based on
ultraviolet or laser etching and chemical
deposition
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Current Technology Capabilities
and Limitations
• Moore’s Law
– Rate of increase in transistor density on microchips
doubles every 18-24 months with no increase in
unit cost
• Rock’s Law
– Cost of fabrication facilities for chip generation
doubles every four years
• Increased packing density
• Electrical resistance
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Future Trends
• Semiconductors are approaching fundamental
physical size limits
• Technologies that may improve performance
beyond semiconductor limitations
– Optical processing
– Hybrid optical-electrical processing
– Quantum processing
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Optical Processing
• Could eliminate interconnection and simplify
fabrication problems; photon pathways can cross
without interfering with one another
• Eliminating wires would improve fabrication cost
and reliability
• Not enough economic incentive to be a reality yet
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Electro-Optical Processing
• Devices provide interface between semiconductor
and purely optical memory and storage devices
– Gallium arsenide (both optical and electrical
properties)
– Silicon-based semiconductor devices (encode data
in externally generated laser light)
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Quantum Processing
• Uses quantum states to simultaneously encode two
values per bit (qubit)
• Uses quantum processing devices to perform
computations
• Theoretically well-suited to solving problems that
require massive amounts of computation
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Summary
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CPU operation
Instruction set and format
Clock rate
Registers
Word size
Physical implementation
Future trends
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