Transcript A “short list” of embedded systems

Embedded Systems Design: A Unified
Hardware/Software Introduction
Chapter 4 Standard Single Purpose
Processors: Peripherals
1
Introduction
• Single-purpose processors
– Performs specific computation task
– Custom single-purpose processors
• Designed by us for a unique task
– Standard single-purpose processors
•
•
•
•
“Off-the-shelf” -- pre-designed for a common task
a.k.a., peripherals
serial transmission
analog/digital conversions
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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Timers, counters, watchdog timers
• Timer: measures time intervals
– To generate timed output events
• e.g., hold traffic light green for 10 s
– To measure input events
• e.g., measure a car’s speed
• Based on counting clock pulses
•
•
•
•
E.g., let Clk period be 10 ns
And we count 20,000 Clk pulses
Then 200 microseconds have passed
16-bit counter would count up to 65,535*10 ns =
655.35 microsec., resolution = 10 ns
• Top: indicates top count reached, wrap-around
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Basic timer
Clk
16-bit up
counter
16 Cnt
Top
Reset
3
Timer
• Range
– Maximum time interval. Equals to 2N input intervals.
• Resolution
– Minimum input time interval, or the input clock period.
• Range = n * t
– Where: 0 < n < 2N, t = clock period or timer resolution.
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Counters
• Counter: like a timer, but counts
pulses on a general input signal
rather than clock
– e.g., count cars passing over a sensor
– Can often configure device as either a
timer or counter
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Timer/counter
Clk
2x1
mux
16-bit up
counter
Cnt_in
16 Cnt
Top
Reset
Mode
5
Timers – Examples
• A PIC 16F84 clock runs at
4.194304 MHz, with an 8-bit
timer, what frequencies can
be obtained with TOP
(overflow) interrupts?
• A 16-bit counter, using autoreload, with f=1.2 MHz is
used to generate an interrupt
at every 500 s. What should
the reload value be?
• fint=f/2N
•
•
•
•
•
• fint=4.1943044/28
• fint=4.096 KHz
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Tint=(2N – R)/T
500 s = (2N – R)/f
R = (216 – 1.2*106*500*10-6)
R = 65536 – 600
R = 64936
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Other timer structures
• Interval timer
– Indicates when desired time
interval has passed
– We set terminal count to
desired interval
• Number of clock cycles
= Desired time interval /
Clock period
• Cascaded counters
• Prescaler
– Divides clock
– Increases range, decreases
resolution
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
16/32-bit timer
Clk
Timer with a terminal
count
16-bit up
counter
16 Cnt1
Top1
Clk
16-bit up
counter
16 Cnt
16-bit up
counter
16
Reset
Cnt2
Top2
=
Top
Time with prescaler
Clk
Prescaler
Terminal count
16-bit up
counter
Mode
7
Input Capture Timer
• When an external signal
is asserted, the timer’s
values is recorded.
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Example: Reaction Timer
reaction
button
indicator
light
LCD
time: 100 ms
• Measure time between turning light on
and user pushing button
– 16-bit timer, clk period is 83.33 ns, counter
increments every 6 cycles
– Resolution = 6*83.33=0.5 microsec.
– Range = 65535*0.5 microseconds = 32.77
milliseconds
– Want program to count millisec., so
initialize counter to 65535 – 1000/0.5 =
63535
Embedded Systems Design: A Unified
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/* main.c */
#define MS_INIT
63535
void main(void){
int count_milliseconds = 0;
configure timer mode
set Cnt to MS_INIT
wait a random amount of time
turn on indicator light
start timer
while (user has not pushed reaction button){
if(Top) {
stop timer
set Cnt to MS_INIT
start timer
reset Top
count_milliseconds++;
}
}
turn light off
printf(“time: %i ms“, count_milliseconds);
}
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Watchdog timer
• Must reset timer every
X time unit, else timer
generates a signal
• Common use: detect
failure, self-reset
• Another use: timeouts
– e.g., ATM machine
– 16-bit timer, 2
microsec. resolution
– timereg value = 2*(2161)–X = 131070–X
– For 2 min., X =
120,000 microsec.
osc
clk
prescaler
overflow
scalereg
overflow
timereg
to system reset
or
interrupt
checkreg
/* main.c */
main(){
wait until card inserted
call watchdog_reset_routine
while(transaction in progress){
if(button pressed){
perform corresponding action
call watchdog_reset_routine
}
/* if watchdog_reset_routine not called every
< 2 minutes, interrupt_service_routine is
called */
}
Embedded Systems Design: A Unified
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watchdog_reset_routine(){
/* checkreg is set so we can load value into
timereg. Zero is loaded into scalereg and
11070 is loaded into timereg */
checkreg = 1
scalereg = 0
timereg = 11070
}
void interrupt_service_routine(){
eject card
reset screen
}
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WDT
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WDT
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WDT
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Contador de RPM
• Um MCU tem 2 C/T de 16 bits, prescaler com divisões de 2, 4 ou 8, e
recebem um clock estável entre 500 kHz e 8 MHz. Medir a rotação do eixo
de um motor que varia entre 100 rpm e 1000 rpm. Um sensor está ligado ao
eixo e produz 60 pulsos por ciclo.
– Cada rotação do motor produz entre 100 Hz e 1000 Hz
• 60 cpr * 100 rpm = 6000 cpm / 60 spm = 100 cps
– Contar os pulsos do sensor em cada segundo!
• Um C/T como temporizador gerando o período de 1 segundo
• Um C/T como contador de pulsos do sensor dentro de cada segundo
– Geração de períodos de 1 segundo
• 1/216 = 15,259 s ou 65,536 kHz (usando o sinal overflow)
• Usando o prescaler de 8  8 * 65,536 = 524,288 kHz
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Serial Transmission Using UARTs
• UART: Universal
Asynchronous Receiver
Transmitter
– Takes parallel data and
transmits serially
– Receives serial data and
converts to parallel
• Parity: extra bit for simple
error checking
• Start bit, stop bit
• Baud rate
– signal changes per second
– bit rate usually higher
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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0
0
1
0
1
1
embedded
device
1
10011011
10011011
Sending UART
start bit
Receiving UART
end bit
data
1
0
0
1
1
0
1
1
15
UART Sync
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I2C
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I2C – PCF8574
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I2C – PCF8574
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SPI
• Serial
Paralel
Interface
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SPI Timing
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LED
• Must use resistor to limit
current.
• Lei de Ohm:
– R = V/I
• LED = diodo
– VF e IF
– VF determinado pela cor
– IF determina a intensidade
• Resistor limita IF
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Displays
• 7 Segments
• Dot
• Dot Matrix
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7-Segments
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7-Segments – Multiplexed
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LCD
• Nematic type
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LCD
• Polarizing
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LCD
• Types
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LCD
• Color
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Pulse width modulator
• Generates pulses with specific
high/low times
• Duty cycle: % time high
pwm_o
clk
– Square wave: 50% duty cycle
• Common use: control average
voltage to electric device
– Simpler than DC-DC
converter or digital-analog
converter
– DC motor speed, dimmer
lights
• Another use: encode
commands, receiver uses timer
to decode
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
25% duty cycle – average pwm_o is 1.25V
pwm_o
clk
50% duty cycle – average pwm_o is 2.5V.
pwm_o
clk
75% duty cycle – average pwm_o is 3.75V.
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Controlling a DC motor with a PWM
clk
clk_div
controls how
fast the
counter
increments
counter
( 0 – 254)
8-bit
comparator
counter <
cycle_high,
pwm_o = 1
counter >=
cycle_high,
pwm_o = 0
pwm_o
cycle_high
Input Voltage
% of Maximum
Voltage Applied
RPM of DC Motor
0
0
0
2.5
50
1840
3.75
75
6900
5.0
100
9200
Relationship between applied voltage and speed of
the DC Motor
Internal Structure of PWM
void main(void){
/* controls period */
PWMP = 0xff;
/* controls duty cycle */
PWM1 = 0x7f;
The PWM alone cannot drive the
DC motor, a possible way to
implement a driver is shown
below using an MJE3055T NPN
transistor.
5V
while(1){};
}
5V
From
processor
DC
MOTOR
A
B
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LCD controller
E
R/W
RS
void WriteChar(char c){
communications
bus
RS = 1;
DATA_BUS = c;
EnableLCD(45);
DB7–DB0
}
8
microcontroller
/* indicate data being sent */
/* send data to LCD */
/* toggle the LCD with appropriate delay */
LCD
controller
CODES
I/D = 1 cursor moves left
DL = 1 8-bit
I/D = 0 cursor moves right
DL = 0 4-bit
S = 1 with display shift
N = 1 2 rows
S/C =1 display shift
N = 0 1 row
S/C = 0 cursor movement
F = 1 5x10 dots
R/L = 1 shift to right
F = 0 5x7 dots
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Description
0
0
0
0
0
0
0
0
0
1
Clears all display, return cursor home
0
0
0
0
0
0
0
0
1
*
Returns cursor home
0
0
0
0
0
0
0
1
I/D
S
0
0
0
0
0
0
1
D
C
B
0
0
0
0
0
1
S/C
R/L
*
*
Move cursor and shifts display
0
0
0
0
1
DL
N
F
*
*
Sets interface data length, number of
display lines, and character font
1
0
R/L = 0 shift to left
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WRITE DATA
Sets cursor move direction and/or
specifies not to shift display
ON/OFF of all display(D), cursor
ON/OFF (C), and blink position (B)
Writes Data
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Keypad controller
N1
N2
N3
N4
k_pressed
M1
M2
M3
M4
4
key_code
key_code
keypad controller
N=4, M=4
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KBD
• Key bouncing
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Key Debouncing
• RC Network/LP Filter
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• Latch
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• Software
– Scan column
– Scan line
– Filter closed key
• Time-out
• interruption
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Stepper motor controller
• Stepper motor: rotates fixed number
of degrees when given a “step” signal
– In contrast, DC motor just rotates when
power applied, coasts to stop
• Rotation achieved by applying
specific voltage sequence to coils
• Controller greatly simplifies this
Sequence
1
2
3
4
5
A
+
+
+
A’
+
+
-
B
+
+
+
Vd
1
16
A’
2
MC3479P 15
A
3
14
4
13
5
12
Bias’/Set
6
11
Phase A’
Clk
7
10
CW’/CCW
O|C
8
9
Full’/Half Step
GND
Red
White
Yellow
Black
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
B’
+
+
Vm
B
B’
GND
A
A’
B
B’
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Stepper motor with controller (driver)
/* main.c */
MC3479P
Stepper Motor
Driver
10
7
void main(void){
sbit clk=P1^1;
sbit cw=P1^0;
8051
CW’/CCW
CLK
P1.0
P1.1
2 A’ B 15
3 A B’ 14
*/turn the motor forward */
cw=0;
/* set direction */
clk=0;
/* pulse clock */
delay();
clk=1;
void delay(void){
int i, j;
for (i=0; i<1000; i++)
for ( j=0; j<50; j++)
i = i + 0;
}
/*turn the motor backwards */
cw=1;
/* set direction */
clk=0;
/* pulse clock */
delay();
clk=1;
}
Stepper
Motor
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
The output pins on the stepper motor driver do not
provide enough current to drive the stepper motor.
To amplify the current, a buffer is needed. One
possible implementation of the buffers is pictured
to the left. Q1 is an MJE3055T NPN transistor
and Q2 is an MJE2955T PNP transistor. A is
connected to the 8051 microcontroller and B is
connected to the stepper motor.
+V
1K
Q1
A
B
Q2
1K
39
Stepper motor without controller (driver)
8051
P2.4
/*main.c*/
sbit notA=P2^0;
sbit isA=P2^1;
sbit notB=P2^2;
sbit isB=P2^3;
sbit dir=P2^4;
GND/ +V
P2.3
P2.2
P2.1
P2.0
Stepper
Motor
A possible way to implement the buffers is located
below. The 8051 alone cannot drive the stepper motor, so
several transistors were added to increase the current going
to the stepper motor. Q1 are MJE3055T NPN transistors
and Q3 is an MJE2955T PNP transistor. A is connected to
the 8051 microcontroller and B is connected to the stepper
motor.
+V
1K
Q1
B
+V
1K
A
Q2
330
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
void delay(){
int a, b;
for(a=0; a<5000; a++)
for(b=0; b<10000; b++)
a=a+0;
}
void move(int dir, int steps) {
int y, z;
/* clockwise movement */
if(dir == 1){
for(y=0; y<=steps; y++){
for(z=0; z<=19; z+4){
isA=lookup[z];
isB=lookup[z+1];
notA=lookup[z+2];
notB=lookup[z+3];
delay();
}
}
}
/* counter clockwise movement */
if(dir==0){
for(y=0; y<=step; y++){
for(z=19; z>=0; z - 4){
isA=lookup[z];
isB=lookup[z-1];
notA=lookup[z -2];
notB=lookup[z-3];
delay( );
}
}
}
}
void main( ){
int z;
int lookup[20] = {
1, 1, 0, 0,
0, 1, 1, 0,
0, 0, 1, 1,
1, 0, 0, 1,
1, 1, 0, 0 };
while(1){
/*move forward, 15 degrees (2 steps) */
move(1, 2);
/* move backwards, 7.5 degrees (1step)*/
move(0, 1);
}
}
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5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
2.0V
1.5V
1.0V
0.5V
0V
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
4
4
3
3
analog output (V)
Vmax = 7.5V
7.0V
6.5V
6.0V
5.5V
analog input (V)
Analog-to-digital converters
2
1
t1
0100
proportionality
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
t2
t3
time
t4
1000 0110 0101
Digital output
analog to digital
2
1
t1
t2
0100
t3
1000 0110
Digital input
t4
time
0101
digital to analog
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Digital-to-analog conversion using
successive approximation
Given an analog input signal whose voltage should range from 0 to 15 volts, and an 8-bit digital encoding, calculate the correct encoding for
5 volts. Then trace the successive-approximation approach to find the correct encoding.
5/15 = d/(28-1)
d= 85
Encoding: 01010101
Successive-approximation method
½(Vmax – Vmin) = 7.5 volts
Vmax = 7.5 volts.
0
0
0
0
0
0
0
0
½(5.63 + 4.69) = 5.16 volts
Vmax = 5.16 volts.
0
1
0
1
0
0
0
0
½(7.5 + 0) = 3.75 volts
Vmin = 3.75 volts.
0
1
0
0
0
0
0
0
½(5.16 + 4.69) = 4.93 volts
Vmin = 4.93 volts.
0
1
0
1
0
1
0
0
½(7.5 + 3.75) = 5.63 volts
Vmax = 5.63 volts
0
1
0
0
0
0
0
0
½(5.16 + 4.93) = 5.05 volts
Vmax = 5.05 volts.
0
1
0
1
0
1
0
0
½(5.63 + 3.75) = 4.69 volts
Vmin = 4.69 volts.
0
1
0
1
0
0
0
0
½(5.05 + 4.93) = 4.99 volts
0
1
0
1
0
1
0
1
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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R2R Ladder DAC
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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Digital-to-analog conversion
• Use resistor tree:
R
bn
bn-1
bn-2
Vout
2R
4R
8R
bn-3
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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Flash A/D conversion
• N-bit result requires 2n comparators:
Vin
encoder
...
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RAMP ADC
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Dual-slope conversion
• Use counter to time required to charge/discharge
capacitor.
• Charging, then discharging eliminates non-linearities.
Vin
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
timer
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SAR ADC
•
Algorithm
1. The successive approximation Analog
to digital converter circuit typically
consists of four chief subcircuits:
2. A sample and hold circuit to acquire
the input voltage (Vin).
3. An analog voltage comparator that
compares Vin to the output of the
internal DAC and outputs the result of
the comparison to the successive
approximation register (SAR).
4. A successive approximation register
subcircuit designed to supply an
approximate digital code of Vin to the
internal DAC.
5. An internal reference DAC that
supplies the comparator with an
analog voltage equivalent of the digital
code output of the SAR for
comparison with Vin.
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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SAR ADC
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Distributed-charge SAR ADC
•
The DAC conversion is performed in four
basic steps:
1. First, the capacitor array is completely
discharged to the offset voltage of the
comparator, VOS. This step provides
automatic offset cancellation.
2. Next, all of the capacitors within the
array are switched to the input signal,
vIN. The capacitors now have a charge
equal to their respective capacitance
times the offset voltage minus the input
voltage upon each of them.
3. In the third step, the capacitors are then switched so that this charge is applied across the
comparator's input, creating a comparator input voltage equal to -vIN.
4. Finally, the actual conversion process proceeds. First, the MSB capacitor is switched to
VREF, which corresponds to the full-scale range of the ADC. Due to the binary-weighting
of the array the MSB capacitor forms a 1:1 divided between it and the rest of the array.
Thus, the input voltage to the comparator is now -vIN plus VREF/2. Subsequently, if vIN is
greater than VREF/2 then the comparator outputs a digital 1 as the MSB, otherwise it
outputs a digital 0 as the MSB. Each capacitor is tested in the same manner until the
comparator input voltage converges to the offset voltage, or at least as close as possible
given the resolution of the DAC.
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Sample-and-hold
• Required in any A/D:
Vin
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
converter
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• Understanding analog to digital converter
specifications, By Len Staller. Embedded Systems
Design, 02/24/05.
– http://www.embedded.com/showArticle.jhtml?articleID=604
03334
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Hardware/Software Introduction, (c) 2000 Vahid/Givargis
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