Transcript Slide 1

Chapter 6
Field-Effect Transistor
Dr.Debashis De
Associate Professor
West Bengal University of Technology
Outline
 Introduction
 The Field-effect Transistor
 Construction of the JFET
 Biasing of the JFET
 Current–Voltage Characteristics
 Transfer Characteristics of the JFET
 Construction and Characteristics of the MOSFET
 Complementary MOS
 Real-life Applications of the FET
INTRODUCTION
 The invention of the BJT has brought a great twist in the modern era of
semiconductor technology. This device, along with its field-effect
counterpart, known as the field-effect transistor (FET), has had a huge
impact on virtually every area of modern life.
 Practical field-effect transistors were first made in the form of JFET in
1953 and MOSFET in 1963.
 The field-effect transistor has taken various forms like that
 The junction field-effect transistor (JFET),
 The metal semiconductor field-effect transistor (MESFET),
 The metal-insulator-semiconductor field-effect transistor (MISFET),
 The metal-oxide-semiconductor field-effect transistor (MOSFET).
THE FIELD-EFFECT TRANSISTOR
 The FET is a single carrier device and is often called the unipolar transistor
because the carriers involved in the operation are either electrons or holes.
 The FET is also a semiconductor device in which the output quantity is
controlled by an electric field, which is often the input quantity.
 The phenomenon where the conductivity of the semiconductor is
modulated by an electric field applied normally to the surface of the
semiconductor is called field effect, and this principle is brought into
operation by extending the depletion region deep into the bulk of the
semiconductor.
 Junction Field-effect Transistor (JFET):- In a junction FET, the control
voltage modulates the depletion width of a reverse-biased p –n junction
which, in turn, varies with the various parameters of the device.
 Insulated Gate Field-effect Transistor (IGFET):- The IGFET is also
called the metal-oxide-semiconductor field-effect transistor (MOSFET). In this,
the metal gate electrode is separated from the semiconductor by an insulator.
 Metal-semiconductor Field-effect Transistor (MESFET):- If the MOS
junction is replaced by a direct metal-semiconductor contact, i.e., a Schottky
barrier, it is called metal-semiconductor FET (MESFET). A MESFET is similar
to a JFET except for the following differences:(i) It has a single gate (ii) The
gate is formed by a metal-semiconductor junction
THE FIELD-EFFECT TRANSISTOR
Comparison between the BJT and the FET
CONSTRUCTION OF THE JFET
 The JFET is a three-terminal device whose one terminal is capable of
controlling the current between the other two.
 In JFETs, the width of a junction is used to control the effective crosssectional area of the channel that conducts current.
 JFETs are basically of two types: n-channel and p-channel.
Construction of n-channel JFET
CONSTRUCTION OF THE JFET
 The n-channel JFET consists of a uniformly doped n-type silicon
semiconductor bar with ohmic contacts at both ends and semiconductor
junctions made on either sides of the bar.
 The top portion of the n-type channel is connected through the ohmic
contact to a terminal called the drain (D) while the lower end is connected
to the terminal referred to as the source (S ).
 The two p-type materials, fabricated on the two sides, are connected
together and then to the third terminal called gate (G).
 The source terminal gets its name from the fact that the carriers
contributing to the current flow move out from the external circuit into the
semiconductor at this electrode.
 The carriers travel through the bulk of the semiconductor and are
subsequently collected at the drain electrode.
 The gate is called so because it controls the flow of charges though the
bulk.
CONSTRUCTION OF THE JFET
 With proper biasing of the device, current is allowed to flow from the
source and gets collected at the drain terminal of the bar.
 As the drain current (ID) flows through the channel, a reverse-bias
between the two p-regions and the channel reduces the effective width of
the channel.
 As the effective width of the conducting channel has a striking effect on
the resistance of the channel, the current flowing through it also varies
correspondingly.
 The electrons in the n-region move from the source to the drain region;
they are carried by majority carriers that drift through the channel.
 The majority carriers enter the channel region through the source
terminal and leave the channel through the drain terminal, in agreement
with the naming of the drain and the source terminals.
 In the absence of any applied potentials at the two p –n junctions, the
JFET is under no-bias condition.
 The result is a depletion region at each junction that resembles the
same region of a junction diode under no-bias conditions.
 For normal operation, the current enters the channel through the drain
and as it flows through the channel the voltage drop constantly decreases.
 This can be a linear variation for low values of current.
CONSTRUCTION OF THE JFET
 The FETs have considerably higher input impedance as compared to
BJTs.
 It is evident that the control voltage is applied to a reverse-biased
junction. So, the FET has a negative temperature coefficient at high
current levels.
 This characteristic leads to a more uniform temperature distribution
over the device area and prevents the FET from thermal runaway, which
is a major point of concern in bipolar transistors.
 The device is thermally stable, even when the active area is large and
when many such devices are connected in parallel.
 Because FETs are unipolar devices, they hardly suffer from any
minority-shortage effects, and thus, have higher switching speeds and
higher cut off frequency.
 This makes their operation rather smooth. In addition to this they are
square-law devices, i.e., inter-modulation and cross-modulation products
are much smaller than those of a bipolar transistors.
BIASING OF THE JFET
 Let us now study the operation of the device with respect to the
characteristics of an n-channel JFET.
 We shall consider two different cases in this regard.
 When VGS 0 V, VDS some positive value: a positive voltage VDS has
been applied across the channel and the gate has been connected directly
to the source to establish the condition VGS 0 V.
State of the device with zero source–gate voltage
and positive drain–source voltage