Transcript Artes3 Phase2

Avionics Architecture
December 2008
Avionics
•
•
•
•
Hardware & Software
Processor, Buses, Equipments
Command & Control
Telecommand & Telemetry
•  between 30 and 70 % of the
Plateform development cost
(typically 50 % for EO satellite)
30 November 2009
ULG - Avionics Overview
2
Avionics: Overview
PCDU
Platform
Equipments
Payload
Instruments
OBC
OBSW
•AOCS Sensors
•PWR System
•THERM System
•RF System
•…
•Optical
•Scientific
•Telecom
•Radionavigation
•…
Ground
Segment
30 November 2009
ULG - Avionics Overview
3
Avionics: Overview
PCDU
Platform
Equipments
Control
(CTRL)
Command
(CMD)
•AOCS Sensors
•PWR System
•THERM System
•RF System
•…
OBC
OBSW
Reception
(Rx)
Data
(DAT)
Transmission
(Tx)
Telemetry
(TM)
Telecommand
(TC)
Uplink
(UL)
Command
(CMD) Control
Spacelink
(CTRL)
Payload
Instruments
•Optical
•Scientific
•Telecom
•Radionavigation
•…
Downlink
(DL)
Ground
Segment
30 November 2009
ULG - Avionics Overview
4
Avionics: Overview (cont.)
PCDU
Platform
Equipments
Remote
Terminal
Unit
CDMU
PDHU
Payload
Instruments
MM
Low Throughput
(e.g. S Band)
High Throughput
(e.g. X Band)
Ground Segment
30 November 2009
ULG - Avionics Overview
5
Avionics: Redundancy
30 November 2009
ULG - Avionics Overview
6
Avionics: Hostile Environment
•
Temperature: extreme conditions
• Temperature range solar cells
-150  +100 °C
• Packaging, isolation and heaters: reduction to -20  +50 °C
• Commercial electronics don’t fit the bill :
0  70 °C
(mil range -55  +125 °C)
•
Ion radiation : electron, proton, heavy ion (solar flare, van Allen belts)
• Cumulated Effect:
• Modification of the component characteristics
• Single Event Effects:
•
•
•
•
•
30 November 2009
SET: Single Event Transient (glitches)
SEU: Single Event Upset
(swap)
SEL: Single Event Latchup (CMOS)
SEB: Single Event Burnout (MOSFET)
SEGR: Single Event Gate Rupture
ULG - Avionics Overview
non destructive
non destructive
destructive
destructive
7
Avionics: Protection Means
• Radiation Protections
•
•
•
•
•
Shielding
Box design
Positioning in the S/C
Technology choices
Build in electronic protection
• Fault Tolerance
• Ability to support temporary or definitive modification or suppression of
functionality
• Redondancy
•
•
•
•
Processing: Spatial or Temporal Redundancy and Majority Voting
Duplicate the system: when a system is faulty, switch on the other one
Permit to eliminate the faulty system from the decision path (TMR technology)
Data Redundancy through coding, (RS, CRC, etc)
• Error Detection and Correction (EDAC) on memory
• Memory scrubbing to “clean” changed memory
30 November 2009
ULG - Avionics Overview
8
OB Processor: Evolution
Mips
200
32 bits
14 MIPS
Sparc V7
32 bits
Pipe Line
Multi Core
32 bits
84 MIPS
Sparc V8
Cache
100
16 bits
2 MIPS
CPU Only
50
Mil Std
14
4
2
30 November 2009
ULG - Avionics Overview
9
OB Memory
• Memory types
• PROM (Programmable Read Only Memory)
16 – 256 KB
Board boot and init SW
• EPROM (Electrically Programmable Read Only Memory such as Flash)
2 – 8 MB
the mission SW boot container
• SRAM (Static Random Access Memory)
4 – 16 MB;
the workplace that contains executing SW and variables
• SDRAM (Synchronous Dynamic Random Access Memory)
16 to 512 MB
slower RAM typically used for mass storage
SRAM: data bit is stored in the state of a flip-flop (No power for Data Retention)
DRAM: data bit is stored in the electric charge of a nano capacitor (Frequent Refresh Cycles, Volatile)
ROM: uses a metal mask to permanently enable/disable selected transistors instead of storing a charge in them
FLASH: a kind of EEPROM erased and written in large blocks, read in a random access fashion (Non Volatile)
30 November 2009
ULG - Avionics Overview
10
Atmel AT697 Leon Main Features
• Synthesisable Open Source VHDL
model of a 32-bit SPARC V8
• Caches: 16 KB Data, 32 KB
instructions
• Self standing computer: need only
external clock and memory
• 2 timers + watchdog
• 2 UART, 32 parallel I/O
• Fault tolerant (parity, EDAC, TMR)
• Separate DSU (Debug Serial Unit)
with normal serial line interface
and transaction/instruction trace
buffer with 512 entries
• Integrated PCI interface (50 % of
chip)
• Virtual latchup free (70
MeV.cm2/mg)
• Radiation up to 300 Krads (Si)
SPARC = Scalable Processor ARChitecture = RISC (Reduced Instruction Set Computer) – 32 bit
RISC = Simple instruction set, simple CPU, target = 1 instruction per cycle (without memory R/W)
simple compiler, but needs 40 % bigger code size, better code optimisation
SUN SPARC strong points: One of the best performance & power figures per gate
SPARC architecture is no longer evolving but still holds up against other CPU designs
30 November 2009
ULG - Avionics Overview
11
Proba 2 ADPMS some pictures
The LEON processor board (unfolded)
ADPMS under test
1,5 Watt
300 gram
30 November 2009
ULG - Avionics Overview
12
OB Storage
• Playing Tapes Storage
(Till 2000)
mass memory was using back and forward playing tapes.
• Solid State Mass Memory
(Nowadays)
• Processor board can have 512 MB SDRAM Mass memory
• extra board could hold a GB (with battery back-up)
• Very big Mass Memory units with almost unlimited size can
be made in a very compact way (SDRAM or flash EPROM)
• Interface through fast serial links (E.g. SpaceWire)
• Mostly used for high resolution image satellites
(e.g. 12 TB at EOL for Sentinel 2)
SDRAM, DDR SDRAM, FeRAM, MRAM, CRAM, PRAM
30 November 2009
Storage Capacity, Transfer Data Rate,
Power for Data Retention, Power for Data Access,
Write Endurance, Sensitivity to Single Event Effects
High Speed Error Detection, High Speed Error Correction,
File Management System, Hardware Software Partitioning, Simultaneous Accesses
ULG - Avionics Overview
13
OB Coms: Budget
Flow (Proba 2)
From -> To
Mbps
Ground  Spacecraft
2
TC/TM channels
0,01
TM Packets
TM  ground
2 x 66
AOCS control
OBSW  Eqts
0,1
AOCS telemetry
Eqts  OBSW
0,1
Payload control
OBSW  Payload
0,1
Payload Telemetry
Payload  OBSW
0,01
Spacecraft SW housekeeping
Eqts  OBSW
0,01
REM context writing
OBSW  REM
0,01
REM Watchdog kicking
REM  OBSW
0,01
PCM/PDM control
OBSW  PCM/PDM
0,01
PCM/PDM Telemetry
PCM/PDM  OBSW
0,01
Eqts  OBSW
0,01
REM (TM)  ground
0,01
Payload  TM
20
TC segments
TM/TC CLCW protocol feedback
Spacecraft HW housekeeping
REM housekeeping
Payload Data TM packets
30 November 2009
ULG - Avionics Overview
14
OB Comms: Taxonomy
On Board Communications
Digital
Multi Drop Buses
Point-to-Point Links
Single Master
OBDH
Analog
Multi Master
Mil-Bus*
I2C
CanBus*
Point-to-point
Serial Line
Spacewire*
Digital Converter
PacketWire RS-422
Switchable Outputs
Statuses
RS- 485
Trade offs to be made:
•Power consumption
•Silicon surface, board surface
•Connectors and wiring harness (6 to 10 % of weight of a satellite)
•Performance (throughput, response time)
•Isolation and fault propagation
*may be redundant
•Intelligence required at slave end
•Required processing overhead
Total harness weight (cables and connectors) may reach 6 to 10% of total satellite mass
On going studies investigate on board wireless communications
30 November 2009
ULG - Avionics Overview
15
MilBus Basics
Nominal
•
•
•
•
•
•
•
•
•
•
Redundant
From aircraft industry
Mil-Std-1553-B Standard
Multi Drop Bus
Master/Slave
Single cable
Half Duplex
Asynchronous
Redundant (cross strapping)
1 Mbps (650 Kbps effective)
Manchester Bi Phase Coding
Remote
Terminal
Equipment
Remote
Terminal
Bus
Controller
Equipment
Equipment
Equipment
1 Msg = 1 to 32 Words
BC  RT
Rx Cmd
Data Word Data Word
RT  BC
Tx Cmd
Answer Time
12 µs
RT  RT
Rx Cmd
Tx Cmd
……………
Data Word
Status Word Data Word
Answer Time
12 µs
Answer Time
12 µs
……………
Status Word
Data Word Data Word
Status Word Data Word
……………
Data Word
Inter Msg
4 µs
Inter Msg
4 µs
Answer Time
12 µs
Status Word
Inter Msg
4 µs
1 Word = 16 Bits
1
CMD
2
3
4
5
6
RT @
7
8
9
10
11
T/R
30 November 2009
13
14
RT Address
15
16
RT @
Err Inst Svc
ULG - Avionics Overview
17
18
# Words
Data
DAT
STS
12
19
20
P
P
Reserved
Bsy
P
16
Reconfiguration Module
• Manages:
• The watchdog and associated computer reset and switch-over logic
• The active and cold standby computer
• The OBSW version to be loaded at start-up
• It can as well contain:
• Context memory:
• Serves as memory for time stamped logs of reconfiguration
module, boot and application SW
• Is not reset by a computer boot and regularly transferred to
the ground.
• Emergency TC hardware decoder and pulse generator
• Central date and time system
30 November 2009
ULG - Avionics Overview
17
Spacewire Basics
•
•
•
•
High Speed Serial Link
Fairly Simple
High data rate (up to 400 Mbps)
Low power consumption
•
Promoted by ESA, based on IEEE 1533, DS
Link, Transputer Technology
Physical interface requires LVDS-tranceivers
•
•
Packet based <Destination
Address><Cargo><End_of_Packet>
•
SpaceWire Router connects a number of
SpaceWire link interfaces (receiver to
transmitter ports)
Group Adaptive Routing: group of links may be
configure to increase throughput (bandwidth
sharing) or fault tolerance
Allow for different topologies following use
needs
•
•
30 November 2009
ULG - Avionics Overview
18
Avionics: Space Link
• Radio Frequency
•
•
•
•
•
L-Band, S-Band, X-Band (Science Data)
Delay and Disruption Tolerant
Tracking and Ranging
Telecommand Uplink
Telemetry Downlink
30 November 2009
ULG - Avionics Overview
19
TC Telecommands
•
Receives TC bitstream from
antenna/receiver
• Hardware decoding of TC data streams:
• Decoding bitstreams, error detection and
correction, de-randomisation, overrun
detection
• Isolation of CLTU Command link
Transmission Unit (which can contain
several TC’s)
• Generate FAR Frame Analysis Report for
CLCW, send to TM module (COP-1
protocol)
• Sends emergency TC’s directly to
associated pulse generators
•
• Sending of TC’s to SW decoder
Pulse generation (Pulse Distribution Unit)
• Generates and distributes pulses without
software intervention (reliability,
precision)
30 November 2009
ULG - Avionics Overview
20
TM Telemetry - Sources
• Sources of Telemetry allocated to separate VC Virtual
Channels
• Hardware generated TM’s:
• Emergency telemetry: reporting of essential Telemetry: SW
independent – low bandwidth <0,2 Kbps
• Context memory (REM) dumps - < 6Kbps
• Processor generated TM
• Event driven TM’s, housekeeping, off-line and Mass Memory
data… See SW design
• TM from other sources (payloads, instruments) that inject
directly TM without OBSW intervention
• Idle packet generation: to keep the space link operational
and synchronised if no real TM is available
• VCM (Virtual Channels Multiplexer):
• Time multiplexes VC’s according to BAT (Bandwidth
Allocation Table) on a per frame basis
30 November 2009
ULG - Avionics Overview
21
Telemetry Encoder
• Handles the serialised TM frames:
• Addition of Reed-Solomon Error Detection and
Correction symbols
• Pseudo-randomisation (to ensure bit transition
density and avoid Tx DC components)
• Optional Non-Return-to-Zero Mark encoding
• Convolutional Encoding, such as Viterbi (doubles
the bit rate)
• Optional Split-Phase Level modulator (doubles bit
rate)
• Feed bitstream to radio amplifier/transmitter
30 November 2009
ULG - Avionics Overview
22
OBC: System on Chip
• Saab Space, available in 2008 in Atmel ATC18RHA
radiation hard 180 nm standard cell ASIC technology
• LEON2-FT Fault Tolerant SPARC V8 processor, 86
MIPS@100 MHz + FPU
• SPARC V8 Reference Memory Management Unit (MMU)
• Caches: 32 KB instruction, 16 KB data cache
• Extended Debug Support Unit (E-DSU) with 4096 trace
lines
• EDAC and automatic scrubbing on large SDRAM,
Memory Copy Controller
• 3 High-Speed UART’s
• Three MIL-STD-1553B bus interfaces
• OBDH bus Central Terminal
• 3 PacketWire Receivers & Transmitters
• 8 ECSS-E-50-12A SpaceWire Interfaces capable up to
200 MHz/160 Mbps, Hardware support for Remote
Memory Access Protocol.
• 2 Controller Area Network (CAN) interfaces supporting
up to 1 Mbps
30 November 2009
ULG - Avionics Overview
23
PROBA 1
Proba 1
•Centralized (star) architecture
+ Simple design, direct connection with the OBC
+ Well adapted to off the shelf equipment integration
- Modularity
- Harness
Magnetometers
(2)
•Structure
29kg
24kg
•Instruments
12kg
Solar
Array
Battery
Reaction Wheels
(4)
• Mass:
•Power
SREM
•AOCS
PCS
AOCS I/F
DEBIE
Magnetotorquers
(4)
CHRIS
DHS
•Avionic & data
processing
• RF
• Harness
PPU
GPS Receiver
9.5kg
8.5kg
6kg
8kg
Imagers
Other
Payloads
Head
Star Tracker (2)
Head
30 November 2009
Receivers (2)
Transmitters
(2)
Power line
Digital Control line
ULG - Avionics Overview
24
30 November 2009
Bus architecture:
+ std protocol and communication schemes for all nodes
+ modularity/ testablity
+ Bus traffic solved with central arbitration (CAN, 1553) or protocal arbitration (CAN,
Ethernet)
-I/F component must ULG
be developped
- Avionics Overview
25
- Bus redundancy
PROBA 2 Architecture
•Proba 2
• Internal busses (industrial standards)
• Main Boards/ generic communication (analog/
digital I/Os, serial lines)
PCI
ARBITER
PCI
ARBITER
Nominal PCI BUS
MAIN
PROCESSOR
MODULE
CAMERA &
MASS MEMORY
MODULE
TELEMETRY &
TELECOMMAND
MODULE
SPACECRAFT
INTERFACE
MODULE
Redundant PCI BUS
DATA
ACQUISITION
MODULE
EMERGENCY
TELECOMMAND
MODULE
DATA
ACQUISITION
MODULE
SPACECRAFT
INTERFACE
MODULE
TELEMETRY &
TELECOMMAND
MODULE
CAMERA &
MASS MEMORY
MODULE
MAIN
PROCESSOR
MODULE
I/O BUS
30 November 2009
ULG - Avionics Overview
26
Proba2: Main Facts & Figures
1 failure
tolerant
system
Power distribution
- 24 outputs of 28V / 50W
- current protected with auto restart
- switchable or non-switchable
- battery undervoltage protected
with auto switch off
Budgets:
Processor board
Mass
13 kg
- 100MIPS
Volume 455x160x267mm
- 64 Mbyte SDRAM
Power 17 W
- 4 Mbyte SRAM
- 4 Mbyte Flash
- 256 kByte Prom Telecommand
Centralised
Power conditioning
time
- 2 Mbps uplink capability
- Up to 300W satellite peak power
synchronisation
- 4 virtual channels or more
- Up to 6 solar sections
- configurable N° of MAP-ID
- 56 CPDU channels
Mass memory
- 4 Gbit
Telemetry
Time interfaces
- with EDAC
- 100 Mbps downlink
- 8 programmable clock outputs
Context memory
- 5 virtual channels
- 3 clock datation inputs
- 128 kbyte
- 2 packetwire inputs
- with EDAC
H/W
- full encoding
recovery
Communication Interfaces
H/W
TC decoder
- Up to 25 UART channels
generated
- Up to 6 TTC-B-01 channels
Multi
emergency
- a camera interface
processor
Analogue Interfaces
telemetry
with frame grabber
support
- Up to 80 analogue inputs
- 2 packetwires
- Up to 32 temperature inputs
30 November 2009
ULG - Avionics Overview
Backplane
data throughput
up to 1 GBps
27
Avionics : Proba 3
Coronagraph spacecraft
AOCS & FF
PROPULSION
PROP-RTU
ADPMS
SO 28V
Nominal
SO 28V
ULLIS
RS422 UART
1N 3DOF - Monoprop (HPGP)
MIL-STD-1553
Valve 1
Redundant
Valve 8
...
I/F electronics
SO 28V
DWI+FLS
RS422 UART
SO 28V
RS422 UART
Propulsion DAM
I/F electronics
RF Metrology
PROP-RTU
DAM2
SO 28V
Valve 1
RS422 UART
RS422 UART
...
DAM2
RS422 UART
10mN 6DOF - Marotta
Nominal
SO 28V
BB
I/F electronics
Rx
Valve 16
...
7 S-band antennas
Rf switch
Primary RF metrology
Tx
RS422 UART
RS422 UART
Rf switch
Redundant RF metrology
Tx
Redundant
SO 28V
RS422 UART
500µN EP 2DOF - MiDGITS
SO 28V
BB
I/F electronics
RF Supply
RS422 UART
DMS
RS422 UART
Rx
EP-RTU
Primary
DMS
Redundant
DMS
MPM
MPM
MCPM
MCPM
TTM
TTM
SIM
SIM
DAM0
DAM0
neutraliser
Nominal
SO 28V
RS422 UART
GRW-RTU
Gyros
Nominal
Gyro1
PCCS
I/F electronics
XFCU
SO 28V
...
Gyro I/F
electronics
Redundant
SO 28V
RS422 UART
RS422 UART
I/F electronics
RF Supply
Gyro5
RW I/F
electronics
X4
Coronagraph
electronics
SO 28V
RW1
Redundant
SO 28V
Gyro I/F
electronics
RS422 UART
DAM1
...
RW4
DAM1
RS422 UART (TBC)
ImageWire
Thermal
I/F box
SO 28V
RS422 UART
RW I/F
electronics
Heaters 1 to 6 (TBC) on optical bench
Comms
Primary Tx
NSO 28V
Clock RS422 UART
TM I/F RS422 UART
X4
X2
...
Nominal
Primary Rx
SO 28V
TC I/F RS422 UART
X3
SO 28V
Acc I/F
electronics
Redundant Tx
RFDU
ASSG-RTU
S-band antennas
X3
Accelerometers
Acc5
Coronagraph
optics & telescope
Temp sensors 1 to 12 (TBC) on optical bench
REM
SO 28V
TC I/F RS422 UART
Acc1
Payload
RS422 UART
PMS
SAS I/F
electronics
NSO 28V
Clock
TM I/F RS422 UART
X4
X2
Redundant Rx
PSM
Sun sensor 1*4
Power
PCM
LNA
Nom GPS
receiver
RS422 UART
Solar arrays
Nom GPS PPS
X3
PTC-RTU
PDM0
Li-ion Battery
SPS I/F
electronics
X6
PDM1
X3
Dump resistor
PDM2
Mechanisms
Nominal
Quick-nut
Pyro
Safe & Arm
Solar array release mechanism (primary)
Safe & Arm
Solar array release mechanism (redundant)
4 LED drivers
SO 28V
Redundant
PDM3
RS422 UART
Acc I/F
electronics
RS422 UART
SO 28V
ASC
SAS I/F
electronics
SPS
Sensors
1 to 4
Amplifier
SPS I/F
electronics
CHU3
Cross coupling
LNA
CHU2
18 Heaters
I/F electronics
PDM5
SO 28V
DPU
CHU1
Red GPS
receiver
Heater branches x 2 (for redundancy)
Redundant
Mission-Critical Item
RS422 UART
Quick-nut
Pyro
SO 28V
CPU1
Thermal control
RS422 UART
PDM4
Red GPS PPS
22 Thermistor
I/F electronics
Clock
Power
Low speed data link
High speed data link
Analog signal
Digital signal
Clock
RS422 UART
X6
SO 28V
CPU1
Body panel x 6
Umbilical to launcher
Clock
RS422 UART
4 LED drivers
22 Thermistor
I/F electronics
Umbilical to Occulter
Power & Data Test I/F
2 x 4 LEDs for
RDW
A
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changes
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page 1 of 2
18 Heaters
I/F electronics
CSC Diagram
Avionics Concept for PROBA3
C:\Documents and Settings\bja\Mina dokument\PROBA-3_Avionics_block_diagram.VSD
creator
initial date
Alex Palacios
07-11-08 09:25
print date
last change
07-11-08 09:25
07-11-08 09:25
Courtesy Verhaert Space
30 November 2009
ULG - Avionics Overview
28
PROBA 3:
Occulter spacecraft
PROPULSION
AOCS & FF
PROP-RTU
ADPMS
Nominal
SO 28V
RS422 UART
10-1000µN 6DOF - Nanospace Coldgas
I/F electronics
RS422 UART
Propulsion DAM
Pod 1
I/F electronics
RS422 UART
Rx
...
PROP-RTU
Rf switch
Redundant RF metrology
Tx
SO 28V
BB
DAM2
DAM2
Nominal
SO 28V
10mN 6DOF - Marotta
RS422 UART
RS422 UART
RS422 UART
I/F electronics
Valve 1
Redundant
Valve 8
Rx
...
7 S-band antennas
Rf switch
Redundant
SO 28V
RS422 UART
SO 28V
BB
Pod 4
...
RF Metrology
Primary RF metrology
Tx
RS422 UART
RS422 UART
SO 28V
RS422 UART
I/F electronics
DMS
GRW-RTU
Gyros
Gyro1
...
Nominal
SO 28V
Gyro I/F
electronics
RS422 UART
Primary
DMS
Redundant
DMS
MPM
MPM
MCPM
MCPM
TTM
TTM
SIM
SIM
DAM0
DAM0
DAM1
DAM1
Payload
SO 28V
DARA
NSO 28V (thermal)
RS422 UART (TBC)
Gyro5
RW I/F
electronics
Comms
SO 28V
TC I/F RS422 UART
Primary Tx
SO 28V
Gyro I/F
electronics
RS422 UART
RW4
NSO 28V
Clock RS422 UART
TM I/F RS422 UART
X4
X2
Primary Rx
SO 28V
TC I/F RS422 UART
Redundant Tx
RFDU
...
Redundant
S-band antennas
X3
RW1
X3
RW I/F
electronics
NSO 28V
Clock
TM I/F RS422 UART
X4
X2
Redundant Rx
Accelerometers
REM
Acc1
ASSG-RTU
...
Nominal
Acc5
Solar arrays
Power
SO 28V
Acc I/F
electronics
X3
RS422 UART
Li-ion Battery
X6
X3
SAS I/F
electronics
Dump resistor
Sun sensor 1*4
LNA
PMS
Nom GPS
receiver
RS422 UART
Nom GPS PPS
PSM
PTC-RTU
SO 28V
SPS I/F
electronics
Redundant
ASC
SAS I/F
electronics
SPS I/F
electronics
4 LED drivers
PDM1
22 Thermistor
I/F electronics
PDM2
18 Heaters
I/F electronics
PDM3
SO 28V
DPU
CHU2
CHU3
Cross coupling
CHU1
Red GPS
receiver
PDM0
2 x 4 LEDs for
OPS
Thermal control
RS422 UART
Red GPS PPS
LNA
Quick-nut
Pyro
SO 28V
RS422 UART
Acc I/F
electronics
Nominal
RS422 UART
PCM
Redundant
RS422 UART
Quick-nut
Pyro
PDM4
SO 28V
CPU1
Heater branches x 2 (for redundancy)
Clock
RS422 UART
Umbilical to Coronagraph
PDM5
4 LED drivers
Power & Data Test I/F
22 Thermistor
I/F electronics
SO 28V
CPU1
Clock
RS422 UART
X6
Mission-Critical Item
Power
Low speed data link
High speed data link
Analog signal
Digital signal
Clock
Body panel x 6
18 Heaters
I/F electronics
A
issue
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changes
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date
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page 2 of 2
OSC Diagram
Avionics Concept for PROBA3
C:\Documents and Settings\bja\Mina dokument\PROBA-3_Avionics_block_diagram.VSD
creator
initial date
Alex Palacios
07-11-08 09:25
print date
last change
07-11-08 09:25
07-11-08 09:26
Courtesy Verhaert Space
30 November 2009
ULG - Avionics Overview
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