Transcript Emerging Research Logic Devices1 PIDS ITWG Emerging New

ERD ITWG
Emerging Research Devices
Working Group
Face-to-Face Meeting
Jim Hutchby - Facilitating
Grand Hotel Steigenburger Petersberg
Rheinblick Room
Koenigswinter (near Bonn), Germany
Wednesday April 2, 2008
8:00 a.m. – 6:00 p.m
1 ERD WG 4/2/08 Koenigswinter FxF Meeting
Work in Progress --- Not for
ERD ITWG
Emerging Research Devices
Working Group
Face-to-Face Meeting
MEMORY DISCUSSION
Victor Zhirnov and Rainer Waser - Facilitating
Grand Hotel Steigenburger Petersberg
Rheinblick Room
Koenigswinter (near Bonn), Germany
Wednesday April 2, 2008
8:00 a.m. – 1:30 p.m
2 ERD WG 4/2/08 Koenigswinter FxF Meeting
Work in Progress --- Not for
Objectives
• To develop quantitative estimates of
performance for the various types of memories
– We need to discuss and agree on the
methodology we use and the numbers we
obtained
– It is highly desirable to document the results,
ideally as a journal publication
• To discuss new possible memory candidates
3 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD ITWG Memory Discussion
Agenda
8:00
8:15
8:30
9:30
10:30
10:45
Review meeting objectives and agenda
Hutchby
Introductory remarks on Memory Discussion
Zhirnov
Nanowire Phase-change memory
Meyyapan
Magnetic Race-Track & Spin-torque Transfer Memories Zhirnov
Break
Quantitative estimates of performance for the various types of
memories
 Engineered barrier
 Ferroelectric
 Nanoelectromechanical
 Fuse/Antifuse
12:00
12:30
Muralidhar & Zhirnov
Waser
Zhirnov
Waser & Akinaga
Lunch
Continue quantitative estimates …..
 Ionic
 Electronic Effects
 Macromolecular
 Molecular
1:30
2:00
Waser & Akinaga
Waser
Zhirnov
Waser
Break - Adjourn Memory Discussion
ERD Business Meeting
4 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Emerging Research Devices Working Group
Hiroyugi Akinaga
 Tetsuya Asai
 Yuji Awano
 George Bourianoff
 Michel Brillouet
 Joe Brewer
 John Carruthers
 Ralph Cavin
 U-In Chung
 Philippe Coronel
 Shamik Das
 Erik DeBenedictis
 Simon Deleonibus
 Kristin De Meyer
 Michael Frank
 Christian Gamrat
 Mike Garner
 Dan Hammerstrom
 Wilfried Haensch
 Shigenori Hayashi
 Dan Herr
 Toshiro Hiramoto
 Matsuo Hidaka
 Jim Hutchby
 Yasuo Inoue
 Adrian Ionescu
 Kohei Itoh
 Seiichiro Kawamura
 Rick Kiehl
 Hiroshi Kotaki
 Franz Kreupl
AIST
Hokkaido U.
Fujitsu
Intel
CEA/LETI
U. Florida
PSU
SRC
Samsung
ST Me
Mitre
SNL
LETI
IMEC
AMD
CEA
Intel
PSU
IBM
Matsushita
IBM
U. Tokyo
ISTEK
SRC
Renesas Tech
ETH
Keio U.
Selete
U. Minn
Sharp
Qimonda
5 ERD WG 4/2/08 Koenigswinter FxF Meeting
 Nety Krishna
 Zoran Krivokapic
 Phil Kuekes
 Lou Lome
 Hiroshi Mizuta
 Murali Muraldihar
 Fumiyuki Nihei
 Dmitri Nikonov
 Wei-Xin Ni
 Yaw Obeng
 Dave Roberts
 Kaushal Singh
 Kentaro Shibahara
 Sadas Shankar
 Thomas Skotnicki
 Satoshi Sugahara
 Shin-ichi Takagi
 Luan Tran
 Ken Uchida
 Yasuo Wada
 Rainer Waser
 Franz Widdershoven
 Jeff Welser
 Philip Wong
 Kojiro Yagami
 David Yeh
 In-Seok Yeo
 Makoto Yoshimi
 In-K Yoo
 Peter Zeitzoff
 Yuegang Zhang
 Victor Zhirnov
Work in Progress --- Not for
AMAT
AMD
HP
IDA
U. Southampton
Freescale
NEC
Intel
NDL
NIST
Air Products
AMAT
Hiroshima U.
Intel
ST Me
Tokyo Tech
U. Tokyo
Micron
Toshiba
Waseda U.
RWTH A
NXP
NRI/IBM
Stanford U.
Sony
SRC/TI
Samsung
SOITEC
SAIT
Freescale
Intel
SRC
ERD Working Group
Objectives (1/2)
 Emerging
Research Memory Technology Discussion
Recommend Technology Entries Transfer/Add/Drop from Section
(Spin Torque transfer MRAM – ERD or PIDS?)
 Memory Application Categories
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 ERD/ERM
Remaining Workshops
Purpose, Topics and Funding
 When and Where
 Format and Length – Integration with ERD FxF Business Mtgs
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 Review
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December Kamakura/Washington ERD Meetings
Decisions
Action Items
Remaining Issues
Discuss ERM/ERD Collaboration & Issues
6 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD Working Group
Objectives (2/2)
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Identify & Discuss other cross ITWG Issues
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Discuss other key issues:
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Design & Systems Drivers
PIDS
FEP
Modeling & Simulation
Metrology
More than Moore
How to expand scope to include MtM?
Should we continue to include “failing” technologies in Logic?
How to include “Best Demonstrated Parameters” for TE’s? (same
or different devices?)
Critical Review: Change message to more positive guide to the
research addressing what may be fundamentally limited TE’s or
continue our fundamental critiques?
Discuss Japan’s ERD WG inputs on Guiding Principles
7 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD ITWG Working Group
Agenda
14:00
14:10
14:30
15:15
15:45
16:15
17:00
17:30
18:00
Review meeting objectives and agenda
Emerging Research Memory Tech Discussion
 Recommend Tech Entries Transfer/Add/Drop
 Memory Application Categories
Remaining ERD/ERM Workshops
 Purpose, Topics and Funding
 When and Where
 Format & Length – Integration with Bus. Mtgs
Review Kamakura/Washington ERD Meetings
 Decisions
 Action Items
 Remaining Issues
Discuss ERM/ERD Collaboration & Issues
Discuss other Cross-ITWG Issues
Discuss Japan ERD’s input on Guide Principles
Discuss other Key Issues
Adjourn
8 ERD WG 4/2/08 Koenigswinter FxF Meeting
Hutchby
Zhirnov
Hutchby, Garner
Hutchby
Garner, Hutchby
ERD X-TWG Leaders
Uchida
Hutchby et al
Work in Progress --- Not for
2008 ERD Working Group Organization
ERD Subcommittees
 Chapter Chair
 Memory
 Logic
 Architecture
 Editors
 ITRS Liaisons
– PIDS
– FEP
– Modeling & Simulation
– Materials
– Metrology
– Design
– More than Moore
9 ERD WG 4/2/08 Koenigswinter FxF Meeting
Leader(s)
Hutchby
Zhirnov
Bourianoff
Cavin
Hutchby, Bourianoff, Cavin
and Zhirnov
Ng, Hutchby
Herr
Shankar
Shankar
Herr
Yeh/Bourianoff
Brillouet
Work in Progress --- Not for
2008 ERD Update Schedule
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April 2 – Memory Workshop
April 2 – ERD Business Meeting
April 3 – 4 – ITRS Meetings (no public conference)
June ? – ERD Presentation draft for July 16 Conference due to Linda Wilson
July 10 – 11 Architecture Workshop & ERD Business Meeting
July 12 – ERD Business Meeting
July 14 – 15 – ITRS Meetings
July 16 – ITRS Public Conference
September 22nd – Logic Workshop
September 23rd – ERD Business Meeting?
August ? – ERD Chapter Update Material Due*
September ? – 2008 ITRS Update Content Frozen*
December 7 – 2009 ERD Chapter Kickoff Meeting in Seoul, Korea?
December 7 – 9 ITRS Meeting in Seoul, Korea
December 10 – ITRS Public Conference in Seoul, Korea
December 14 – 2009 ERD Chapter Kickoff Meeting in San Francisco @IEDM
* ERD typically uses the “update year” to prepare for the following “chapter
re-write year (i.e. 2009” and does not provide an update.
10 ERD WG 4/2/08 Koenigswinter FxF Meeting
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2008 ERD/ERM Workshops
Workshop topic
Date
Location
Meeting
Emerging Research
Memory Devices
April
2008
Bonn,
Germany
ITRS
Spring
meeting
Emerging Research
Architectures
July 10-11
2008
San
Francisco,
CA, USA
Semicon
West
Emerging Research
Logic Devices
Sept.
2008
Tokyo,
Japan
SSDM
Emerging Research
Materials
Nov. 15
2008
Austin,
USA
Emerging Research
Materials
March
2009
Tokyo, Japan
2
22
TX,
MMM*
Specific technology entries
- Performance analysis for the various types of
memories
- Magnetic Race-Track Memory
- Nanowire Phase-Change Memory
- Polymer/Macromolecular Memory
- Chip Multiprocessors
- Memory Architectures
- Morphic Computational Architectures
-Turing-Heisenberg Rapprochement
- Nonlinear response functions
- Devices for “functional diversification”?
- Optimum circuit architectures associated with
novel devices
Materials for Spintronic Devices
- Energetics
- Transitions
- Time scales
- Interactions with external fields
Strongly Correlated Electron Materials
* 53rd Magnetism and Magnetic Materials Conference
11 ERD WG 4/2/08 Koenigswinter FxF Meeting
Work in Progress --- Not for
Action Items (1/2)
1.
Consider to include in the 2009 ERD Chapter the new chart entitled
“Evolution of Extended CMOS” contributed by ERD Japan.
Bourianoff
2.
Strengthen ties between US-EU-Asia. Requires good balance of
representing members from three regions
Hutchby
3.
The best demonstrated parameters are obtained from different
devices. Is it possible to obtain them simultaneously on one
device? We should include a note to this effect.
Bourianoff, Zhirnov
4.
Extend the Mission of ERD to include additional Research Vectors
proposed by the Japan ERD WG. These are Numbers 1 – 4
listed in Item No. 1 above.
Bourianoff
5.
Consider moving to PIDS in 2009: 1) III-V Alternate Channel
Materials, and 2) Low Dimensional Materials. Discuss this
with PIDS. (This discussion has begun.)
Bourianoff
6.
Make the mission of ERD clear. Make it more Globally justified.
Hutchby
7.
Organize an ERD Working Group in Korea
In U. Chung
12 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Action Items (2/2)
8.
Bob Doering argued that the Critical Evaluation Chart gives the
wrong message;
a.We need to re-think this chart
b.This chart assigns a different meaning to red than is used by
all the other ITRS chapters. The other chapters use red to
highlight a major research gap.
c.We should point the directions into which “critical path”
research should be directed.
We need a way to distinguish a Fundamental Limit versus the
Maturity of the Technology Entry
Hutchby
9.
Need a dialog with the Design and Systems Drivers ITWG to
address synergy between the two chapters.
Hutchby,
Bourianoff, Yeh
10.
Discuss/decide upon expanding scope to include Sensors, Actuators,
and Power Sources to encompass More than Moore or Functional
Diversification
Hutchby and
Brillouet
11.
Discuss other materials (in addition to NiO) for Fuse/Anti-fuse
Memory Tech
Zhirnov & Garner
12.
Plan Memory FXF Meeting in Germany for April 2, 2008. Include
Memory Expert Panel.
Zhirnov
13.
Write paper/proposal for NSF Funding for workshops.
Hutchby/Zhirnov
14.
Include Akinaga-san in Memory Working Group
Zhirnov
13 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/ERM Collaboration Discussion
14 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/PIDS Collaboration Discussion
 ETB
Memory transition
 Alternate Channel Materials
 Floating Body Memory
 MRAM and NW PCRAM Cross
15 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/FEP Collaboration Discussion
 Alternate
Channel Materials
 ETB Memories
16 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/Model & Simulation Discussion
 Transport
in Alternative Channel Materials (e.g. strain
effects in p-type III-V’s and Ge)
 Commercially available DFT Models with Excited
States
 Transport in ultra-scaled devices – good model for
scattering to ballistic transition needed.
 Need to simulate I-V curves for on-state and off-state
memory devices listed in ERD.
 Device and process modeling for above bullets.
17 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/Design Discussion
between analog and digital devices – where
are the opportunities for analog devices in a power
constrained environment?
 How would availability of 3-D transistors or 3-D
functions change your lives? (Nano-wires oriented
vertically).
 What design tool innovations are required to
incorporate new devices.
 Newer current sensing with Ion/Ioff of 10 or less?
 Boundary
18 ERD WG 4/2/08 Koenigswinter FxF Meeting
Work in Progress --- Not for
ERD/RF & Analog MS Discussion
 We
are recommending consideration of 8-12 bits
precision analog for main stream info processing
 High precision A/D conversion (8-12 bits)
 Spin torque oscillators and/or RTD oscillators?
Where’s the model for STO’s?
 Do you consider MEMS RF switches?
19 ERD WG 4/2/08 Koenigswinter FxF Meeting
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ERD/Metrology Collaboration Discussion
 Small
geometrical metrologies, obtaining a
reasonable signal/noise ratio – study, determine, and
manage noise sources. Extract the signal from noise.
 Issue of contamination of nano-scaled devices
 Time resolved magnetic measurements.
 Ability to perform real time measurements, e.g. phase
transitions.
 Wide band characterizations of rf devices – above
100 GHz.
 Questions from Metrology
– Near mfg?
 MRAM – Near mfg? – In production. Spin torque RAM
 Contamination  PCM
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21 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Critical Review of 2007 ERD
Toshiro Hiramoto
University of Tokyo
1. Guiding Principles
2. Scope
3. Difficult Challenges
4. Taxonomy
22 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Guiding Principles: Beyond CMOS
1. Computational State Variable(s) other than Solely Electron Charge
2. Non-thermal Equilibrium Systems
3. Novel Energy Transfer Interactions
4. Nanoscale Thermal Management
5. Sub-lithographic Manufacturing Process
6. Emerging Architectures
In this case, architecture is the functional arrangement of interconnected devices
that includes embedded computational components. These architectures could
utilize, for special purposes, novel devices other than CMOS to perform unique
functions. Does this GP include both topics below or just the second topic?
– New architectures with conventional MOSFET devices
– New architectures with beyond CMOS devices on CMOS infrastructure.
23 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Guiding Principles – cont’d
(a) First five principles
- The same as the 2005 version
- Well recognized as beyond CMOS guiding principles
(b) The last principles
- Divided into two principles or describe clearly that
there are two approaches (?)
(1) New architectures with conventional devices
(2) New architectures with beyond CMOS devices
on CMOS infrastructure.
24 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Research Needs (Beyond CMOS, US)
1.
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Information processing technologies using state variables other than charge?
Devices that operate out of equilibrium with the thermal bath?
Information transfer (i.e., interconnect) mechanisms that are not electromagnetic in
nature?
Phonon engineering for advanced thermal management?
Directed self-assembly for information processing applications including size, shape
and position control of complex nanostructures?
Devices that are amenable to non-Boolean logic?
Metrology and characterization for nanoscale information processing technologies?
Modeling and simulation for future information processing technologies?
Hybrid/heterogeneous information processing technologies including design
methodologies?
Design and fabrication of very complex information processing technologies using
defective/unreliable components?
Environmentally benign manufacturing materials and processes for nanoscale
information processing technologies?
Fundamental limits dictated by physics for nanoscale information processing
technologies?
Metrics to gauge the potential for success of nanoscale information processing
technologies?
25 ERD WG 4/2/08 Koenigswinter FxF Meeting
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New Research Needs (Japan)
14. More than Moore?
15. Memory
16. Functional CMOS design with beyond CMOS devices
and new materials
17. Architecture with conventional devices
- 3D
- Memory/Logic
- BDD
18. Self learning circuit network?
- device - circuits
- architecture
26 ERD WG 4/2/08 Koenigswinter FxF Meeting
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Back up Slides
27 ERD WG 4/2/08 Koenigswinter FxF Meeting
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