Transcript Emerging Research Logic Devices1 PIDS ITWG Emerging New

ITRS/ERD ITWG
Working Group FxF Meeting
Maturity Evaluation for Selected
Beyond CMOS Emerging Technologies
Jim Hutchby - Facilitating
San Francisco Marriott Hotel
55 Fourth Street, San Francisco, CA
Nob Hill D Room
Yerba Buena Level
Sunday, July 13
9:00 a.m. – 5:45 p.m
1 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Emerging Research Devices Working Group

Hiroyugi Akinaga
 Tetsuya Asai
 Yuji Awano
 George Bourianoff
 Michel Brillouet
 Joe Brewer
 John Carruthers
 Ralph Cavin
 U-In Chung
 Philippe Coronel
 Shamik Das
 Erik DeBenedictis
 Simon Deleonibus
 Kristin De Meyer
 Michael Frank
 Christian Gamrat
 Mike Garner
 Dan Hammerstrom
 Wilfried Haensch
 Tsuyoshi Hasegawa
 Shigenori Hayashi
 Dan Herr
 Toshiro Hiramoto
 Matsuo Hidaka
 Jim Hutchby
 Adrian Ionescu
 Kohei Itoh
 Kiyoshi Kawabata
 Seiichiro Kawamura
 Rick Kiehl
 Hiroshi Kotaki
AIST
Hokkaido U.
Fujitsu
Intel
CEA/LETI
U. Florida
PSU
SRC
Samsung
ST Me
Mitre
SNL
LETI
IMEC
AMD
CEA
Intel
PSU
IBM
NIMS
Matsushita
IBM
U. Tokyo
ISTEK
SRC
ETH
Keio U.
Renesas Tech
Selete
U. Minn
Sharp
Atsuhiro
Kinoshita
 Franz Kreupl
 Nety Krishna
 Zoran Krivokapic
 Phil Kuekes
 Lou Lome
 Hiroshi Mizuta
 Murali Muraldihar
 Fumiyuki Nihei
 Dmitri Nikonov
 Wei-Xin Ni
 Ferdinand Peper
 Yaw Obeng
 Dave Roberts
 Kaushal Singh
 Sadas Shankar
 Thomas Skotnicki
 Satoshi Sugahara
 Shin-ichi Takagi
 Ken Uchida
 Yasuo Wada
 Rainer Waser
 Franz Widdershoven
 Jeff Welser
 Philip Wong
 Kojiro Yagami
 David Yeh
 In-Seok Yeo
 In-K Yoo
 Peter Zeitzoff
 Yuegang Zhang
 Victor Zhirnov
2 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Toshiba
Qimonda
AMAT
AMD
HP
IDA
U. Southampton
Freescale
NEC
Intel
NDL
NICT
NIST
Air Products
AMAT
Intel
ST Me
Tokyo Tech
U. Tokyo
Toshiba
Waseda U.
RWTH A
NXP
NRI/IBM
Stanford U.
Sony
SRC/TI
Samsung
SAIT
Freescale
Intel
SRC
Objectives
 Workshop
(For each of the seven technologies)
– Receive expert inputs (pro & con)
– Clarify status, potential, and remaining challenges
– Formulate discussion/decision points to be
considered in the Sunday ERD/TWG meeting
 Emerging Research Devices Working Group Mtg.
– Discuss and reach approximate consensus on
potential & challenges for each technology
– Reach approximate consensus on 1 or 2 “Beyond
CMOS” technologies sufficiently mature to benefit
from accelerated engineering development
3 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
ERD “Beyond CMOS” Technology Selection Mtg
Agenda – Sunday, July 13
9:00
9:10
9:20
9:45
10:45
12:20
Welcome and Introductions
Hutchby
Background & ERD Meeting Objectives
Hutchby
Review Process for selecting 1 or 2 beyond CMOS
emerging technologies
Discuss Technologies
9:45 NEMS Switch Technology
10:05 Spin Torque Transfer Technology
10:25 Carbon-based Nanoelectronics
Break
11:00 Atomic Switch / Electrochemical Metal Switch
11:20 Collective Spin Devices (including M-QCA)
11:40 Single Electron Transistors
12:00 CMOL and FPNI
Lunch (Working)
4 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
ERD “Beyond CMOS” Technology Selection Mtg
Agenda – Sunday, July 13 (Cont’d)
12:50
1:00
1:45
2:00
2:30
2:45
3:00
5:15
5:30
5:45
Preliminary vote on technologies – Majority voting process
Discuss preliminary results
Second vote on technologies
Discuss the one or two leading technologies resulting from vote
Final vote on the leading technology(ies) to determine if we have
approximate consensus (75% of those voting) to recommend one
or more for roadmapping and enhanced engineering development
Decide next steps in roadmapping the chosen technology(ies)
Regular ERD Business Meeting
3:00 Planned ERD Workshops
Hutchby
3:15 ERD Device Workshop (Sept. 22-23) Discuss
Bourianoff
4:00 Summary of Nanoarchitecture Forum
Cavin
4:45 Review of ERM plans & coupling with ERD
Garner
Review definition of “Beyond CMOS”
Hutchby
Review Action Items
Hutchby
Adjourn
5 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Process Proposed for Selecting “Beyond CMOS”
Technology for Enhanced Engineering Development

Receive and evaluate White Papers from Proponents

Conduct an ERD Telecon to briefly review and discuss
the White Papers to provide feedback prior to Workshop.

Receive proponent/opponent expert inputs on the
candidate technologies on Saturday, July 12.

Select one or two candidate technologies via discussion,
majority voting, and forming an approximate consensus
on Sunday, July 13.

Report results to IRC on July 14 or 15.

Write a report by August 31.
6 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Decision Making & Majority Voting Scheme

Each member of ERD WG will be given a maximum of 3
votes to use in voting for their top 3 choices among the
candidate technologies (Majority Voting scheme)
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Only 0 or 1 vote can be cast for any candidate technology
Member does not have to use all 3 votes, but cannot use more
than 3 votes.
All members can participate in the straw vote.
ERD WG members present in the July 12 Workshop & the July 13
FxF meeting will be eligible to vote at July 13 meeting.
The Candidate Technologies will be ordered according to
which received the largest number of votes.
Consensus approval will be our goal, but a 75%
affirmative vote will be required as a minimum. This is
what is meant by the term approximate consensus.
7 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
2008 ERD Working Group Organization
ERD Subcommittees
 Chapter Chair
 Memory
 Logic
 Architecture
 Editors
 ITRS Liaisons
– PIDS
– FEP
– Modeling & Simulation
– Materials
– Metrology
– Design
– More than Moore
8 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Leader(s)
Hutchby
Zhirnov
Bourianoff
Cavin
Hutchby, Bourianoff, Cavin
and Zhirnov
Ng, Hutchby
Herr
Shankar
Shankar
Herr
Yeh/Bourianoff
Brillouet
Work in Progress --- Not for
2008 ERD Update Schedule
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April 2 – Memory Workshop
April 2 – ERD Business Meeting
April 3 – 4 – ITRS Meetings (no public conference)
June ? – ERD Presentation draft for July 16 Conference due to Linda Wilson
July 10 – 11 Architecture Workshop & ERD Business Meeting
July 12 – ERD Business Meeting
July 14 – 15 – ITRS Meetings
July 16 – ITRS Public Conference
September 22nd – Logic Workshop
September 23rd – ERD Business Meeting?
August ? – ERD Chapter Update Material Due*
September ? – 2008 ITRS Update Content Frozen*
December 6 – 2009 ERD Chapter Kickoff Meeting in Seoul, Korea?
December 7 – 9 ITRS Meeting in Seoul, Korea
December 9 – ITRS Public Conference in Seoul, Korea
December 14 – 2009 ERD Chapter Kickoff Meeting in San Francisco @IEDM
* ERD typically uses the “update year” to prepare for the following “chapter
re-write year (i.e. 2009” and does not provide an update.
9 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
2008 ERD/ERM Workshops
Workshop topic
Date
Emerging Research
Memory Devices
April
2008
Emerging Research
Architectures
July 10-11
2008
San
Francisco,
CA, USA
Emerging Research
Logic Devices
Sept.
2008
Tokyo,
Japan
Emerging Research
Materials
Nov. 10
2008
Austin,
USA
Emerging Research
Materials
March
2009
Tokyo, Japan
2
22
Location
Meeting
Bonn,
Germany
ITRS
Spring
meeting
Done
Semicon
Done
West
SSDM
TX,
MMM*
Specific technology entries
- Performance analysis for the various types of
memories
- Magnetic Race-Track Memory
- Nanowire Phase-Change Memory
- Polymer/Macromolecular Memory
- Chip Multiprocessors
- Memory Architectures
- Morphic Computational Architectures
-Turing-Heisenberg Rapprochement
- Nonlinear response functions
- Devices for “functional diversification”?
- Optimum circuit architectures associated with
novel devices
Materials for Spintronic Devices
- Energetics
- Transitions
- Time scales
- Interactions with external fields
Strongly Correlated Electron Materials
* 53rd Magnetism and Magnetic Materials Conference
10 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Beyond CMOS – ERD/ERM
Concepts, Definition proposals
Jim Hutchby and T. Hiramoto
Rev 6
06/27/08
11 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
2007 ITRS Executive Summary Fig 5
[updated for 2007]
[2007 –
add Definitions;
Update Graphic]
Moore’s Law & More
More Diversification
than Moore: Diversification
Functional
(More than Moore)
[Geometrical & Equivalent scaling]
Baseline CMOS: CPU, Memory, Logic
More
Moore:
Miniaturization
Moore)
(More
Scaling
Traditional
ORTC Models
Analog/RF
HV
Power
HV
Passives
Power
Passives
32nm
Non-digital content
System-in-package
(SiP)
Co
m
bi
ni
ng
65nm
45nm
Biochips
Interacting with people
and environment
130nm
90nm
Sensors
Actuators
Information
Processing
So
C
Digital content
System-on-chip
(SoC)
22nm
.
.
.
V
an
d
Si
P:
Hi
gh
er
Va
lu
eS
ys
te
m
s
Beyond CMOS
12 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
2007 ITRS “Moore’s Law and More”
Alternative Definition Graphic
Baseline
CMOS
Memory
RF
HV
Power
Passives
Sensors,
Actuators
Bio-chips,
Fluidics
“More Moore”
“More than Moore”
Computing &
Data Storage
Sense, interact,
Empower
Heterogeneous Integration
System on Chip (SOC) and System In Package (SIP)
Source: ITRS, European Nanoelectronics Initiative Advisory Council (ENIAC)
13 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
2008 ITRS “Beyond CMOS”
Baseline Ultimately
Functionally
CMOS
Scaled CMOS Enhanced CMOS
32nm
22nm
16nm
11nm
Ferromagnetic Spin Logic
Nanowire
Electronics Logic Devices Devices
8nm
Multiple gate MOSFETs
Channel Replacement Materials
Low Dimensional Materials Channels
New State Variable
New Devices
New Data Representation
New Data Processing
Algorithms
“More Moore”
“Beyond CMOS”
Computing and Data Storage Beyond CMOS
Source: Emerging Research Device Working Group
14 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Evolution of Extended CMOS
Elements
Existing technologies
New technologies
Beyond CMOS
ERD-WG in Japan
year
15 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Evolution of Extended CMOS
Elements
Existing technologies
ERD-WG in Japan
New technologies
Beyond CMOS
year
16 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
“Beyond CMOS” Definition
“Beyond CMOS” refers to emerging research devices, focused
on a “new switch*” used to process information, typically
exploiting a new state variable to provide functional scaling
substantially beyond that attainable by ultimately scaled CMOS.
Substantial scaling beyond CMOS is defined in terms of
functional density, increased performance, dramatically reduced
power, etc. Examples of Beyond CMOS include: a) molecular
electronic devices, b) spin-based transistors and devices, c)
ferromagnetic logic, etc.
*The “New Switch” refers to an “information processing
element or technology”, which is associated with
compatible storage or memory and interconnect functions.
17 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
Action Items (1/2)
1.
Consider to include in the 2009 ERD Chapter the new chart entitled
“Evolution of Extended CMOS” contributed by ERD Japan.
Bourianoff
In Process
2.
Strengthen ties between US-EU-Asia. Requires good balance of
representing members from three regions
Hutchby
In Process
3.
The best demonstrated parameters are obtained from different
devices. Is it possible to obtain them simultaneously on one
device? We should include a note to this effect.
Bourianoff, Zhirnov
4.
Extend the Mission of ERD to include additional Research Vectors
proposed by the Japan ERD WG. These are Numbers 1 – 4
listed in Item No. 1 above.
Bourianoff
5.
Consider moving to PIDS in 2009: 1) III-V Alternate Channel
Materials, and 2) Low Dimensional Materials. Discuss this
with PIDS. (This discussion has begun.)
Bourianoff
6.
Make the mission of ERD clear. Make it more Globally justified.
Hutchby
7.
Organize an ERD Working Group in Korea
In U. Chung
18 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
In Process
In Process
Action Items (2/2)
8.
Bob Doering argued that the Critical Evaluation Chart gives the
wrong message;
a.We need to re-think this chart
b.This chart assigns a different meaning to red than is used by
all the other ITRS chapters. The other chapters use red to
highlight a major research gap.
c.We should point the directions into which “critical path”
research should be directed.
We need a way to distinguish a Fundamental Limit versus the
Maturity of the Technology Entry
Hutchby
9.
Need a dialog with the Design and Systems Drivers ITWG to
address synergy between the two chapters.
Hutchby,
Bourianoff, Yeh
10.
Discuss/decide upon expanding scope to include Sensors, Actuators,
and Power Sources to encompass More than Moore or Functional
Diversification
Hutchby and
Brillouet
11.
Discuss other materials (in addition to NiO) for Fuse/Anti-fuse
Memory Tech
Zhirnov & Garner
12.
Plan Memory FXF Meeting in Germany for April 2, 2008. Include
Memory Expert Panel.
Zhirnov
Done
13.
Write paper/proposal for NSF Funding for workshops.
Hutchby/Zhirnov
Done
14.
Include Akinaga-san in Memory Working Group
Zhirnov
Done
19 ERD WG 7/12-13/08 San Francisco Workshop & FxF Meeting
Work in Progress --- Not for
In Process