Transcript PowerPC ISA compliant processor overview

Freescale Integrated Communications
Processors Presentation
Freescale Semiconductor General Business Information
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Freescale: The Leader in Communications Processors
Market share leader in communications processors
• Over 185 million units shipped
Continuous innovation and growth
• Proven PowerPC processor architecture
• Unsurpassed communications integration
Broad application across the industry
• 350+ customers with 5000+ designs
• 10th anniversary of PowerQUICC
Microprocessor Report: Analysts’ Choice
Best High Performance Embedded Processor:
MPC8560 PowerQUICCTM III
February 2004
Slide 2
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PowerPC Core Evolution – Platform Scalability
e700 Core
64-Bit PowerPC ISA
Higher CPU & I/O
Performance
Multi-Core
1500-3000+ MHz
8 – 20W
G4
800 – 2000 MHz
6 – 15W
e500
400 – 1700 MHz
2.4 – 8 W
74xx/745x
SIMD
256K on-chip L2
External 2MB L3
85xx Family
Integrated SoC
256K L2, RapidIO
603e
200 – 600 MHz
0.5 -1.2W
High Integration
82xx Family
PCI, SDRAM, CPM
Current
Availability
Higher Frequency
512K L2
100% Pin & S/W
Compatibility
Multi-Core
e700 Core
e700 Platform
3000+ MHz
MPC87xx Series
e600 Core
e600 Platform
MPC86xx Series
2000+ MHz
Fully compatible
with G4
e500 Core
Application Specific
Higher CPU & I/O
Performance
SoC
Higher CPU & I/O
Performance
Application Specific
Integration
Future
Plan
Slide 3
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e500 Platform
1500+ MHz
MPC85xx Series
e300 Core
e300 Platform
MPC83xx Series
Product
Platforms
667+ MHz
Fully compatible
with G2/603e
Core
Nomenclature
Scalable Performance, Integration &
Connectivity
Scalable Performance
e500 Core
e600 Core
e700 Core
86xx
Integrated
Platform
Scalable Connectivity
Interconnect
Host Peripheral Bus:
• PCI, PCI-X
• PCI-Express
• PCMCIA
• 60x, MPX
• Local Bus
System Fabric:
• RapidIO
• SERDES
General Peripherals:
• USB High/Full/Low speed
• USB Full/Low Speed
• I2C, DUART
Networking:
• Utopia
• GMII, MII, RGMII, TBI etc.
• XAUI
Network Acceleration
Security:
Networking Protocols:
• Encryption
• Ethernet (10/100/1000)
• Authentication
• Serial (Tx/Rx)
• Public Key
• HDLC
• RNG
• T1/E1/T3/E3 (TDM)
• DES/3DES/SHA1
• ATM (AAL0,1,2,5, IMA)
• IP (ML/MC-PPP, PPPmux)
• BPON
Scalable Integration
Integration Structures:
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Copper Line
Magenta/SkyBlue Line
OCeaN Integrated Fabric
Coherent System Bus
System Integration:
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Bus Controllers
Timers
DMA
Arbiters
Bridges
Interrupt Controllers
GPIO
Mixed Signal:
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Slide 4
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PLLs/DLLs
D/A, A/D
Clock Data Recovery
TIA, LDD
PQ III
(90nm)
PQ III
PQ II Pro
Memory Controllers:
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DDR SDRAM
DDRII SDRAM
SDRAM
Flash, EPROM
SRAM, DRAM
PQ II
Scalable Compatible Solutions
e300 Core
Future
PQ
PowerQUICC™ Family Roadmap
MPC85XX
MPC8555E
130nm, 90nm
533 MHz-1.5GHz e500 CPU
333 MHz CPM
333 MHz DDR Bus
533-667 MHz DDR2 Bus
130nm, 90nm
266-667 MHz e300 CPU
333 MHz CPM
333 MHz DDR Bus
MPC82XX
0.29µm, 0.25µm, 130nm
200-466 MHz 603e CPU
208-300 MHz CPM
66-133 MHz Bus
MPC8560
MPC8XX
0.32um, 0.18µm
50-133 MHz 8XX CPU/CPM
40-80 MHz Bus
MPC8548E
MPC8541E
MPC85XX
MPC8540
MPC8271/8272
Performance and Features
MPC83XX
Future
85xx
MPC8280/8275
8270
Future
83xx
MPC8349E
MPC8347E
MPC8266/8265/8264
8255/8250
MPC8343E
MPC8260/8255
MPC8247/8248
MPC82XX
MPC83XX
MPC8241/8245
Proposed
MPC860
MPC885/875
MPC866/859T
859DSL/852T
Execution
MPC862/857T
857DSL
MPC8XX
Time
Production
MPC860/855T
2002
Slide 5
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-
2003 2004
2005+
MPC8xx PowerQUICC I
Family Update
February 10, 2005
Freescale Semiconductor General Business Information
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC™ MPC8xx Family Roadmap
MPC885
MPC885
133 MHz CPU/CPM
80 MHz External Bus
ATM, 2X10/100, Security, USB
MPC866
MPC880
MPC859
MPC875
133 MHz CPU/CPM
66 MHz External Bus
ATM Enhancements
MPC862/857T
100 MHz CPU/CPM
66 MHz External Bus
ATM Enhancements
MPC860/855T
80 MHz CPU/CPM
66 MHz External Bus
ATM,10/100,HDLC
Performance and Features
MPC866/859/852T
MPC859DSL
MPC870
MPC852T
MPC862
MPC857T
MPC857DSL
.18µm, 1.8V core,
3.3V I/O
MPC860
MPC850
80 MHz CPU/CPM
50 MHz External Bus
ATM,10BaseT,HDLC, USB
MPC855T
.32µm, 3.3V core,
5V I/O
MPC850
MPC850
2000
-
2002
Slide 7
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2003
2004
MPC866P – Block Diagram and Features
• Efficient architecture integrates an
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16KB
I-cache
8KB
D-cache
Bus Interface Unit
Embedded MMUs
Memory Controllers
Bus Arbitration
Communications Processor
Module (CPM)
Fast Ethernet
Controller
4 Timers
DMAs
DMAs
Baud Rate
Generators
FIFOs
FIFOs
Serial DMA
&
2 Virtual
DMAs
I²C
SPI
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32-bit RISC CP
Timer
SMC2
Slide 8
8K DPRAM
SMC1
MII
MII
SCC4
10/100
10/100
Base-T
Base-T
Media
Media
Parallel I/O
SCC3
•
System Interface
Unit (SIU)
MPC8xx Core
SCC2
•
MPC866P
SCC1
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embedded 8XX core and CPM
Support for one Fast Ethernet,
PCMCIA (for connecting to
wireless module, e.g. 802.11b,
Bluetooth)
Four Serial Communication
Controllers
Support for Ethernet, HDLC, ATM,
two UARTs, and more…
Powerful memory controller and
system functions
0.18um Process Technology
Voltages: 1.8V Core, 3.3V I/O
Frequency: Up to 133 MHz
Power Consumption: 310mw
@133 MHz
Package: 357PBGA, 27x27mm,
1.27mm pitch
Samples and Production available
Interrupt Controller
PCMCIA
System Reset
Clock Synthesizer
Time Slot Assigner
Serial Interface
MPC866 Family
Derivatives Matrix
Performance & Features
132 MIPS at 100 MHz, 176 MIPS at 133 MHz
310mW at 133 MHz! 110mw at 50 MHz!
357-pin PBGA package, 852T is in 256-pin PBGA package
866T, 866P, 859P, 859T available at 100 and 133 MHz only
859DSL available at 50 and 66 MHz only
852T available at 50, 66, 80 and 100 MHz only
Slide 9
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MPC866ADS/MPC852TADS Development Systems
• MPC866, running up to 66 MHz bus frequency, mounted on ZIF
BGA socket.
• Also Supports MPC860 and MPC862 Families
• Board Control & Status Register - BCSR, Controlling Board’s
Operation.
• Ethernet 10BaseT port via SCC1
• Supports Fast IrDA (Upto 4 Mbps).
• Dual RS232 port with Low-Power Option per each port.
• T1/E1 connected to TDMB using external framer for serial ATM.
• PCMCIA Socket
• Selectable clock source
• On - Board Debug Port Controller with ADI I/F.
• Optional Hard Reset Configuration burned in Flash.
• On-Board High Density Logic Analyzer connectors, supporting
fast connection to HP16500 logic analyzer.
• Soft / Hard Reset Push – Button
Slide 10
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• MPC866ADS, MPC852TADS
$2995.00 SRP
• MPC866ADS-KIT, MPC852T-KIT
$3695.00 SRP
MPC866 QUICCstart Evaluation Board
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Freescale MPC866 processor – 50 MHz
RPX Bus provides direct access to the
MPC866 bus
16MB SDRAM (expandable to 128MB)
8MB Flash (expandable to 32MB)
1 – 10/100 BaseT Ethernet
1 – 10 BaseT Ethernet
2 – RS232 ports
PC/104 mechanical form factor (3.6 by 3.8
inches)
CD-ROM with schematics, reference, and
monitor documentation
PlanetCore on board monitor
DPI/BDM Run Control Interface
Linux BSP available
30 day Codewarrior eval license
Power Supply & Cables
$495 SRP
Part number – CWDS866EVAL
www.metrowerks.com
Slide 11
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC885 Family
• The MPC885 Family is a next generation extension to the PowerQUICC I Family
• New Features Include:
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Additional Fast Ethernet Controller Block (2 x 10/100) with MII/RMII
Integrated Security
USB
External Bus speed up to 80 MHz
• The MPC885 Family consists of 4 new product to the existing PQ1 family
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870 – 2 10/100 Fast Ethernet Controllers, USB and 1 SMC
875 - 2 10/100 Fast Ethernet Controllers, USB, 1 SCC, 1 SMC, and HW Encryption
880 - 2 10/100 Fast Ethernet Controllers, USB, 2 SCC, 2 SMCs, and ATM
885 - 2 10/100 Fast Ethernet Controllers, USB, 3 SCCs, 2 SMCs, ATM, and HW
Encryption
• Target applications include IAD’s, VPN routers, SOHO routers, Industrial Control
and General Purpose Computing.
Slide 12
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MPC885 – Block Diagram and Features
• Efficient architecture integrates an
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8KB
D-cache
Bus Interface Unit
Embedded MMUs
Memory Controllers
Security
Bus Arbitration
Parallel I/O
32-bit RISC CP
Timer
I²C
Time Slot Assigner
Serial Interface
Serial DMA
&
2 Virtual
DMAs
SPI
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Baud Rate
Generators
8K DPRAM
USB
Slide 13
4 Timers
SMC2
Fast Ethernet
Controller
Fast Ethernet
Controller
DMAs
DMAs
DMAs
DMAs
FIFOs
FIFOs
FIFOs
FIFOs
10/100
10/100
10/100
Base-T
Base-T
10/100
Base-T
Media
Media
Base-T
Media
Media
MII/RMII
MII
MII/RMII
MII
Communications Processor
Module (CPM)
SMC1
•
8KB
I-cache
SCC3
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System Interface
Unit (SIU)
MPC8xx Core
SCC4/
UTOPIA
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MPC885
SCC2
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embedded 8XX core, Security
engine, and CPM
Security Engine: AES, DES/3DES,
SHA/MD5/HMAC
Support for two Fast Ethernets
(MII or RMII), PCMCIA (for
connecting to wireless module, e.g.
802.11b, Bluetooth)
Three Serial Communication
Controllers
Support for Ethernet, HDLC, ATM,
two UARTs, USB and more…
Powerful memory controller and
system functions
Voltages: 1.8V Core, 3.3V I/O
Frequency: 66/66 MHz, 80/80 MHz,
133/66 MHz
Power Consumption: 430mW @
133 MHz
Package: 357 PBGA, 25x25mm,
1.27mm pitch
Samples and Production available
Interrupt Controller
PCMCIA
System Reset
Clock Synthesizer
MPC885 ADS Development System
• MPC885/MPC880, running up to 80 MHz bus
frequency, mounted on ZIF BGA socket.
MPC885 is superset part, and can be used to
develop for 870, 875, 880 and 885.
• 4 MByte, Un-buffered, Synchronous Dram OnBoard.
• 2 MByte Flash SIMM. Support for up to 8 MByte, 5V
or 12V Programmable, with Automatic Flash SIMM
identification.
• Board Control & Status Register - BCSR,
Controlling Board’s Operation.
• Two Fast Ethernet Ports with MII and/or RMII
interface support
• USB 2.0 Full/Low speed compatible interface
• Ethernet 10BaseT port via SCC3
• An infra-Red communication port is provided with
support for Fast IrDA (Up to 4 Mbps).
• Dual RS232 port with Low-Power Option per each
port.
• T1/E1 connected to TDMA framer for serial ATM.
• ATM55 and ATM125 connected to UTOPIA/Adtech
Bus interface
• EPP (Enhanced Parallel Port) Debug interface
Kit Includes:
Motherboard, WireTap, Power Supply,
30 day Code Warrior Eval License
SRP $2995
Slide 14
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC875 QUICCstart Evaluation Board
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Motorola MPC875 processor – 120 MHz
2 - 10/100M Ethernet Ports
1 - USB Port
1 - serial port (SMC)
8MB flash
16MB SDRAM
CD-ROM with design, reference, and complete
documentation
RedBoot on-board monitor
Linux BSP
WireTAP™ BDM/DPI Run Control
Power Supply & Cables
$595 SRP
Part number – CWDS875EVAL
www.metrowerks.com
Slide 15
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MPC885 Security Core
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Data Encryption Standard Execution
Unit (DEU)
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Advanced Encryption Standard Unit
(AESU)
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DES, 3DES with two key (K1, K2, K1)
or three Key (K1, K2, K3)
ECB and CBC modes for both DES
and 3DES
Key lengths of 128, 192, and 256 bits.
ECB, CBC, and Counter modes
Message Digest Execution Unit
(MDEU)
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SHA with 160-bit or 256-bit message
digest , MD5 with 128-bit message
digest
HMAC with all algorithms
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Supports IPSec, SSL/TLS, SRTP, and
802.11i protocol processing
•
SW compatible with MPC184/MPC185
drivers
Slide 16
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Crypto
Channel
8xx
Bus /
IF
Unit
Controller
FIFO
FIFO
DEU AESU
MDEU
FIFO
MPC885 Family Derivatives Matrix
870
875
880
885
66, 80, 133
66, 80, 66
66, 80, 133
66, 80, 66
66, 80, 133
66, 80, 66
66, 80, 133
66, 80, 66
– I Cache (KB)
8
8
8
8
– D Cache (KB)
Fast Ethernet Controllers (MII/RMII)
CPM Interfaces
8
2
8
2
8
2
8
2
– UTOPIA (ATM)
0
0
YES
YES
– Multichannel HDLC
0
32
64
64
– SCCs
0
1
2
3
– USB
1
1
1
1
– SMCs
1
1
2
2
– I²C
1
1
1
1
– SPI
1
1
1
1
No
256 PBGA
Now!
Now!
YES!
256 PBGA
Now!
Now!
No
357 PBGA
Now!
Now!
YES!
357 PBGA
Now!
Now!
Performance
– CPU/CPM (MHz)
– External Bus (MHz)
Integrated Security
Package
Samples
Production
Slide 17
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MPC82xx PowerQUICC II
Family Update
February 10, 2005
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC II™ MPC82xx Family Roadmap
MPC8280
MPC8280
450 MHz CPU
300 MHz CPM
100 MHz External Bus
ATM,10/100,HDLC,PCI,USB
MPC8272
MPC8275
MPC8272
400 MHz CPU
200 MHz CPM
100 MHz External Bus
ATM,10/100,PCI,USB
Security
MPC8266
300 MHz CPU
208 MHz CPM
83 MHz External Bus
ATM,10/100,HDLC,PCI
Performance and Features
MPC8271
MPC8270
MPC8248
MPC8266
MPC8247
MPC8265
MPC8264
MPC8260
MPC8260
MPC8255
MPC8260
200 MHz CPU
166 MHz CPM
66 MHz External Bus
ATM,10/100,HDLC
130nm, 1.5V core,
3.3V I/O
MPC8255
2001
.25µm, 1.8/2.0V core,
3.3V I/O
.29µm, 2.5V core,
3.3V I/O
MPC8250
2002
Slide 19
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2003
2004
MPC8280 – Block Diagram and Features
Features
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603e core with 16K inst & 16K data
caches
64-bit 60x bus
32-bit 33/66 MHz PCI or Local Bus
3 FCCs supporting HDLC,
10/100 Ethernet, ATM
4 SCCs, USB, 2 SMCs, SPI, I²C
8 TDMs supporting up to 256 HDLC
channels for 8 x E1/T1 interfaces or
ATM IMA + TC Layer
Memory controller built from
SDRAM, UPM, GPCM machines
MPC8280
603e Core
16KB
I-cache
FPU
Power
Management
JTAG/COP
Timers
Timer
Serial DMA
&
2 Virtual
DMAs
Interrupt Controller
Protection & Configuration
I²C
SPI
USB
SMC2
SMC1
SCC3
SCC4
SCC2
SCC1
FCC3
FCC2
FCC1
MCC2
130nm, 3.3V I/O, 1.5 V Core
480 TBGA, 37.5x37.5mm, 1.27mm
pitch
General Samples:
Production:
32-bit RISC CP
Parallel I/O
System Reset
Clock Synthesizer
TC Layer
Time Slot Assigner
Serial Interface
Availability
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Bus Arbitration
128 K
32K DPRAM
I-MEM (ROM) 32K I-RAM
Baud Rate
Generators
MCC1
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60x-to-PCI Bridge
60x-to-Local Bridge
4 Timers
NOW
NOW
8 TDM Ports
Slide 20
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60x
Bus
60x Bus Interface Unit
Communications Processor
Module (CPM)
450/300/100 MHz (480 TBGA)
333/250/83 MHz (480 TBGA)
1.5W @ full performance , 1.5V
Technology
Memory Controllers
GPCM/UPM/SDRAM
Classic G2 MMUs
Performance (CPU/CPM/Bus)
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System Interface
Unit (SIU)
16KB
D-cache
3 MII/RMII
2 UTOPIA
8/16bit
PCI/
Local
MPC8272 – Block Diagram and Features
Features
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603e core with 16K inst & 16K data
caches
64-bit 60x bus
32-bit 33/66 MHz PCI
2 FCCs supporting HDLC,
10/100 Ethernet, ATM
3 SCCs, USB, 2 SMCs, SPI, I²C
2 TDMs supporting up to 64 HDLC
channels for 2 x E1/T1 interfaces
Memory controller built from
SDRAM, UPM, GPCM machines
Integrated Security - DES/3DES,
MD5/SHA-1, AES, RNG, PKE, ARC4
Performance (CPU/CPM/Bus)
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Memory Controllers
GPCM/UPM/SDRAM
Classic G2 MMUs
FPU
Power
Management
JTAG/COP
Timers
60x-to-PCI Bridge
Communications Processor
Module (CPM)
Baud Rate
Generators
32-bit RISC CP
Parallel I/O
Timer
Interrupt Controller
I²C
SPI
USB
SMC2
SMC1
SCC4
SCC3
NOW
NOW
Serial DMA
&
2 Virtual
DMAs
Protection & Configuration
130nm, 3.3V I/O, 1.5 V Core
516 PBGA, 27x27mm, 1.00mm pitch
General Samples:
Production:
Bus Arbitration
80 K
16K DPRAM
I-MEM (ROM)
4K I-RAM
4 Timers
1 UTOPIA 8-bit
Slide 21
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2 MII/RMII
System Reset
Clock Synthesizer
Time Slot Assigner
Serial Interface
2 TDM Ports
60x
Bus
60x Bus Interface Unit
Availability
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System Interface
Unit (SIU)
Security
16KB
D-cache
SCC1
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16KB
I-cache
FCC2
Technology
603e Core
FCC1
•
400/200/100 MHz
300/200/100 MHz
266/200/66 MHz (industrial temp
available)
1.2W @ full performance , 1.5V
MPC8272
PCI
MPC8272 Security Core
• Public Key Execution Unit (PKEU) that supports the following:
– RSA and Diffie-Hellman with programmable field size up to 2048-bits
– Elliptic curve cryptography, F2m and F(p) modes with programmable field size up to 511-bits
•
Data Encryption Standard Execution Unit (DEU)
– DES, 3DES with two key (K1, K2, K1) or three Key (K1, K2, K3)
– ECB and CBC modes for both DES and 3DES
•
Crypto
Channel
Advanced Encryption Standard Unit (AESU)
– ECB, CBC, Counter, and CCM modes
– Key lengths of 128, 192, and 256 bits.
•
Message Digest Execution Unit (MDEU)
– SHA with 160-bit or 256-bit message digest ,
MD5 with 128-bit message digest
– HMAC with all algorithms
Crypto
Channel
Bus
Master /
Slave
Interface
Crypto
Channel
Crypto
Channel
Control
FIFO
PKEU DEU
FIFO
•
ARC Four Execution Unit (AFEU)
•
Random Number Generator (RNG)
•
SW compatible with MPC184/
MPC185 drivers
Slide 22
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
FIFO
FIFO
FIFO
AESU MDEU AFEU RNG
FIFO
FIFO FIFO
PowerQUICC II™ Family
130nm Derivatives Matrix
8247
8248
8271
8272
8270
8275
8280
– CPU (MHz)
266/300/400
266/300/400
266/300/400
266/300/400
266/333/450
266
333/450
– CPM (MHz)
200
200
200
200
200/250/300
200
250/300
66/100
66/100
66/100
66/100
66/83/100
66
83/100
– Local Bus (MHz)
NO
NO
NO
NO
66/83/100
66
83/100
– I/D Cache (KB)
16/16
16/16
16/16
16/16
16/16
16/16
16/16
66/33
66/33
66/33
66/33
66/33
66/33
66/33
2
2
2
2
3
3
3
• MII/RMII (Fast Ethernet)
2
2
2
2
3
3
3
• UTOPIA (ATM)
0
0
1
1
0
2
2
– Multichannel HDLC
64
64
64
64
128
128
256
– SCCs
3
3
3
3
4
4
4
– USB
1
1
1
1
1
1
1
– SMCs
2
2
2
2
2
2
2
– I2C/SPI
1
1
1
1
1
1
1
IMA/TC Functionality
NO
NO
NO
NO
NO
NO
YES
Integrate Security
NO
YES
NO
YES
NO
NO
NO
• Sample
NOW
NOW
NOW
NOW
NOW
NOW
NOW
• Production
NOW
NOW
NOW
NOW
NOW
NOW
NOW
516 PBGA
516 PBGA
516 PBGA
516 PBGA
480 TBGA
516 PBGA
516 PBGA
480 TBGA
Performance
– 60x/Memory Bus (MHz)
CPM Interfaces
– PCI (MHz)
– FCCs
• Package
Slide 23
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC II Development System
PQ2FADS
• Supports all PQ2 Offerings - HiP3/4/7
• Selectable Local Bus or PCI Bus in host mode
– 3 PCI slots (PCI 2.2 compliant)
• Memory (buffered on 60x bus)
– 32 MB SDRAM (soldered on-board)
– 8 MB Program Flash SIMM (up to 32MByte)
– 8 KB EEPROM
• Peripherals
–
–
–
–
155 Mbps ATM UNI on FCC1 with optional optical I/f
Two 100/10-Base-T Ports on FCC2 and FCC3
USB Port
Dual RS-232 port residing on SCC1 and SCC2
• Integrated on-board command converter
– Allows for a direct debugger connection
– Connects directly to a PC parallel port
• WireTAPTM JTAG/COP Run Control
• Offerings
– PQ2FADS-ZU (480 TBGA)
– PQ2FADS-VR (516 PBGA)
Slide 24
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Kit Includes:
Motherboard, WireTap, Power Supply,
30 day Code Warrior Eval License
SRP $2995
MPC8280 QUICCStart Evaluation Board
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Freescale MPC8280ZU processor
16MB 64 bit wide, SDRAM
4MB Flash (expandable to 8MB)
2 – 10/100 BaseT Ethernet
2 – RS232 ports
PCI Bus Interface & PCI Card Form Factor
for Easy Use & Insertion into PCI slots
Stand Alone Operation or Integrated
Operation in PCI Slot
CD-ROM with design, reference, and
complete documentation
RedBoot on-board monitor
Linux BSP
WireTAP™ JTAG/COP Run Control
Power Supply & Cables
$895 SRP
Part number – CWDS8280EVAL
www.metrowerks.com
Slide 25
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC8272 Development System
MPC8272ADS
• 155 Mbps optical ATM port or 10/100 Base-T
Ethernet port on FCC1
• Supports 8-bit Multi-PHY UTOPIA Level 2 with
UTOPIA ADTECH interface
• 10/100 Base-T Ethernet port on FCC2
• Dual RS232 serial ports
• USB compliant port
• 3 PCI slots @ 3.3V/66MHz
• Parallel port command converter
• Logic analyzer (debug) connectors
• Differences from PQ27FADS
–
–
–
–
–
Pinout
64MB SDRAM (60x bus) vs. 32MB
Only two FCCs (no support for two FE = ATM)
8-bit UTOPIA vs. 8/16-bit UTOPIA
No local bus functionality
Kit Includes:
Motherboard, WireTap, Power Supply, 30
day Code Warrior Eval License
SRP $2995
Slide 26
Freescale Semiconductor General Business Information
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC8248 QUICCStart Evaluation Board
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Freescale MPC8248 processor, 100 MHz
Bus
16MB 64 bit wide, SDRAM
8MB Flash
2x – 10/100 BaseT Ethernet
1x – RS232 ports
PCI Bus Interface & PCI Card Edge
Connector (Agent Only)
USB Full Speed
Expansion Connectors
CD-ROM with design, reference, and
complete documentation
Linux and Precise/MQX BSP
WireTAP™ JTAG/COP Run Control
Power Supply & Cables
$895 SRP
Part number – CWDS8248EVAL
www.metrowerks.com
Slide 27
Freescale Semiconductor General Business Information
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All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Freescale’s PowerQUICC II/III Processors:
Extending Functionality Through Protocol Leadership
•Software internetworking
leadership with extensive
multi-protocol support:
•
•
•
•
•
•
•
•
•
•
•
•
•
10/100 Ethernet
ATM
HDLC
Multi-Channel HDLC
IMA
Enhanced SS7 (E-SS7)
Fast Data Switching (FDS)
Multi Service Platform (MSP)
Enhanced MSP
Enhanced AAL2 (E2AAL2)
SSTED
ATM Policer
ML-PPP/MC-PPP
603e,e300 and e500 Processor Core
(compatible with PowerPC ISA)
FDS, MSP, E-SS7, E2AAL2
SSTED, Policer, E-MSP, ML/MC-PPP
AAL0
AAL1
AAL2
AAL5
IMA
Ethernet
ATM
HDLC
SS7
TC
Layer
MII
UTOPIA
TDM
GPIO
UART
Slide 28
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PQII and PQIII Microcodes – Available Now
• Fast Data Switching (FDS)
Enables the automatic forwarding of data (ATM or Ethernet) from one FCC to one other FCC,
without the need for software intervention. Typical applications: CO Switches, Gateways,
Base Stations, Multi-Service Access Platforms, Network Edge
• Multi Service Platform (MSP)
Gives customers the ability to handle ATM switching and enables QoS functionality on the
PowerQUICC II as well as traffic management features such as billing, queuing, policing,
address translation etc. – without host software intervention, significantly lowering the design
cost for OEMs. Typical applications: DSLAMs, Access Line Cards, Edge Access Servers
• Enhanced SS7 (ESS7)
Enhances the current SS7 (signaling protocol allowing different types of switches to
communicate to each other) implementation by adding support for high speed SS7 channels at
T1/E1 rates, as defined by ITU-T Q703 Annex A recommendation. Also adds support for the
Japanese and Chinese high speed standards.
• Enhanced AAL2 (E2AAL2) - Providing QoS parameters in the host.
Enhances the current AAL2 implementation by providing external TQD capabilities, enabling
support for 64K VCs. Also supports AAL2 statistics gathering. Typical applications: Voice
Switches, Voice Gateways.
Slide 29
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PQII and PQIII Microcodes – Beta Versions
• SSTED – Alleviates the CPU from performing AAL2 packet error detect
The SSTED (Service Specific Transmission Error Detection sublayer) microcode builds on the
E2AAL2 package, providing support for the next AAL2 layer (SSTED functionality) which adds
the SSTED trailer and detects corrupted or lost Packet Data Units.
• ATM Policer – Polices the QoS to ATM cells
Implements the ATM forum’s TM4.1 Virtual Scheduling algorithm
– Dual leaky bucket policing scheme
– Programmable bundling of multiple VCCs
– Guaranteed Frame Rate (GFR) Mode
– Typical applications: Routers/Switches (apps where QoS needs to be enforced)
• Enhanced MSP (E-MSP)
Adds the following functionality to the existing MSP microcode:
–
–
–
–
–
–
Simultaneous Early Packet Discard and Partial Packet Discard
Enhanced OAM support
Enhanced APC to support PHYs with variable bit rate
Dynamic channel add/delete
Dynamic address compression
Transparent VP switching support in CAM address lookup
Slide 30
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
3rd Party Custom Microcode Developers
• Arabella Systems
Develops custom microcode packages that can off-load critical functions from the PowerPC
CPU-based software, enhancing system throughput.
– Custom microcode packages will be integrated with Linux-based software solutions to create
comprehensive, highly optimized software systems.
–
– www.arabellasw.com
• DoGav Systems
– Provides various CPM fee based microcode patches for optimization.
– Fast Ethernet Shaper
– VLAN support
– Ethernet Cable Connect/Disconnect Recovery
– CPM Idle Slots
– FCC-Ethernet Time Stamp (dowloadable for free)
–
www.dogav.com
• Flextronics – www.flextronics.com
• Windriver – www.windriver.com
Slide 31
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Customer
Presentation
Slide 32
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Freescale: The Leader in Telematics Control
Unit Processors
Over 90% of TCU’s Shipped are Based on a
Freescale Processor
(Source: Telematics Research Group)
Introducing the MPC5200 MPC5200
•Hi Integration/Hi Performance
•Extended Temp/Low Power
•Long Term Availability
MPC560
MPC823e
Slide 33
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
mobileGT: What is it?
Cooperative alliance of key software vendors
providing integrated and proven support on the
MPC5200-based mobileGT platforms.
•Real Time Operating Systems
•Java Virtual Machines
•Voice Recognition Engines
•Acoustic Echo Cancellation Technologies
•Wireless Communications
•Graphical Interface Technologies
•Navigation software
mobileGT Total5200 Platform
Slide 34
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
mobileGT: How Can it Help You?
Minimal time configuring key software on an I/O and
resource rich platform . This enables:
•Rapid realization of prototypes and field trial units (weeks instead
months)
•Easy connection to automotive networks including MOST, CAN
and J1850 with on-chip and on-platform technologies
•Well-proven connectivity to key enabling hardware technologies
including GPS, cellular, Bluetooth, WLAN and 3D graphics
•One-stop support for the processor, development platform and software
including access and support of Freescale developed software I/O drivers
Slide 35
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC5200/mobileGT: What software is supported?
mobileGT Total5200
Real Time Operating Systems
•QNX
•And others
Voice Recognition/Text to Speech/AEC
•Clarity
•Fonix
•IBM Embedded Via Voice
•ScanSoft VoCon3200
•SpeechWorks Speechify Solo
•Wavemakers
Graphics
•eNGENUITY
•Tilcon
Navigation
•Navigon, etc.
Slide 36
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Wireless
•Airbiquity
•Extended Systems, StoneStreet One
Lite5200 EVB
Real Time Operating Systems
•QNX
•And others
MPC5200 Block Diagram
603e series PowerPC® Core 16K Instruction and
16K Data Caches
Dual 32 Entry MMUs
High Speed DDR SDRAM interface
256Mbyte addressing range per chip select
(2 CS available), 32-bit wide
Flexible multi-function external bus
PCI master v2.2, ATA v4 compatibility
BestComm I/O subsystem
Support for PSC, Ethernet, USB 1.1, PCI,
ATA, I2C, AC97 & CODEC
Interfaces, SPI, CAN
16kB internal SDRAM
6 Peripheral Serial Controllers Configurable as
UART, AC97 & CODEC Interfaces, I2S
8 Counter/Timers
BDLC-D J1850
Superior I/O for Industrial Automation and
Automotive Applications
CAN, Serial, USB, J1850 (MOST® on
Total5200 Development Board)
Power Management
Sleep and deep sleep modes. ~ 1W @ 400 MHz
Performance:
~ 760MIPS (400MHz) at -40° C to 85 C
Package
272 pin PBGA, 1.27mm pitch
16K
ICache
32 Entry
MMU
16K
DCache
32 Entry
MMU
Systems
Integration
Unit
Systems
Integration
Memory
Controller
Memory
Controller
DDR or
(DRAM)
SDR
SDRAM
400 MHz
PowerPC
603e Core
PowerPC 603e Core
Unit
USB
(Two)
Interrupt Control
Interrupt
Control
System
Functions
System Functions
Counter/Timers/Real
Time clock
Real Time clock
FPU
FPU
Chip Selects (8)
(6)
XLB
PCI Controller
Best
Comm
16kB
8kB
DPRAM
DPRAM
DPRAM
Features
IPBI
IPBI
Smart
DMA
ROM/SRAM
ATA/IDE Host
Controller
JTAG
IP Bus
PSC1
Slide 37
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PSC2
PSC3
PSC4
PSC5
PSC6
J1850
SPI
10/100 I2C
BaseT (Two)
CAN 2.0
A/B
(Two)
mobileGT Hardware Architecture
Add on Modules
•CD ROM
•DVD
•HDD
MPC5200
USBx2
ATA
Audio
Subsystem
UARTs,
SPI
760 MIPS
64MB
SDRAM
AC97
DDR
Memory
Support
Ethernet
64MB
Flash
I2S
BestComm
DMA
J1850
I2C
PCI
GPU
FPU
CANx2
Total5200 Development Platform
+12V
Slide 38
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MOST
•Bluetooth
•802.11
•Cellular
•GPS, Gyro
•Navigation
•Audio DSP
•Radio
•SDAR
•Camera
Sensors
mobileGT Software Architecture
mobileGT Software Architecture
Audio/Video
Codecs
Navigation SW/
Databases
Graphics/HMI
Browser
Wireless Stacks
Echo Cancellation
Voice Recognition
Frameworks
UI
ML
OSGi/SMF
Java/
OSGi
Applications/Middleware
Java Virtual Machine
And Classes
Middleware (Database, Audio Mgt, etc)
POSIX Compliant RTOS
Audio
Graphics
FLASH
File System
RTOS
I/O
(Serial, USB,
CAN, etc)
TCP/IP
HW Devpt
Platform
mobileGT Hardware Platform
Car
Ntwk
Camera
Sensors
CD/DVD
HDD
GPS/
Gyro
Bluetooth
Slide 39
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Software
Drivers
802.11
Cellular
Display
Add-on
Hardware
Modules
Simplified Total5200 Block Diagram
PCI
IrDA
Transc
3V/5V
AC’97
2 CAN
Transc
MPC5200
Local
Plus
2 USB
Transc
ATA
PC104+
MOST
64MB
Flash
eBus
Audio
CPLD
12V
Transc
LCD
Ctl
UARTS
10/100
Transc
64MB
SDRAM
I2C
Slide 40
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
RS232
Transc
Details for Total5200 Development Platform
400MHz Total5200 Development Platform
Total 5200 Graphics Unit
BigFoot
1
RS-232
CRT
USB
Ethernet
• Detachable, Graphics Touchscreen,
• Reconfigurable buttons
S-Video
Evaluation Software/Tools
Available NOW
Slide 41
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Headphone
Loudspeaker , L
Phone
Radio R
Radio L
Line3 (Video)
Line2 (MP3)
Line1 (DSP)
2
Mic2
QNX Momentics and QNX Neutrino BSP
IBM WebSphere/ J9 Java Virtual Machine with QNX
Metrowerks CodeWarrior and Linux BSP
dBUG - low level debugger & boot loader
Mic1
•
•
•
•
™
Base unit - 1 DIN Form Factor
120VAC or 11-14VDC
64MB SDRAM, 64MB Flash
PC104+(PCI), ATA
2 CAN, MOST, 2 USB, I2C
9 UARTs
LCD controller w/ VGA & S-Video
10BaseT Ethernet
Audio Inputs/Outputs supporting Mic, Bluetooth, Radio, Phone &
Speaker.
Bluetooth
Loudspeaker , R
•
•
•
•
•
•
•
•
•
Details for Lite5200 EVB
400 MHz Lite5200 Board
• 160mm x 133mm
• 64MB SDRAM, 16 MB Flash
• PCI, ATA
• CAN (2), USB, I2C (2)
• 1 UART
• 10/100 Ethernet
• All additional MPC5200 I/O available on header connector
• No MOST®, LCD Controller, Graphics Display,
Audio Subsystem
• No Integrated 12V Power Support
Lite5200 Software
• CodeWarrior 30-day Eval Seat
• dBUG - low level debugger & boot loader
• Support for QNX and others.
Available NOW
Slide 42
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC5200 Total5200 and Lite5200 Ordering Information
Total5200 Development Platform $5,000
•Total5200 Hardware
•Complete Total5200 startup CD including QNX drivers, utilities,
and IBM WebSphere/J9
•30 day evaluation copy of QNX Momentics
•Freescale P/N: MPCSYS5200EVAL
Lite5200 Evaluation Board Kit $995
•Lite5200 EVB Hardware
•Evaluation Copies of CodeWarrior, Platform Creation Suite and CodeWarrior
for Embedded Linux
•Support for QSSL Momentics/QNX and others.
•Metrowerks WireTAP® and Green Hills Slingshot® Probes included
•P/N CWMPCEVB5200
Slide 43
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC83xx PowerQUICC II Pro
Family Update
February 10, 2005
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC II Pro™ Family Goals
Extends PowerQUICC processor roadmap
•
Extends PowerQUICC I and PowerQUICC II Families
Powered by the new e300 PowerPC Core
Provides new high-performance functionality
•
•
•
•
•
DDR SDRAM
Hi-Speed USB
10/100/1000 Ethernet
Dual PCI capability
Next generation communications engine
Based on SoC design methodology
•
•
•
Single Architecture for the entire PowerQUICC II Pro family
Easier and faster to develop additional SoC-based family members
targeting emerging markets
SemiCustom IC platform
Slide 45
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC II Pro™ PowerPC e300 Core
Enhanced version of the 603e PowerPC core used in previous generation PowerQUICC II
New enhanced core (e300) features:
• 32-bit PowerPC Classic architecture
• Superscalar (3 IPC)
• 32KB I/D caches (8 way) with Parity
• Classic PPC MMUs
• Double precision FPU
• On-chip debug support (JTAG/COP)
Power Management
• Dynamic power management on decode
• Low power static design
• Nap and doze and sleep modes
Performance
• 667 MHz
(1261 MIPS)
• 533 MHz
(1007 MIPS)
• 400 MHz (756 MIPS)
Completion
Unit
Integer
Unit
Gen
Reg
File
Gen
Rename
Slide 46
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Floating
Point
Unit
I MMU
32K Data Cache
32K Inst. Cache
Bus Interface Unit
• 32Kbyte Instruction and 32KbyteData
•
•
•
FPU
Reg
File
Load/
Store
Unit
D MMU
New features:
 8-way set associative Cache with Parity
Added performance features (extensions)
Up to 667MHz operation
130nm technology (1.2V operation)
Branch
Unit
Dispatch
Unit
32b
Address
64b
Data
Coherent System Bus (CSB)
MPC8349E – Block Diagram and Features
Features
• Integrated e300 core processor
•
•
•
•
•
•
•
•
 400-667MHz
 32K I/D cache
Memory Controller
 32/64-bit DDR 266/333MHz
Two 10/100/1000 Ethernet MACs
2x32-bit or 1x64-bit PCI
 Up to 66 MHz PCI 2.2, PCI Arbiter
 Master & Agent mode support
Local Bus
Integrated QUICC Security - DES/3DES,
MD5/SHA-1, AES, RNG, PKEU, RC4
Two Hi-Speed USB ports
 1 port Host, Device, or On-The-Go
 1 port Host
Multi-channel DMA controller
DUART, Dual I²C, Interrupt, GPIO, SPI
MPC8349E
QUICC
Security
Duart
Dual I2C
Timers
GPIO
SPI
USB
Hi-Speed
Host Device
Technology
•
•
•
•
0.13µm, 1.2V core, 3.3V I/O
Temp Range: 0°C-85/105°C, -40°C-105°C
672 TBGA – 35x35 mm, 1mm pitch
Estimated ~1.3W @533MHz
Availability
• Alpha Samples
• General Samples
• Production
Now
Q2 2005
Q3 2005
Slide 47
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
e300 core
Interrupt
32KB
32KB
Controller D-Cache I-Cache
PCI
Local Bus
10/100/1000
Ethernet
DDR
Controller
10/100/1000
Ethernet
MPC8349E Family Features Comparison
MPC8349E
MPC8347E
MPC8343E
Core
e300
e300
CPU Speed
Up to 667MHz
L1 I/D Cache
Memory Controller
Local bus
32KI/32KD
64/32 bit DDR
Yes
2-32Bit up to 66MHz OR
1-64bit up to 66MHz
e300
Up to 667MHz (TBGA)
Up to 400MHz (PBGA)
32KI/32KD
64/32 bit DDR
Yes
PCI
Up to 400MHz
32KI/32KD
32 bit DDR
Yes
1-32Bit up to 66 MHz
1-32Bit up to 66 MHz
2-10/100/1000
2-10/100/1000
2-10/100/1000
QUICC Security
UART
I2C
SPI
Int. Controller
Est. Core Power
Hi-Speed
Host, Device, & OTG
E version only
Dual
Dual
Yes
Yes
~1.3W @ 533MHz
Hi-Speed
Host, Device, or OTG
E version only
Dual
Dual
Yes
Yes
~0.8W @ 266MHz
Package
672 TBGA (35x35) 1mm pitch
Initial Samples
General Samples
Q1-05
Q2-05
Hi-Speed
Host, Device, & OTG
E version only
Dual
Dual
Yes
Yes
~1.1W @ 400MHz
672 TBGA (35x35) 1mm pitch
620 PBGA (29x29) 1mm pitch
Q1-05
Q2-05
Ethernet
USB
Slide 48
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
620 PBGA (29x29) 1mm pitch
Q1-05
Q2-05
MPC8349E Family QUICCstart Development Board (QS)
The QUICCstart board can be used
QUICCstart Features
• Standalone (5V external power supply)
• MPC8349E processor @533MHz
• PCI add-in Card (PC powered)
• 256MByte DDR-1 333MHz w/ECC
• Plugged into Platform I/O board (PIB) (powered by PIB)
• 64-Bit PCI Edge Connector (3.3V
& 5V)
From IO
I2C
SODIMM DDR
Board
• Two RJ-45 G-Ethernet ports
Config DIP-Switch
256MByte @ 333MHz
BCSR
From
CLOCK
• USB2.0 High Speed
COP
JTAG
RJ-45
16-pin
D.
Device/Host/OTG port
Buffer
10/100/1000
FLASH
A.
• Dual RS232 ports
LBI
RJ-45
Ethernet PHY
8MB
Latch
32bit
16bit
• Local Bus Interface with
• 8Mbyte Flash (expandable)
• Board Control and Status
Registers (BCSR) in FBGA
• Riser Connectors to Platform I/O
Board
• JTAG Debug Port
• I2C port with
• 256Kb EEPROM
• Real-Time Clock (RTC)
• SODIMM SPD EEPROM
• PCI add-in standard card form
factor (321x106mm2)
MPC8349E
Double RS232
RJ-45
10
USB2.0
Mini-AB
recept
Transceiver
ULPI
I2C1 Bus
300-pin FCI Riser Connector
EEPROM
256Kb
A.
Buffer
LL, R part 2
LEDs
SPD
EEPROM
x2
Bus Switch for Voltage Clamp
1.2V 2.5V
Core DDR
1.25V 3.3V
DDR Com
POWER
Supply
LL
5V IN
RTC
RTC
Back
32/64-bit PCI
Universal Edge Connector
Available with Silicon
$1395 SRP (MPC8349E-QS-SKT)
Slide 49
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
L
R
300-pin FCI Riser Connector
TSEC2, USB, I2Cx2, UARTx2,
Buffered Local Bus
MPC8349E Family Application Development Board (FADS)
The FADS is comprised of a
8349E QUICCstart board + 83xx Platform I/O Board + PCI PMC card
83xx Platform I/O Board (PIB)
8349E FADS Additional Features:
•
•
•
PCI Host mode (w/ PCI PMC card)
2nd USB Port (w/ USB PMC card)
Optical Ethernet phy
PMC 1
PMC 2
PMC 3
PMC 4
Platform I/O Board Features:
•
•
•
•
•
•
•
•
•
•
AdvancedTCA form factor
4 PMC slots
1 x 10/100/1000 Ethernet
4 x 10/100 Ethernet
Two PMC for ATM modules with
ADTEC connectors.
One PMC for USB
One PMC for SLIC-SLAC module
card.
Expansion connectors for TCOM &
CE signals.
Logic analyzer connectors for all CE
signals
$2495.00 SRP (MPC83XX-PIB)
TCOM/ECOM
8349E QUICCstart Board (QS)
SODIMM DDR
256MByte @ 333MHz
From IO
Board
RJ-45
MPC8349E
Double RS232
RJ-45
10
USB2.0
Transceiver
ULPI
I2C1 Bus
300-pin FCI Riser Connector
EEPROM
256Kb
SPD
EEPROM
x2
Bus Switch for Voltage Clamp
1.2V 2.5V
Core DDR
1.25V 3.3V
DDR Com
POWER
Supply
LL
5V IN
RTC
RTC
Back
32/64-bit PCI
Universal Edge Connector
Available Q205
$3795 SRP (MPC8349E-FADS)
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
A.
Buffer
LL, R part 2
LEDs
Slide 50
FLASH
8MB
16bit
A.
Latch
LBI
32bit
Mini-AB
recept
BCSR
From
JTAG
D.
Buffer
10/100/1000
Ethernet PHY
RJ-45
I2C
Config DIP-Switch
CLOCK
COP
16-pin
L
R
300-pin FCI Riser Connector
TSEC2, USB, I2Cx2, UARTx2,
Buffered Local Bus
MPC85xx PowerQUICC III
Family Update
February 10, 2005
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC III PowerPC e500 Core
Freescale’s e500 core is aimed at embedded applications
 e500 is a high-performance core
• e500 provides key embedded functionality
• Cache locking, fast interrupt response, fault robustness, performance monitoring
Common SoC Platforms
Scalable Performance - Low to
High
e700 Core
3000+ MHz
32/64-bit
e700 Platform
MPC87xx Series
Key features:
•
–
–
–
–
e600 Core
G4 Core
MPC74xx Series
2000+ MHz
32-bit
Fully compatible
with G4
e600 Platform
MPC86xx Series
•
e500 Core
e500 Core
MPC85xx Series
1500+ MHz
32-bit
e500 Platform
MPC85xx Series
e300 Core
603e Core
MPC82xx Series
667+ MHz
32-bit
Fully compatible
with 603e/G2
e300 Platform
MPC83xx Series
Slide 52
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Integrated L1/L2 Cache
•
•
32K Instruction & Data
Up to 512K L2
L1/L2 Hardware Coherency
L2 configurable as SRAM
Added performance features
(extensions)
Planned >1GHz operation
130nm & 90nm technology
PowerQUICC III SoC Platform Architecture
Multi-core Ready
e500
core
Potential
32K
D-Cache
32K
D-Cache
32K
I-Cache
32K
I-Cache
Hierarchical on-chip buses
e500 Core
e500 Cores
32K
I-Cache
• Memory Coherency (in HW)
• Support Out-of-order Transfers:
L2
Cache /SRAM
32K
D-Cache
Accesses to slow peripherals do not
128bit Read
block DDR memory accesses.
128bit Write
64bit Read
e500 Coherency Module
• Only coherent I/O traffic Snooped
Queue
64b DDR/
DDR2 SDRAM
Controller
Queue
Potential
Memory Coherency Module
64b DDR/
DDR2 SDRAM
Controller
up to Processor(s)
• CPU access of L2-cache
concurrent w/ Non-coherent I/O
transfers to/from memory.
CPM
Dual PCI
PCI-X
PCI Express
Local
Bus
IP-Bus Buffers
Gigabit
Gigabit
Ethernet
Ethernet
• Speculative Reads from CPU(s) to
DDR only when Queue empty.
I2C
DUART
Slide 53
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
10/100
Enet
Custom
IP
Switch fabric supports peer-
to-peer traffic concurrent w/
CPU & I/O memory accesses.
MPC8560
e500 Core
• 667 MHz up to 1 GHz
• 32K L1 I-Cache, 32K L1 D-Cache
• 256K unified L2 cache
e500 core
32K
I-Cache
32K
D-Cache
256K
L2
CPM
• Specialized RISC 333 MHz
• 3 Fast Communication Channels (FCC):
 ATM -> OC-3, 10/100 Mbit/s Ethernet, E3/T3
HDLC/transparent operation
Local
Bus
OpenPIC
Coherency
Module
64b DDR/
SDRAM
Controller
• 2 Multi-channel Communications Controller
 256 channels of HDLC/transparent
• Time Slot assigner channels
 8 physical links of up to 16 Mbps or
 2 channels of T3/E3
• 4 Serial Communication Channels (SCC)
 HDLC, HDLC bus, transparent mode, UART, Bisync,
Appletalk/Localtalk
• 8 channel ATM TC layer
• SPI, I2C
2x10/100/1000 MAC
(MII/GMII/TBI/RGMII/RTBI)
DDR Memory Bus - (2.5V I/O)
• 133-166MHz bus (266-333MHz data rates)
Local Bus - (3.3V I/O)
• 32-bit local bus with memory controller
• Muxed address/data
Perf Mon
DUART
2x I2C
Timers
Gigabit
Gigabit
Ethernet
Ethernet
MPC8560
• PCI-X - (3.3V I/O)
– 32-/64-bit PCI/PCI-X with int. PCI
arbiter
• RapidIO
– 8-bit interface, LVDS I/O 500 MHz
Slide 54
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
CPM
Rapid IO
• 0.13um Process Technology
• 783 FC-PBGA Package (Flip
Chip on PBGA)
MPC8540
e500 Core
•
•
•
667 MHz up to 1 GHz
e500 core
32K L1 I-Cache, 32K L1 D-Cache
32K
I-Cache
256K unified L2 cache
32K
D-Cache
256K
L2
2x10/100/1000 MAC (MII/GMII/TBI/RGMII/RTBI)
1x10/100 (MII)
DUART
Local
Bus
OpenPIC
Coherency
Module
64b DDR/
SDRAM
Controller
DDR Memory Bus - (2.5V I/O)
•
133-166MHz bus (266-333MHz data rates)
Local Bus - (3.3V I/O)
•
32-bit local bus with memory controller
•
Muxed address/data
Perf Mon
DUART
2x I2C
Timers
Gigabit
Gigabit
Ethernet
Ethernet
10/100
Ethernet
PCI-X - (3.3V I/O)
•
32-/64-bit PCI/PCI-X with int. PCI arbiter
RapidIO
•
MPC8540
8-bit interface, LVDS I/O 500 MHz
Technology
•
•
0.13um Process Technology
783 FC-PBGA Package (Flip Chip on PBGA)
Slide 55
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Rapid IO
MPC8555E
e500 core (up to 833 MHz)
• 0.13um bulk technology
• 32KB Level 1 Caches
• 256KB L2 Cache
e500 core
32K
I-Cache
32K
D-Cache
256K
L2
Features
•
•
•
•
•
Up to 333 MHz 64b DDR SDRAM
2x 10/100/1000 Ethernet Controllers
2x 32bit / single 64b PCI
DUART, I2C
Integrated QUICC Security
Local
Bus
CPM (as in MPC8272)
Perf Mon
DUART
2x I2C
Timers
• 3 SCCs, USB, 2 SMCs, SPI, I2C
• Two FCCs supporting ATM (up to 55 Mbps) or
•
•
10/100 Ethernet
2x 8bit Utopia Level-2 interface
2 TDMs supporting up to 64 HDLC channels for
2 x E1/T1 interfaces
OpenPIC
Production: 1Q05
Slide 56
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
64b DDR/
SDRAM
Controller
CPM
Gigabit
Gigabit
Ethernet
Ethernet
MPC8555E
Samples: NOW
Coherency
Module
32b/64b
PCI
QUICC
Security
MPC8541E
e500 core (up to 833 MHz)
• 0.13um bulk technology
• 32KB Level 1 Caches
• 256KB L2 Cache
Features
• Up to 333 MHz 64b DDR SDRAM
• 2x 10/100/1000 Ethernet
•
•
•
•
e500 core
32K
I-Cache
Local
Bus
Controllers
2x10/100 Ethernet Controllers,
SPI, and I2C using CPM
2x 32bit / single 64b PCI
DUART, I2C
Integrated QUICC Security
Samples: Now
Production: 1Q05
Perf Mon
DUART
2x I2C
Timers
OpenPIC
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Coherency
Module
256K
L2
64b DDR/
SDRAM
Controller
CPM Lite
Gigabit
Gigabit
Ethernet
Ethernet
MPC8541E
Slide 57
32K
D-Cache
(Ethernet
SPI, I2C
only)
32b/64b
PCI
QUICC
Security
MPC8555 and MPC8541
Security Core Block Diagram
On-Chip
System
Interface
cryptochannel
cryptochannel
FIFO
Control
PKEU
DEU
FIFO
FIFO
FIFO
AESU MDEU AFEU RNG
cryptochannel
cryptochannel
FIFO
Easy Software Migration Path from Existing
Freescale Security Device Drivers
Slide 58
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
FIFO
FIFO
FIFO
MPC8555E and MPC8541E
Security Core Features
Protocols supported:
•
•
•
•
•
•
IPSec: VPN
SSL/TLS: VPN/server
iSCSI/FCIP: storage
SRTP: real-time media
IKE: public key
802.11i: wireless LAN
Public Key features:
• RSA: 80 - 2048 Bit Modulus
• Elliptic Curve Cryptography
– F(2m) & F(P) modes
– 55-511 Bit Field Size
Authentication
• MD-5, SHA-1, SHA-256
• All with HMAC
Slide 59
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Bulk data encryption:
• DES/3DES – 56/112/168 bit keys
– ECB, CBC modes
• AES: 128/192/256 bit keys
– ECB, CBC, CCM, and CTR modes
• ARC-4: 40 to 128 bit keys
Hardware Random Number
Generator
Master/slave interface
• 64 bit, up to 166 MHz
Concurrent processing on all
the modules
PowerQUICC III Product Status
• MPC8560 and MPC8540
MPC Qualification
Production
Reference Boards
1GHz Samples
• MPC8541E
NOW
NOW
NOW
NOW
and MPC8555E
General Sampling
MPC Qualification
Production
Reference Boards
1GHz Samples
NOW
NOW
Ramping NOW
NOW
NOW
• Freescale’s ongoing commitment: higher levels of
integration & performance – see our 90nm Roadmap
Slide 60
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC III Processor Power
Power measurements shown are with VDD = 1.2V, TA= 70 ° C / TJ= 105 ° C
Slide 61
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PQIII Family Feature Matrix
Slide 62
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PQIII Next Generation
90nm Products
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC III 90nm Platform
Enhanced e500 core
32KB
I-Cache
Local
Bus
Perf Mon
DUART
2x I2C
Timers
OpenPIC
QUICC
Security
32KB
D-Cache
512KB
L2
64b DDR/
DDR2 SDRAM
Controller
Coherency Module
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
32b
PCI
Slide 64
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC III Platform Extensions
Optimized to Satisfy Evolving Customer System Requirements
• High-performance e500 PowerPC core complex scaling from 800 MHz up to
1.5GHz, initial offerings up to 1.33GHz
• Enhancements include:
• 36bit physical addressing
• Double precision floating point support
• - 512KB L2 Cache
•
- Configurable as Cache or SRAM with 64KB block granularity
•
- I/O transaction can be stashed into L2 cache regions
• Superior levels of memory bandwidth
• Double the internal bandwidth with buses running at up to 667MHz clock rate
• Legacy support for DDR1 and next-generation memory interfaces
DDR2/FCRAM1/FCRAM2 up to 333MHz clock rate/667MHz data rate w/ECC
• Freescale’s 90 nanometer (nm) silicon-on-insulator (SOI) copper
interconnect process technology
Slide 65
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PowerQUICC III Platform Extensions
Optimized to Satisfy Evolving Customer System Requirements
• Functional enhancements
• Four on-chip three-speed Ethernet controllers (Enhanced TSEC) supporting 10- and
100-Mbps, and 1-Gbps Ethernet/802.3 networks with MII, RMII, GMII, RGMII, RTBI, and
TBI physical interfaces.
•IP header checksum and TCP/UDP payload check sum acceleration
•Advanced QoS features
•8/16b FIFO-mode
• Integrated QUICC Security with support for DES, 3DES, MD-5, SHA-1/SHA-2, AES,
RSA, RNG
• Kasumi encryption algorithm, used in 3G wireless security
• XOR acceleration used in storage applications for error correction
• High-speed Interfaces while maintaining legacy interface support
• x4/x1 Serial RapidIO
• x8/x4/x2/x1 PCI-Express
• 2x 32b-PCI or 1x 64b-PCI(X)
Slide 66
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC8548E Product Solution for Networking, Telecom
and Wireless Infrastructure
• e500 PowerPC core (1.2-1.5GHz)
• 90nm
• Initial offerings up to 1.33GHz
• 512KB L2 Cache w/ ECC
• 36bit physical addressing
e500 core
32KB
I-Cache
512K
L2
32KB
D-Cache
• System unit
Local
Bus
Perf Mon
DUART
2x I2C
Timers
OpenPIC
QUICC
Security
64b DDR/
DDR2 SDRAM
Controller
Coherency
Module
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
MPC8548E
• 64b DDR/DDR2/FCRAM1/FCRAM2 up
to 333MHz clock rate or up to 667MHz
data rate w/ECC (initial offerings up to
533MHz data rate)
• 4x 10/100/1000 w/Checksum Offload,
QoS, header parsing, packet
classification and 8/16b FIFO-mode (up
to 3.2Gbps)
• 2x 32b-PCI or 1x 64b-PCI(X)
• DUART, 2x I2C, Timers
• Integrated QUICC Security (up to
1Gbps)
•Support for Kasumi algorithm
• High-speed interfaces
• x4,x1 Serial RapidIO (20Gbps)
• Or x8,x4,x2,x1 PCI-Express (32Gbps)
• Or x4 Serial RapidIO and x4 PCIExpress (36Gbps)
32b
PCI
•
Slide 67
Samples: 2Q05
Production: 1Q06
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Local Bus - (3.3V I/O)
• 32-bit for SDRAM/ Boot Flash/
CompactFlash card
Hardware Acceleration to Layer 4
Optimizes CPU performance on TCP/IP
Gig-E Controller 1
DMA
Gig-E Controller 2
DMA
Quality
of 3
Gig-E
Controller
Service
64b DMA
FIFO
Service
TCP/IP
64b of
DMATx
Quality
Rx Offload
Service FIFOTx
TCP/IP
Quality of FIFO
FIFO Offload
Rx
Service 10kBTx
TCP/IP
2kB
FIFO10/100/1G
FIFO
Offload
TCP/IP
2kB MAC
10kB
10/100/1G
Offload
MAC
16b FIFO
10/100/1000
Interface
MAC
16b FIFO
10/100/1000
Interface
MAC
Quality
of Tx
Gig-E
Controller
4
• TCP/IP checksum offload Rx + Tx
• IPv6 support in hardware
QoS support for 16 hardware queues (8
Rx + 8 Tx)
•
•
•
•
•
•
Customizable per-packet filing/filtering
802.1p, IP TOS, Diffserv classification
Support for weighted fair queuing
TCP/UDP port-based flows
Assist firewall through IP/TCP/UDP reject
Ethernet preamble sorting and insertion
FIFO I/F to ASICs + (R)GMII/(R)MII/(R)TBI
• 8/16-bits @ OC-48 rates (200MHz)
Layer 2 features
• VLAN insertion and deletion per frame
• 16 exact-match MAC addresses
Code compatible with PowerQUICC III™
Slide 68
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
PQIII Ethernet Based Products
Slide 69
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
MPC8548E QUICC Security
Expanded and Improved Protocol Support
Kasumi Execution Unit (KEU)
Supports the following algorithms:
In Snoop
FIFO
Internal
Bus
Interface
FIFO
FIFO
FIFO
FIFO
Crypto
Channel
Crypto
Control
Public
DES
Key
3DES
Crypto
FIFO
SHA-2
ARC4
RNG
FIFO
FIFO
Channel
Crypto
Channel
ARC4
KEU
MD5
FIFO
•A5/3 for GSM and EDGE
•GEA-3 for GPRS
SHA-1
AES
Channel
(master/
slave)
•F8 , F9 as required for 3GPP
FIFO
Processing latency for 64B packet
estimated to be 3.3 x 10-7. Raw
performance 1.5Gbps.
Out Snoop
Improved SSL support
Single pass SSL processing
2x Increase in Raw Performance!
Support for SSL 3.0 MAC (Message
Authentication Code)
Note:
Freescale’s inclusion of Kasumi acceleration does not provide pass through licensing to wireless infrastructure manufacturers.
The user of Kasumi functionality must obtain a license from Mitsubishi prior to implementing these algorithms.
Slide 70
Freescale Semiconductor General Business Information
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004
Next-Generation Gigabit Access Controller
Optimizes CPU performance on TCP/IP
• TCP/IP checksum offload Rx + Tx
• IPV4 / IPv6 support in H/W
QoS support for 16 H/W queues
(8 Rx + 8 Tx)
• Customizable per-packet filtering/filing to 64
•
•
•
•
•
logical receive queues
802.1p, IP TOS, Diffserv classification
Support for weighted fair queueing
TCP/UDP port-based flows
Assist firewall through IP/TCP/UDP reject
Ethernet preamble sorting and insertion
FIFO I/F to ASICs +
(R)GMII/(R)MII/(R)TBI
• 8/16-bits @ OC-48 rates and above
Layer 2 features
• VLAN insertion and deletion per frame
• 16 exact-match MAC addresses
Code compatible with PQ-III Gigabit
Ethernet controllers
Slide 71
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Gig-E Controller 1
DMA
Gig-E Controller 2
DMA
Quality
of 3
Gig-E
Controller
Service
64b DMA
FIFO
Service
TCP/IP
64b DMA
Quality
of Tx
OffloadService FIFOTx
TCP/IP
Quality of FIFO
Offload
Rx
Service 10kBTx
TCP/IP
FIFO 10/100/1G
FIFO
Offload
TCP/IP
MAC
2kB
10kB
10/100/1G
Offload
MAC
10/100/1000
MAC
16b FIFO
10/100/1000
Interface
MAC
Quality
of 4Tx
Gig-E
Controller
The RapidIO Fit
Interconnect Use
Characteristics
Ethernet
LAN/WAN
(billions of end-points)
RapidIO
Fabric
(50K+ end-points)
ASI
Switched Interconnect
PCI
Express
Serial Local Bus
(10+ end-points)
Parallel Local Bus
PCI-X
Slide 72
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IPv4/IPv6, 48-bit MAC
address
Hundreds of classes,
millions of flows, end-to-end
flow control, interworking
Message passing, architectural/
topological independence, one
flow, protocol tunneling
Serialized Input/Output
Transactions/DMA
Parallel Input/Output
Transactions/DMA
MPC86XX
e600 Single/Dual Core Update
February 10, 2005
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e600 PowerPC® Core Block Diagram
Sequencer Unit
32KB
Instruction
Cache
Instruction Fetch
Branch Unit
Completion
Unit
Dispatch
Unit
AltiVec™ Issue
GPR Issue
BHT /
BTIC
FPR Issue
GPRs
CFX SFX0 SFX1 SFX2
Rename
Buffers
FPRs
LSU
Rename
Buffers
PERMUTE
SIMPLE
COMPLEX
FLOAT
Rename
Buffers
FPU
•
32KB
Data
Cache
VRs
Unified L2
Cache
1MB
AltiVec™ Engine
Slide 74
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32-bit PowerPC®
processor architecture
• Millions sold
• All software-compatible
Improvements
• L2 cache increase to 1MB
• L2 with ECC
• AltiVec™ out-of-order
Bus
Interface
Unit
transactions
Addition of a second
cacheable store miss
SMP support
• MESI cache coherence
• Intervention
MPC7447A
Higher Performance – Highest EEMBC
benchmarks to date
• 1420MHz to the embedded specification and
•
•
reliability requirements
1167MHz at 1.1 core voltage at 9.3 watts
600MHz at 1.1 core voltage at 5.2 watts
Lower Power – Enhanced thermal power
management
• Ability to de-rate core voltage from 1.3 to 1.0 volt.
• Dynamic Frequency Switching enables software
control of frequency – 40-45% power savings
• Temperature Sensor Diode allows the monitoring of
junction temperature for management of system
power
Cost-effective – A true “drop-in” high
performance processor
Slide 75
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MPC7448
Compatibility
• Software compatible with 7447A
• Pin-to-pin compatible with 7447A
 Apps note AN2656 describes how to handle differences in power supplies
and bus multipliers
New Features
•
•
•
•
•
L2 increased to 1MB
L2 optionally protected by ECC with SECDED
MPX bus up to 200MHz
Out-of-order Altivec instructions supported
Increased flexibility for dynamic frequency shifting
Performance, Power
•
•
•
•
Specification
Frequency (GHz)
Voltage
Power (W, typ)
N Spec
1.4 - 1.5
1.0
<10
L Spec
1.7 - 1.8
1.1
15
Technology
• 90nm 9LM-Cu CMOS-SOI
• Package: 360 HiCTE BGA
Schedule
Slide 76
• Alpha: Dec 04
• Engineering samples: Q1-05
• Production: Aug 05
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MPC7447A Processor Benchmarks
®
IPmark™
245.1
819.8
TCPmark™
135 (with AltiVec)
Netmark™
46.7
500.6 (with AltiVec)
Telemark™
41.4
0
200
400
600
• IPmark and TCPmark reflect new Networking Version 2.0 scores
• AltiVec optimized benchmarks show up to 12 time faster processing
• Telemark score with AltiVec outperforms TI C64-720 DSP with optimized C
Slide 77
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800
1000
Assembly AltiVec optimizations
MPC7447-1.3G_NewAV
Comparing Telecom Improved
Optimizations
C-only AltiVec optimizations
11X
Comparing
4.3X Telecom Optimizations
MPC7447-1.3G_AltiVec
Original C-only AltiVec
optimizations
"Out-of-the-box" Freescale G4+
Assembly AltiVec optimizations
MPC7447-1.3G_AVassy
MPC7447-1.3G
13X
11X
MPC7447-1.3G_NewAV
TMS320C6416-720_assy
Improved C-only AltiVec optimizations
Assembly optimizations
4.3X
MPC7447-1.3G_AltiVec
TMS320C6416-720_opt
Original C-only AltiVec
C-only optimizations
optimizations
"Out-of-the-box" Freescale G4+
"Out-of-the-box" TI DSP
MPC7447-1.3G
TMS320C6416-720
0.5X
TMS320C6416-720_assy 0
100
200
300
400
500
600
700
600
700
EEMBC Telemark™
Assembly optimizations
TMS320C6416-720_opt
C-only optimizations
TMS320C6416-720
0.5X
0
"Out-of-the-box" TI DSP
100
Details
Slideat
78www.eembc.org
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200
300
400
EEMBC Telemark™
500
Vectorized Standard C Libraries
One of many useful features of AltiVec is 128 bit wide bus between
Register and L1 Cache
• 4x more that for Scalar Unit….
…which means that if used properly it can offer greater I/O capabilities
for some standard C library functions like….
•
•
•
•
•
memcpy
bcopy
memset (bzero)
memmove
strlen, strcmp, strcpy
…which are normally just linked in at the final stage of compilation
• ld dhry21a.o dhry21b.o –l c:/sw/libmoto/libmotoVec.a -l c:/gcc/lib/gcc-lib/powerpceabisim/2.95.2/libgcc.a -o vec_dhry21.elf
Slide 79
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Power-Efficient Processing
Relative
Perf/Watt:
<< 1
Applications emerging that can
take advantage of thread
parallelism
Requires higher performance
Power
2x core
Relative
Perf/Watt:
Time
Single
Core
F1
Slide 80
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Dual
Core
F1
Performance
Power
2x frequency
Power
1
Both can have performance
close to that of 2x a single core
at F1
<1
Performance
Relative
Perf/Watt:
Perf
Performance
• Double the cores
• Double the speed
Single
Core
2x F1
Dual core is much lower power
Dual core has much better
performance per watt
High Performance with Integrated Connectivity
Within Embedded Power Budgets
From this…
744x
Problem: Clock frequency
doesn’t solve the problem
within power budget
744x
to this…
MPC8641D
System Controller
PowerQUICC™
Solution: Combine
• Dual e600 PowerPC® cores
 Dual-processor performance
 Altivec™ extensions
 Fast L2 caches
 Symmetric multiprocessing
• PowerQUICC™ integration
 High internal bus speed
 Low chip counts
 Low memory latency
… in a single device
Slide 81
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MPC8641D – Dual-Core PowerPC® Processor
MPC8641D
e600 core
32KB
D-Cache
32KB
I-Cache
1MB
L2
(ECC)
• Dual e600 PowerPC® cores
1MB
L2
(ECC)
e600 core
32KB
D-Cache
32KB
I-Cache
MSS
•
MSS
MPX Bus
MPX Coherency
Module
MPIC
64b DDR/
DDR2 SDRAM
Controller
Queue
Queue
Local Bus
64b DDR/
DDR2 SDRAM
Controller
•
•
•
 >1.5GHz
Dual DDR2 memory
controllers
4x GbE controllers
RapidIO fabric: 1x/4x SRIO
Local I/O interfaces
 Dual x1/x2/x4/x8 PCI
Express
• Multiprocessor interrupt
DMA
Perf Mon
Trace Buffer
DUART
2x I2C
Timers
16b FIFO
16b FIFO
8b FIFO
8b FIFO
8b FIFO
8b FIFO
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
SRIO
1x/4x
OR
PCI Exp
x1/2/4/8
Slide 82
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PCI Exp
x1/2/4/8
•
•
•
•
controller
Local Bus
Power (typical): 15–25W
10-yr reliability at 105°C Tj
90nm fabrication process
MPC8641 – Single-Core PowerPC® Processor
MPC8641
• Pin-to-pin compatible with
32KB
D-Cache
•
1MB
L2
(ECC)
e600 core
32KB
I-Cache
•
MSS
MPX Bus
MPX Coherency
Module
MPIC
Queue
Queue
Local Bus
64b DDR/
DDR2 SDRAM
Controller
64b DDR/
DDR2 SDRAM
Controller
•
•
•
MPC8641D
Single e600 PowerPC®
core
 >1.5GHz
Dual DDR2 memory
controllers
Ethernet controllers
RapidIO fabric: 1x/4x SRIO
Local I/O interfaces
 Dual x1/x2/x4/x8 PCI
Express
DMA
Perf Mon
Trace Buffer
DUART
2x I2C
Timers
16b FIFO
16b FIFO
8b FIFO
8b FIFO
8b FIFO
8b FIFO
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
Gigabit
Ethernet
SRIO
1x/4x
OR
PCI Exp
x1/2/4/8
Slide 83
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PCI Exp
x1/2/4/8
• Multiprocessor interrupt
•
•
•
•
controller
Local Bus
Power (typical): 10–15W
10-yr reliability at 105°C Tj
90nm fabrication process
Memory Controllers
Dual memory controllers
• At least 333MHz clock rate,
•
•
•
667MHz data rate
64 bits (72 bits with ECC)
4 banks
Support for up to 4Gb devices,
x8, x16, x32 configurations
Up to 4GB DIMMs per bank
Up to 16GB per controller
Low-latency read path
Power conservation modes
•
•
•
•
Flexible address mapping
• Each controller owns a block of
•
memory
Page- or cache-line interleaving
Slide 84
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MCM
Memory
Controller
Memory
Controller
MPC8641D
RapidIO for Fabric Connectivity
In-the-box interconnect
• Chip-to-chip, board-to-board, backplane
 Greater efficiency than box-to-box protocols
• Physical layer defined for backplane
interconnection
 ~80–100 cm + 2 connectors (serial)
• Both memory-mapped and packet-based
transactions
RIO
Switch
PCIe
ASIC
Extensible
• Layered architecture
Point-to-point packetized architecture
•
•
•
•
•
Low overhead
Variable packet size
Maximum 256 byte PDU
SAR support for 4K-byte messages
Hardware error recovery
Implementation
• 1x or 4x serial, to 3.125 Gbaud, 2.5Gb/s per lane
• RapidIO Interconnect Specification version 1.2
• Read/write bridged between PCI Express port
Slide 85
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ATCA 3.5
PCI Express for Local Connectivity
• PCI Express 1.0a compatible
• Supports x1, x2, x4 and x8
link widths @ 2.5 Gbaud,
2.0Gb/s
 Auto-detects number of
connected lanes
e600
e600
Root
Complex/
Endpoint
Root
Complex/
Endpoint
• Selectable as root complex
•
•
•
•
or endpoint at initialization
Root complex inbound
support for MSI and INTx
Endpoint support for
outbound MSI
Reads/writes carried across
ports
256 byte maximum payload
size
Slide 86
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Peripheral
Endpoint
Bridge
Peripheral
Endpoint
Peripheral
Endpoint
Peripheral
Endpoint
Multiprocessing Configurations
Core 0
Private
data
and data
Asymmetric Multiprocessing
• Heterogeneous OS support
• Two separate OS or two copies of
•
•
•
one non-SMP OS
Collapse two processors into one
Task offload or division of labor
Operating systems, data reside in
different address spaces
Slide 87
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Core 1
OS,
shared
user data
Core 0
OS,
Private
data
shared
user data
Symmetric Multiprocessing
• Homogenous OS support
• High-performance option
• Software transparency
• Cores share address space for OS
Memory Map Overlap
Private
data
Core 1
OS,
Private
data
MPC8641 and MPC8641D Statistics
Processor
MPC8641
MPC8641D
Single e600 PowerPC®
Classic, > 1.5GHz,
2.3MIPS/MHz
Dual e600 PowerPC®
Classic, > 1.5GHz,
2.3MIPS/MHz
L1: 32kB I/D
L2: 1MB with ECC
Caches
(per processor)
Memory Controller
Dual 64b DDR2, 667MHz with ECC
Fabric Interface
Serial RapidIO, 1x/4x at up to 2.5Gb/s per lane
Local I/O Interface
Dual PCI Express, x1/x2/x4/x8, 2.0Gb/s per lane
Power and supplies
10–15W, 1.0V and 1.1V
10 years at 105C
Reliability
Technology
15–25W, 1.0V and 1.1V
90nm silicon-on-insulator (SOI) process
Package
960-pin HiTCE ceramic, 33x33mm
Availability
Samples 2H-05, production 1H-06
Slide 88
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Summary
Freescale has leveraged its expertise in building highperformance PowerPC® processors and highly
integrated communications processors to design the
MPC8641D Dual-Core Processor
The MPC8641D delivers:
• A power/performance point targeted at embedded requirements
• A level of integration yielding multiple benefits:




Chip count reduction
High memory bandwidth
Low memory latency
Flexible I/O options
• An excellent solution for networking, telecom,
storage, industrial/military, printing, and
embedded computing applications
Slide 89
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Slide 90
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