Transcript Why YBS
Advanced Semiconductor Devices Y-BRANCH SWITCH (YBS) Anubhav Khandelwal OUTLINE • INTRODUCTION –Need for efficient electronic switches • YBS – – – – Principle of operation Ballistic Transport Characteristics Fabrication • YBS as efficient switch • APPLICATIONS – Theoretical Predictions – Demonstrated devices : • • • • Diodes Transistors Schmitt Trigger Logic Gates: NAND • SUMMARY Need for efficient electronic switches • Problem of switching bottleneck in modern communications network Need: • Ultra-fast switching • High packing density • Low power dissipation YBS be the solution? YBS: Principle of Operation Assuming Ballistic transport LEFT RIGHT Li For a YBS manufactured by etching through a GaAs/AlGaAs 2DEG, with ns=4×1011 cm−2 and Li ~ 200 nm, ΔVs ~1 mV STEM Fundamental limit for switching: eVs v F Li YBS: Ballistic Transport VR=-VO VL=VO Classical: VC 0 Ballistic: VC 1 Vo 2 OVo 4 2 VC • Ballistic Transport – Branch width < Electron free wavelength (1) PHYSICAL REVIEW B, Vol. 62, No.24, 15 DECEMBER 2000-II (1) YBS: Characteristics 1. For symmetric YBS, applying +V and –V to VL and VR will always result in negative Vc For asymmetric YBS, Vc is negative for lVl greater than certain threshold VR=-VO VL=VO VC (1) 2. (Theoretically) Possible to achieve gain without external biasing due to self coupling between the branches. (1) PHYSICAL REVIEW B, Vol. 62, No.24, 15 DECEMBER 2000-II YBS: Fabrication YBS as efficient switch 1. Speed • Small capacitance of central branch and small contact resistance (few kΩs). Switching at 50GHz has been demonstrated. • Theoretically, self coupling in ‘gateless’ YBS result in switching at THz range 2. Size • YBS with sub-100nm thick branches demonstrated. With branched nanowires, can go down further. 3. (1) APL VOLUME 83, NUMBER 12 22 SEPTEMBER 2003 Switching energy • Fundamental limit for switching (single mode coherent transport) is not Thermally limited in YBS eVs • eVs log 10k BT Switching voltage in FET is Thermally limited v F Li Applications Theoretical predictions VL Vo cost VR Vo cost Rectifier Second and higher harmonic generator VC Vo cos2t 2 VR V VL V VL VR VC as a function of VL • Diode if VR=0V VC Logic AND VC • Transistor if VR is varied Reversible logic using YBS • Minimum energy dissipation due to information erasure is kT ln 2 Currently, much more than kT being dissipated IRREVERSIBLE LOGIC e.g. NAND • Ideally, avoid information erasure by zero energy dissipation Practically, always some energy dissipation but kT ln 2 REVERSIBLE LOGIC Reversible logic using YBS (a) (b) (a) A Fredkin or “Controlled Exchange” gate based on four YBSs (b) The corresponding truth table A is the control, exchanging the inputs B and C if it is set to high. Note: It is as universal as NAND/NOR Erik Forsberg, “INSTITUTE OF PHYSICS PUBLISHING, Nanotechnology 15 (2004) S298–S302” YBS as Diode & Transistor Diode: VR = 0V - VL<0V, VC follows VL linearly - VL>0V, VC saturates Triode: VC as a function of VL for different values of VR Note: Room temperature operation demonstrated on YBS etched on GaInAs/InP Heterostructure H. Q. Xu, I. Shorubalko, D. Wallin, I. Maximov, P. Omling, L. Samuelson, and W. Seifert “IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 4, APRIL 2004” YBS as Schmitt-Trigger (a) SEM image of a YBS together with a schematic view of the measurement setup. A bistable mode of operation was realized by coupling the left branch to the right sidegate, i.e., Vgr=Vbl . All voltages are related to ground (b) Measurement setup in combination with the equivalent circuit of the YBS (shaded area) Schmitt-Trigger characteristics Demonstration of the bistable switching characteristic in feedback mode for Vbias=2.0 V. The hysteretic loop both for Vbl and Vbr is shown vs the voltage Vgl applied to the left sidegate. Logic Gates using YBS: NAND (a) SEM image of a NAND logic gate realized by integration of a TBJ with a point contact and the circuit setup for characterization. (b) Measured output voltage V and the corresponding input voltages V (dashed line) and V (solid line), for the NAND logic gate at room temperature. V = 10V and R=2.3M. The applied logic low and high inputs were set to 0 and 1.5 V, respectively, and the measured logic low and high outputs were set to 0.8 and 3.2 V. (c) Experimental truth table for NAND logic gate H. Q. Xu, I. Shorubalko, D. Wallin, I. Maximov, P. Omling, L. Samuelson, and W. Seifert “IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 4, APRIL 2004” SUMMARY • Principle of operation, fabrication and characteristics of YBS • YBS as efficient electronic switch for high speed, low power operations like in communications networks • YBS as diode, transistor, schmitt trigger, NAND • Reversible logic possible through YBS