Testing Front-End Electronics for the ATLAS new Small Wheel (nSW)
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Transcript Testing Front-End Electronics for the ATLAS new Small Wheel (nSW)
Testing Front-End Electronics for the ATLAS
new Small Wheel Upgrade
Reid Pinkham
UM CERN REU Final Talk
August 10, 2016
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Background: new Small Wheel
Replace the present ATLAS Small Wheel with a new Small Wheel for the Phase-I upgrade
~ 10 m
Current muon system has many “fake” LV1 triggers and the small wheel is not
designed for the increased hit rate at high luminosities
New detector will provide both trigger and precision measurement
nSW will have two detector technologies, sTGC and Micro-Megas
new Small Wheel (nSW)
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Background: MMFE8 Front-End Readout Board
Front-End board for the Micro-Megas detectors
Readout is done by an Application Specific Integrated Circuit (ASIC) called the VMM
Front-End board has 8 such chips and attaches directly to the detector
Current prototype includes a Field Programmable Gate Array (FPGA) to interface the
chips
Connection to Detector
Custom ASIC
Readout
Ethernet for
Readout
FPGA to configure
ASICs and Readout
Trigger Input
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My Projects: VMM Calibration with xADC
The Xilinx Analog Digital Converter (xADC) in the FPGA is used to sample
the DC levels
The FPGA Firmware reads thousands of analog values from a VMM and
sends them out to the control software over Gigabit Ethernet.
The xADC firmware is implemented as a small part of the whole
MMFE8 readout firmware
More features will be added in the future such as configurable sample
size and period
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My Projects: Simultaneous VMM Readout
The current stable firmware can only read data from one VMM
This limits the area of the detector which can be readout
Solution: Readout all VMM chips for each trigger
This required a large firmware restructuring
Bug fixes are still ongoing, semi-stable version complete
1 VMM Readout Timing
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Bonus Activity: Test Beam for Micro-Megas Detectors
120 GeV Pion Beam with controllable bunch rate
A ~ 5 kHz bunch rate was used
At the Prévessin site
Tested small Micro Mega Detectors with MMFE8
Front End Boards (FEBs)
Detectors + FEBs
Beamline
Trigger Electronics
Ethernet Switch
High Voltage
Supply
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Test Beam Results
Successfully read data from one VMM with an external trigger
Can see beam profile in data
Gathered data from multiple boards in beam, track reconstruction ongoing
Hits
Channel Hit Distribution
Channel Number
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Acknowledgements
I would like to thank the team from NTUA and BNL for allowing me to join their group
for the summer
I would also like to thank the NSF for supporting the REU program and my summer at
CERN
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Questions?
Comments or Questions?
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