Transcript capacitance

Edge-Based Circuits
DIGI-260
©Paul R. Godin
prgodin @ gmail.com
Edge 1.1
Schmitt-Triggering
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Schmitt triggered devices respond with an abrupt
transition on the output logic, even with a
relatively long edge as the input.
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Standard gates typically respond with a relatively
soft edge on the output.
Edge 1.2
Schmitt-Triggering
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Schmitt-triggered devices have two
absolute threshold voltages:
VT - : Logic Low threshold voltage where if the
input voltage drops below this level, the input is
seen as a logic low.
VT + : Logic High threshold voltage where if the
input voltage climbs above this level, the input is
seen as a logic high ()
Edge 1.3
Schmitt Triggering
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The two threshold voltages are separated. The difference is
described as “delta-V”, or ΔV.
•
Within this zone, the existing logic state is held until the
threshold for the other logic state is crossed.
– If the input is a logic low, this logic low will be held until the upper
voltage threshold is crossed. Once the input is a logic high, this state
will be held until the lower voltage threshold is crossed.
– These devices require an extra degree of change to overcome the
present state, known as hysteresis.
hysteresis symbol
Edge 1.4
Applications for Schmitt-Triggered Devices
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Oscillators
Analog to digital converters (threshold voltage)
Edge signal conditioning
Noise reduction
Edge detectors
Reset on power-up
See www.fairchildsemi.com/an/AN/AN-140.pdf
Edge 1.5
Vt+ and Vt
If an input rises from a
logic low toward a logic
high, eventually the input
would detect a transition
from a low input to a high
input state. This voltage is
VT+.
Logic
High
(5V)
Logic
Low
(0V)
Transition (Logic 0 to Logic 1)
(Vt+)
Detected
Input
Logic
State
Vt+ and VtLogic
 Similarly, if an input falls
High
from a logic high toward a (5V)
logic low, eventually the
input would detect a
transition from a high
input to a low input state.
This voltage is VT -.
Transition
(Logic 1 to Logic 0)
(Vt-)
Logic
Low
(0)
Detected
Input
Logic
State
Edge 1.7
Vt+ and Vt
There is a
separation
between the
Vt+ and the Vtpoints.
Input
Vt+
VtGate
Input
1
0
Inverter
Gate Output
Edge 1.8
Converting a sine wave to a square wave
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Use a Schmidt triggered gate
– Input 0V to +5V (positive offset on AC voltage input).
+5V
0V
Edge 1.9
Edge Detector
Edge
Detector
Edge 1.10
Edge Detection
Edge detectors are circuits that produce an
output pulse only when an output edge is
detected.
This output pulse can then be used to
enable a device for a period of time.
When the pulse is applied to a gated latch,
the device becomes an edge-triggered FlipFlop.
Edge 1.11
Propagation Delay Edge Detector
Edge 1.12
Exercise 1

Create an EWB circuit with a Schmitt triggerbased edge detector. Analyse the output.
Edge 1.13
RC-Based Edge Detection
Edge 1.14
Exercise 2

Use EWB to analyse the RC-Based Edge
Detector
Edge 1.15
Questions

On an RC Edge-detection circuit:
◦ What is the time relationship between E and VR / VC ?
◦ On which edge(s) will VR exhibit a voltage?
◦ What is the reason that VR will exhibit a peak-topeak voltage higher that the applied voltage E?
◦ What happens to the negative voltage?
◦ How can the pulse width be modified?
Edge 1.16
Exercise 3

Create an edge-triggered D Flip-Flop using only
NAND gates.
Edge 1.17
END
©Paul R. Godin
prgodin @ gmail.com
Edge 1.18