Transcript L1C-Spring07

318-595 Project Lab 1C
Project Proposal
• Objectives
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Present Capstone Project Proposal
Modifications & Approvals
Refinement of Standard & Performance Requirements
Detailed Block-Block Interface Definitions
Present P1 in Lab - Next Week
10 Minutes/Team
318-595 Project Lab 1C
Project Proposal Presentation – P1
• Deliverable 1
– Powerpoint slide set used for “P1” which captures
Labs
1A-B
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Team Number, Names & Brief Description of Expertise
Available Project Resource Summary
Initial Project Proposals including simple block diagrams
Selection Process including systematic scoring system
Recommended Project Description
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Perf Requirements Summary
Std Requirements Summary
Basic Business Case
Refined Block Diagram
Block Diagram Description Table
318-595 Project Lab 1C
Block Diagram Description
Block
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Block Name
Owner
Brief Description
Of Block Function
Power
Interface
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Digital
Interfaces
Analog
Interface
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1
Power Supply
J. Doe
Converts Commercial AC Power
to 5VDC and +/-12VDC with 1
hour battery backup if AC fails
In: AC
Out: 5VDC,
+/-12VDC
None
Out: Vbat
2
CPU & Clock
A. Student
Senses User I/F Switches for
command inputs and updates
display periodically, digitizes Vbat
In: 5VDC
Out: Data Bus,
Addr Decode
In: Port A
In: Vbat
3
User Interface
Z.
Engineer
Provides user inputs for
continuous speed, dir and binary
control of lights. Provides user
output display for speed, temp &
battery life.
In: 5VDC,
+12VDC
In: Data Bus
Out: Port A
None
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5
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7
318-595 Project Lab 1C
Block Interface Signals
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Deliverable 2 – Individual Assignment for Block Owners
1. For Each Design Block: Define and document all of your Block-Block
Interface Signals in the spreadsheet template included within the 3 main
areas:
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Power Signals including Power Consumed, Power Supplied
Digital Interface Signals (including busses)
Analog Interface Signals
2. Review ALL “Inter-block” signals and document Approval and “OK” in
your spreadsheets to record signal agreements.
3. See attached Block Interface Signal Table Excel Tool
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Summary Tab is Locked
Data Flows from Power, Digital and Analog Tabs
Some Cells have pull-down selections, Others are Free Form Values
BLOCK OUTPUTS NEED TO AGREE WITH BLOCK INPUTS !!!
4. Deliverables for each block include:
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Block Interface Excel File – Electronic
Powerpoint Summary Slide – Electronic and Paper
318-595 Project Lab 1C
Block Signals: Summary Table
• This tab is locked and all information flows from
individual Power, Digital and Analog Tabs
318-595 Project Lab 1C
Block Signal Table: Power
Power Signal Design Guidelines
• Block Numbers Used for To-From Column
• Assume ALL Blocks will consume and/or provide power
• Consumers must provide worst case demand to Providers (owners)
• Blocks that supply power may also consume it and must allow for their inefficiencies
• If you have bipolar (+/-) analog signals you will need split supplies
• Power Supply Margin = ~50%
• Try to keep DC voltage supplies at standard values including 3.3, 5, 9 and 12 VDC
• Must specify both nominal and range of voltages
• Must specify maximum total current for each voltage
• Frequency range for AC voltages
• Specify % regulation and max voltage ripple for DC voltages
• Must specify Block-Block Interconnect Means for each signal
• If a digital signal is also a power signal, treat it as a power signal
318-595 Project Lab 1C
Block Signal Table: Digital
Digital Signal Design Guidelines
• Block Numbers used for To-From Column
• A digital signal is one that conveys two levels of information (ie; 1/0, On/Off,
etc)
• Must classify direction from your block: Input, Output or Bidirectional
• Must specify Block-Block Interconnect Means for each signal
• For Inputs classify as Standard or Schmitt Trigger
• Inputs must have Vih, ViL, (or Vth), Iih and IiL limits
• For Outputs classify as Totem Pole, Open Collector, or Tristate
• Outputs must have Voh, VoL, Ioh and IoL limits
• If unsure, start by assuming Std TTL levels, Std Input, Totem Pole Output
Std TTL: Vih => 2.0V, ViL <= 0.8V, Iih <= 40uA, IiL <= -1.6mA;
16mA
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Voh => 2.4V, VoL <= 0.4V, Ioh <= -400uA, IoL <=
For noisy or slow transition digital signals, use a Schmitt trigger input
Consider optical isolation when digital signals are needed to control or sense
318-595 Project Lab 1C
Block Signal Table: Analog
Analog Signal Design Guidelines
• Block Numbers used for To-From Column
• By default if a signal is not a Power signal, nor a Digital signal it becomes an
analog signal
• Classify direction of the signal with respect to the block, Input, Output or
BiDir
• Must specify Block-Block Interconnect Means for each signal
• Classify the coupling of the signal as Direct, Capacitive, Xfmr or Other
• Classify the maximum voltage (amplitude), use peak values not RMS
• For input signals, classify the min-max input impedance the signal will be
loaded with
• For output signals, classify the min-max output impedance the signal will be
driven from
• Classify the min-max frequency range for the signal
• Finally list any appreciable leakage current allowed for the signal if
318-595 Project Lab 1C
Ethics & Intellectual Property
• Deliverable 3 (Team)
– Identify at least 3 “active” patents that would be worthwhile
understanding for your recommended project
• Patent Number
• Patent Name or Title (Page 1)
• Patent Date
– Identify a min of 2 Ethical or Societal Issues that could arise with
Engineering your project
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What could happen to a user if the product fails
What are the major hazards the product presents to a user?
How can you prevent a product failure from causing injury or harm?
What if the engineering is faulty or flawed? Any Consequences?
How can you prevent faulty or flawed engineering?
What are the key areas of engineering that need to be 100% robust?
318-595 Project Lab 1C
Definition of US Patent
A legal acknowledgement of original invention
from the US government granting the patent
holder the right to exclude others from
making, using, selling, and offering for sale
the invention. It does not necessarily give the patentee the right to practice
the invention.
318-595 Project Lab 1C
Anatomy of a Patent (US)
Primary Inventor
Title:
A short descriptive name of the invention.
Inventors:
Assignee: Legal Entity Owning Patent
Filing Date/Info:
References, Prior Art:
Examiner(s)/Attorney(s)
Abstract: A general description of the
nature of the invention
Std US Patent
Sections
Patent – Title Page
318-595 Project Lab 1C
How do I find Patents? Internet
Sites
- Sites offer limited key word
searching
www.uspto.gov
www.us-patent-search.com
www.msoe.edu/library/patent_searching/index.htm
Try to find at least 3 patents that may be applicable to your
recommended project/product
– List only the patent(s) number, title and date on 1 slide