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Ultra High Speed Digital
Circuits
Brandon Ravenscroft
12/03/2015
How Fast Is Ultra High Speed?
• Speeds which require special materials, cables,
connectors or severely restrictive board layouts
• Fastest commercially available parts (clock speed and
rise/fall time)
• Clock rates and rise times faster than we saw in class
material
Ultra High Speed Considerations
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Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Ultra High Speed Considerations
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Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Current Mode Logic (CML)
• No official standardization.
Typically vendor specific
[3]
• Used for high speed, point
to point signaling only
(Typically Differential)
• Needs termination
resistors for current flow
• Input stage has 2 emitterfollowers
• Output stage is a BJT
differential pair
• AC or DC Coupling
• Used up to 10 Gbps+[2, 3]
Maxim Integrated CML Implementation [2]
Current Mode Logic (CML)
• Maxim Integrated Implementation
[2]:
• On chip 50 Ω Input and Output
Terminations
• Typical 16 mA Current Source
• Vcc: +3.3 V Single Supply
• Single ended or differential
mode.
• Typical 800 mV output
differential voltage
• Common mode output voltage
of Vcc – 0.2 V
Maxim Integrated CML Implementation [2]
Low Voltage Differential Signaling (LVDS)
• Developed by National Semiconductor
• Standardized as ANSI/TIA/EIA-644-A [3]
• Used for point-to-point or multi-drop
transmission of low voltage differential
signals (Typically Differential)
• Input Voltage from 0 to 2.4 V
• 350 mV differential output voltage
• Used up to 2.5 Gbps
• Requires 100 Ω termination
• Very low power consumption (load
current must be < 3.5 mA) – less than
ECL or CML
• DC Coupling only [2, 3]
Maxim Integrated LVDS
Implementation Output Stage [2]
Low Voltage Differential Signaling (LVDS)
• Maxim Integrated Implementation
• Differential input and output
terminated in 100 Ω
Maxim Integrated LVDS
Implementation Input Stage [2]
Maxim Integrated LVDS
Implementation Output Stage [2]
Comparison of Fast Logic Families
ECL
LVDS
CML
Bus
P-P or Multi-Drop
P-P or Multi-Drop
P-P only
Relative Power
High
Low
Medium
Coupling
DC or AC
DC Only
DC or AC
Termination
50 Ω
100Ω
50 Ω
Semiconductor
Transistor Type
BJT
CMOS, BiCMOS
BJT, CMOS
Speed
> 10 Gbps
2 Gbps
>10 Gbps
Fast Logic Families Comparison Data Provided by [3]
These three logic families can be
interfaced with proper design.
Ultra High Speed Considerations
•
•
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Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
High Speed Dielectric Materials
Motivations:
𝑐
• 𝑣𝑝 =
→ lower dielectric constant allows faster
𝜖𝑟
signal propagation.
• Consider a high speed square wave as sine waves
with fundamental and higher order harmonic
frequencies.
• High frequency harmonics must be preserved to
avoid dispersion and signal distortion.
• Stability over temperature and frequency is desired.
High Speed Dielectric Materials
Material Examples:
• PTFE Resin [4]:
• 𝜖𝑟 = 2.1
• Small change in dielectric constant over large
frequency and temperature range.
• DF ≤ 0.0004 up to 1 GHz. Increases slightly with
temperature
• RT/duroid 5880 (PTFE Composite) [5]:
• 𝜖𝑟 = 2.2
• Used in Ku band and above (12-18 GHz)
• 125 ppm/◦C change in 𝜖𝑟
• DF = 0.0009 at 10 GHz
Ultra High Speed Considerations
•
•
•
•
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Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
High Speed Connectors
•
BNC (Bayonet Navy or British Naval
Connector)
• Originated in military use – quick to
connect/disconnect
• Used for frequencies up to 4 GHz.
Slots radiate above this frequency.
• Common in 50 Ω and 75 Ω ohm
impedance
• Threaded version (TNC) usable up
to 12 GHz
• PTFE Dielectric [7, 8]
BNC Male Connector [6]
High Speed Connectors
•
SMA (Sub-miniature type-A)
• Very widely used in RF/Microwave
• Operates up to 25 GHz
• PTFE Dielectric
• Designed by Bendix Scintilla
[7, 8]
SMA Male (left) and Female
(right) connectors [9]
High Speed Connectors
•
K Connector
• Operates in all K band regions (1840 GHz)
• Developed by Wiltron
• Advancement of 2.92 mm
connector
• Air Dielectric [7,8]
Various K connectors [10]
High Speed Connectors
•
1 mm Connector
• Developed by Hewlett-Packard
• Supports frequencies up to 110
[GHz]
• Air Dielectric
Male (left) and Female
(right) 1 mm connectors [11]
High Speed Coaxial Cable
•
Gore Precision Cable
• ePTFE Dielectric with 𝜖 𝑟 = 1.3
• Measured 1.15 ns/ft propagation
delay (87% of C)
• Conductor sizes down to AWG 42
(2.5 mils)
• DF < 0.0002
Gore Coaxial Cable [12]
Ultra High Speed Considerations
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•
•
•
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•
Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Voltage and Power
•
•
CPU Clock Frequency vs. Power
• For CMOS devices: 𝑃𝐷𝑦𝑛 = 𝑓 ∗ 𝑉 2 ∗ 𝐶
• Reducing voltage logic level in processor reduces power
dissipation
• Intel 8080 Processor (1974) had clock speed of 4 MHz and
voltage levels of +12V and -5V [13]
• Intel Core i7 (2013) has a clock speed of 2.66 GHz and
voltage level from 800 mV – 1.375 V [14]
CPU Load vs. Power
• 𝑃𝐷 = 𝑉 ∗ 𝐼
• More load devices requires high current sourcing capabilities.
Lowering voltage decreases power
• Intel Core i7 (2013) has thermal design power dissipation of
130 W. [14]
Ultra High Speed Considerations
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•
•
•
•
•
Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Ultra High Speed Measurement
• Lower inductance in measurement path to reduce
effect on measurement
• Don’t use ground wire on scope probe
• Remove clip from probe tip and apply tip directly
to test point
• Connect ground shield directly to circuit ground if
possible or place ground wire as close to
measurement point as possible
• Shunt probe capacitance can alter circuit
performance
Ultra High Speed Measurement
Test Point
Ground
Curlycue
Ultra High Speed Considerations
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Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Hittite HMC841 D Flip-Flop
• CML design (single-ended or
differential)
• -3.3 V Supply
• Max clock rate: 43 GHz
• Rise/Fall time: 12 ps → Fknee =
41.7 GHz
• Propagation delay: 10 ps
• 630 mW power consumption
• Package: 24 lead 4 mm x 4 mm
SMT (Area of a dime is ~ 250 mm2)
• Adjustable output voltage between
200 -850 mVpp
[15]
HMC841 Diagram [15]
Micrel SY55851(A) Any Gate
• Programmable to perform any
Boolean function of two bits
• Clock frequency up to 3 GHz
• 100 Ω or 50 Ω CML output on
board termination
• Inputs compatible with differential
PECL and CML
• 2.3 - 6.0 V supply voltage
• 350 ps propagation delay
• 110 ps rise/fall time → Fknee = 4.5
GHz
• 10 Pin 3 mm x 3 mm leaded
package
[16]
Micrel SY55851 Functional
Block Diagram [16]
Ultra High Speed Considerations
•
•
•
•
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•
Alternate Logic Types
Dielectric Materials
Connectors and Cables
Voltage and Power
Measurement Techniques
Ultra High Speed IC Examples
Ultra High Speed Layout Challenges
Simple High Speed Layout
• Clock divider circuit
fA = ½ * fClk
fB = ¼ * fClk
Source: [17]
• HMC841 D flip-flops will be used. Tr= 12 ps, fClk =
43 GHz max, Td = 10 ps. Setup time not given,
assume negligible.
Simple High Speed Layout
• Ignoring Trace Delays
fA = ½ * fClk
fB = ¼ * fClk
1
2
Source: [17]
• Time for clock to stable signal 1: 10 ps
• Time for clock to stable signal 2: 10 ps + 10 ps = 20 ps
Simple High Speed Layout
• Allowable time for trace and other delays
fA = ½ * fClk
fB = ¼ * fClk
1
2
Source: [17]
• 43 GHz clocks requires maximum path delay of 23.3 ps
• Only 23.3 ps - 20 ps = 300 fs is left for trace and all
other delays to achieve maximum clock frequency!
• At 180 ps/in (FR-4 ) only 1.7 mils are left for traces
Simple High Speed Layout
• Challenge: Design a layout to implement this
circuit with the maximum possible clock
frequency.
fA = ½ * fClk
fB = ¼ * fClk
1
2
Source: [17]
References
[1] Title Photo: "Circuit, Circle, Circulation." Digital Media Theory. N.p., 31 Oct. 2013. Web. 02 Dec.
2015. <https://digitalmediatheory.wordpress.com/2013/10/31/circuit-circle-circulation/>.
[2] "Introduction to LVDS, PECL, and CML." Maxim Integrated (2008): 1-14. Web. 27 Nov. 2015.
<http://pdfserv.maximintegrated.com/en/an/AN291.pdf>.
[3] Goldie, John. "LVDS, CML, ECL-differential Interfaces with Odd Voltages." EETimes. EETimes, 21
Jan. 2003. Web. 02 Dec. 2015. <http://www.eetimes.com/document.asp?doc_id=1225744>.
[4] "Teflon PTFE Properties Handbook." (n.d.): n. pag. Web. 01 Dec. 2015.
<http://www.rjchase.com/ptfe_handbook.pdf>.
[5] "RT/duroid® 5870 /5880 High Frequency Laminates." (n.d.): n. pag. 2015. Web. 01 Dec. 2015.
<https://www.rogerscorp.com/documents/606/acs/RT-duroid-5870-5880-Data-Sheet.pdf>.
[6] "BNC." Telco Antennas BNC. Telco Antennas, n.d. Web. 02 Dec. 2015.
<https://www.telcoantennas.com.au/site/category/products/bnc-connectors>.
[7] "Microwave Connectors." Microwaves101. N.p., n.d. Web. 02 Dec. 2015.
<http://www.microwaves101.com/encyclopedias/microwave-connectors>.
[8] Agilent RF and Microwave Test Accessories. Agilent Technologies, 2003. Web. 01 Dec. 2015.
<http://www.keysight.com/upload/cmc_upload/All/CoaxialConnectorOverview.pdf?&cc=US&lc=eng>.
References
[9] What Is an SMA Connector? Moton Industrial, n.d. Web. 01 Dec. 2015. <http://www.mtrf.com/shownews.asp?id=212>.
[10] "K Connectors." K Connectors. Carlisle Interconnect Technologies, n.d. Web. 02 Dec. 2015.
<http://www.carlisleit.com/product/k-connectors>.
[11] Wikipedia Commons. N.p., n.d. Web. 01 Dec. 2015.
<https://commons.wikimedia.org/wiki/File:1mm_connector_male_female.jpg>.
[12] "Precision Coaxial Cable." Precision Coaxial Cable. Gore, n.d. Web. 02 Dec. 2015.
<http://www.gore.com/en_xx/products/cables/coaxialmicrowave/aircraft/precision_coaxial_cable.html>
[13] "Intel 8080 Family." Intel 8080 Family. CPU World, n.d. Web. 02 Dec. 2015. <http://www.cpuworld.com/CPUs/8080/>.
[14] "Intel® Core I7-920 Processor (8M Cache, 2.66 GHz, 4.80 GT/s Intel® QPI) Specifications." ARK
Product Launch. Intel, n.d. Web. 02 Dec. 2015. <http://ark.intel.com/products/37147/Intel-Core-i7-920Processor-8M-Cache-2_66-GHz-4_80-GTs-Intel-QPI>.
[15] "HMC841." (n.d.): n. pag. HMC841. Hittite. Web. 02 Dec. 2015.
<http://www.analog.com/media/en/technical-documentation/data-sheets/hmc841.pdf>.
References
[16] "Micrel SY55851(A) Any Gate." (n.d.): n. pag. Micrel SY55851(A) Any Gate. Micrel. Web. 02 Dec.
2012. <http://www.micrel.com/_PDF/HBW/sy55851-51a.pdf>.
[17] "How to Make Frequency Divider?" Digital Logic. N.p., n.d. Web. 02 Dec. 2015.
<http://electronics.stackexchange.com/questions/73722/how-to-make-frequency-divider>.
[18] Slide Template: http://identity.ku.edu/powerpoint/index.shtml
Thank you!
Questions?