Transcript CPU - Renesas e

ID A18C: Walking the Low-power/High-
performance Tightrope in Portable or
Battery-operated Equipment
Renesas Electronics America Inc.
Mike Clodfelter
Product Marketing Manager, 16bit K0R MCUs
12 & 13 October 2010
Version: 1.0
© 2010 Renesas Electronics America Inc. All rights reserved.
Mike Clodfelter
 Product Marketing Manager for Renesas
Electronics 16bit K0R Ultra-low Power MCUs
 Specialist in MCUs for the medical/healthcare, and Low-Power,
portable/Battery-operated Application markets
PREVIOUS EXPERIENCE:
 Joined NEC Electronics America in 1985 as a senior FAE, with an
emphasis on MCUs, LCD drive and VF displays, for white goods and
Industrial control/consumer markets.
 Staff FAE from 1990-2006, adding market segments such as cable
modem, digital AV, telecom equipment and automotive modules to
responsibilities.
 Prior to NEC Electronics America, design engineer at Motorola
Communications Group
 Member of the IEEE professional association
 BSEE from Rose-Hulman Institute of Technology
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Renesas Technology and Solution Portfolio
Microcontrollers
& Microprocessors
#1 Market share
worldwide *
ASIC, ASSP
& Memory
Advanced and
proven technologies
Solutions
for
Innovation
Analog and
Power Devices
#1 Market share
in low-voltage
MOSFET**
* MCU: 31% revenue
basis from Gartner
"Semiconductor
Applications Worldwide
Annual Market Share:
Database" 25
March 2010
** Power MOSFET: 17.1%
on unit basis from
Marketing Eye 2009
(17.1% on unit basis).
3
© 2010 Renesas Electronics America Inc.
All rights reserved.
Renesas Technology and Solution Portfolio
Microcontrollers
& Microprocessors
#1 Market share
worldwide *
Solutions
for
Innovation
ASIC, ASSP
& Memory
Advanced and
proven technologies
Analog and
Power Devices
#1 Market share
in low-voltage
MOSFET**
* MCU: 31% revenue
basis from Gartner
"Semiconductor
Applications Worldwide
Annual Market Share:
Database" 25
March 2010
** Power MOSFET: 17.1%
on unit basis from
Marketing Eye 2009
(17.1% on unit basis).
4
© 2010 Renesas Electronics America Inc.
All rights reserved.
Microcontroller and Microprocessor Line-up
Superscalar, MMU, Multimedia
High Performance CPU, Low Power
High Performance CPU, FPU, DSC
 Up to 1200 DMIPS, 45, 65 & 90nm process
 Video and audio processing on Linux
 Server, Industrial & Automotive
 Up to 500 DMIPS, 150 & 90nm process
 600uA/MHz, 1.5 uA standby
 Medical, Automotive & Industrial
 Up to 165 DMIPS, 90nm process
 500uA/MHz, 2.5 uA standby
 Ethernet, CAN, USB, Motor Control, TFT Display
 Legacy Cores
 Next-generation migration to RX
General Purpose
 Up to 10 DMIPS, 130nm process
 350 uA/MHz, 1uA standby
 Capacitive touch
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© 2010 Renesas Electronics America Inc.
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Ultra Low Power
Embedded Security
 Up to 25 DMIPS, 150nm process  Up to 25 DMIPS, 180, 90nm process
 190 uA/MHz, 0.3uA standby
 1mA/MHz, 100uA standby
 Application-specific integration  Crypto engine, Hardware security
Microcontroller and Microprocessor Line-up
Superscalar, MMU, Multimedia
 Up to 1200 DMIPS, 45, 65 & 90nm process
and audio processing on Linux
78K Video
Server, Industrial & Automotive
ULTRA LOW POWER!
High Performance CPU,
Low
Easy
to Power
program
Low Cost
Great IDE
The FPU,
Cube DSC
is Suite!
High Performance CPU,
 Up to 500 DMIPS, 150 & 90nm process
 600uA/MHz, 1.5 uA standby
 Medical, Automotive & Industrial
 Up to 165 DMIPS, 90nm process
 500uA/MHz, 2.5 uA standby
 Ethernet, CAN, USB, Motor Control, TFT Display
 Legacy Cores
 Next-generation migration to RX
General Purpose
 Up to 10 DMIPS, 130nm process
 350 uA/MHz, 1uA standby
 Capacitive touch
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© 2010 Renesas Electronics America Inc.
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Ultra Low Power
Embedded Security
 Up to 25 DMIPS, 150nm process  Up to 25 DMIPS, 180, 90nm process
 190 uA/MHz, 0.3uA standby
 1mA/MHz, 100uA standby
 Application-specific integration  Crypto engine, Hardware security
Innovation
Proliferation of Battery-Operated Equipment:
Compact and Cordless
7
© 2010 Renesas Electronics America Inc.
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Agenda
 Intro to Low-power Battery-operated
Instruments
 7 Low-power Design Considerations
 Renesas Electronics 16-bit Ultra-Low
Power MCU Lineup
 Design Example
8
© 2010 Renesas Electronics America Inc.
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Key Takeaways
By the end of this session you will be able to:
 Identify Key Low Power System Design Considerations
 Identify Keys Ways to Conserve Power in Low Power
Applications
 Recite Pitfalls in Portable/Battery-Operated Designs
 Identify Renesas MCUs having Optimum Performance
at Ultra-low power with High integration
9
© 2010 Renesas Electronics America Inc.
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Walking the Low-power/High-performance Tightrope
in Portable or Battery-operated Equipment
High
Performance
Low Power
Consumption
10
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Portable, Battery-Operated Instruments
Examples of General
Portable Instruments
Examples of Long-Life
Instruments
Medical/Diagnostic
 Utility Water/Gas Meters
Personal hygiene/Healthcare
 Pacemakers
Industrial/Commercial Sensors
 Tollway Transponders
Wireless Networking Device
Smoke/CO Alarms
Performance
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Long Life
System Power Challenges
for Battery-operated Instruments
Test strip
Handheld Blood
Glucose Meter
MCU wakes
up with
button press
System
activity
and
current
draw
>99% Time in
STOP/Standby
mode: very
low-power &
time-of-day clock
4 A/D conversion
and calculate
Glucose level
2 System
3
initialWait for
1
ization
blood
STOP/
test strip
Standby
insertion
mode
5 Display
result
2-4 minutes depending on user’s activity
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6 No further button
activity, back
to STOP/standby
Time
How to maximize Battery life and Performance
(High Level)
 Seriously:






13
Keep Clock Freq. Low, Max. efficiency
Gate Peripherals On/Off
Reduce Current “Sneak” Paths
Choose Batteries w/ Best Fit
Keep Temp Range Low
MCU w/ Internal Regulator
© 2010 Renesas Electronics America Inc.
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MCU/CPU Operational Definitions
CPU Operation/
Active Mode
CPU Halt/Idle
Mode
14
Instructions Executed,
All Peripherals Available
Instructions Execution Suspended,
Main System Clock Running
All Peripherals Available
CPU STOP/Standby
32KHZ/RTC Mode
Instructions Execution STOP,
Main System Clock STOP
Few Peripherals Available
CPU STOP/Standby
Mode (No Clocks)
Instructions Execution STOP,
Main System Clock STOP
32KHZ/RTC STOP
© 2010 Renesas Electronics America Inc.
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7 Low-power Design Aspects to Consider
The power:performance balance
1. Battery Attributes and Tradeoffs
2. Peripheral functions
3. CPU performance/Clocking Issues
4. Internal LDO voltage regulator
5. I/O Port Loading, Floating Input Danger
6. Low Power Displays - Segmented LCD
7. Temperature effects on standby current
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#1a – Battery Choice Issues (Intro):
 Load Capacity versus Lifetime
 Peak Current Draw
 Voltage Range Characteristics
 Self-Leakage versus Time/Temp
 Internal Series Resistance (ESR)
 Primary (Disposable) vs Secondary (rechargeable)
Lithium Coin Cells
Akaline/Cylindrical
AA
AAA
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PCB-Mount
#1b – Varying Battery Voltage Over Life
Battery Physical Size/Capacity and Personality
(~650 milliwatt hr/cc)
Capacity:
~610mA-HR
CR2032
Capacity:
~220mA-HR
Voltage
(Constant Current Load)
CR2450
Constant Current Load @0.19mA
Operating Hours
“Flat” battery life curve
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Use Low
Battery
Detect to
Monitor
Voltage!
Akaline
(>370 milliwatt hr/cc)
AA
AAA
Voltage
(Constant Current Load)
Lithium coin
Capacity:
~2500mA-HR
Capacity:
~1200mA-HR
Constant CV (IxV) Loads
100mW
250mW
Operating Hours
“Sloping” battery life curve
#1c - Battery life target calculations
System
Activity
and
current
draw
MCU wakes up
with button press
4
A/D conversion
and calculate
Glucose level
2 System
3
initialWait for
1
ization
blood
STOP/
test strip
Standby
insertion
mode
1 sec
@1mA
30 sec
@300uA
Check to see if
CR2032, 220mA-hr
capacity meets
application target
time!
5 Display
result
6 No further button
activity, back
to STOP/standby
15 sec
@8mA
180 sec
@500uA
Time
Total current = 1mA-SEC + 9mA-SEC + 120mA-SEC + 90mA-SEC = 220 mA-SEC
(average per reading)
Target: 5 readings per day, 1100mA-SEC per day
Assuming 1uA in standby, daily = (85,370 sec x 1ua) + (1100 mA-SEC) = 1185 mA-SEC
Approximate life = (220mA-hr x 3600 sec/hr)/1185 mA-SEC/day = 668 days
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#1d – Battery Self-Leakage
Lithium Battery Self-discharge
100
% of Initial
Capacity
 Battery
self-leakage
is always
acting
22C
90
80
45C
70
60
0
2
4
6
Age (Years)
+
Vopen
-
circuit
+
-
Internal Leakage
Increase Exponentially
At Elevated Temps!
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RLeakage
8
10
#1e – Aging battery concerns
RESR
+
At battery end-of-life, ESR (Equivalent
Series Resistance) increases
dramatically (10x-100x of initial)
Vopen
circuit
-
+
-
Consider using an MCU with low-battery detect!
Case A:
Vdrop = 0.1V
Case B:
RESR =
10 Ohms
+ 10mA
3.1V load
-
Vdrop = 0.6V
RESR =
MCU
Vload
RLoad
=
= 300 3.0V
Ohms
100 Ohms
6mA
2.4V load
+
-
MCU in
Danger of
RESET!
MCU
RLoad
= 300
Ohms
Vload
=
1.8V
Case C:
Vdrop = 1.0V
RESR =
100 Ohms
+ 10mA
2.4V load
-
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MCU
WILL
RESET!
MCU
ILoad
= 10
mA
Vload
=
1.4V
#1f - Using Low Voltage Detect Circuit to Monitor Sagging
Battery Voltage
Aging Battery
3.1V
Weak Battery
LV Detect =
2.9V
2.5V
Action Taken:
Lower CPU
Speed, Set
LVD = 1.9V,
2.7V
Reset
Mode
2.2V
2.2V
LV Detect =
2.3V
Battery Voltage
2.8V
1.9V
1.6V
Low Voltage
Detect
Interrupt Flag
Interrupt
Service
Routine
Internal
RESET
Action Taken:
Lower CPU
Speed, Set
LVD = 1.9V,
Reset Mode,
Show Low
Batt. Symbol
Action
Taken:
Lower CPU
Speed, Set
LVD = 2.3V,
Interrupt
Mode
Time
21
Dead Battery
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LV Detect =
1.9V
1.7V
1.5V
Question
Question 1: What battery characteristic more than all
else challenges a designer’s skill for making a robust
low power MCU design?
Answer:
a. Temp range
b. Battery Capacity
c. Voltage range
d. Equivalent Series Resistance
e. Self-Leakage
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#2 – Managing Peripherals
Peripheral functions



Digital (Primarily AC Drain)
Analog (Primarily DC Drain)
Other:
Legend:
MCU
Analog
Blocks
CPU/
SW
MCU
Digital
Blocks
Analog,
Transducer
Signals
Serial
Ports
Comparators
Op-amps
(Amplify,
filter)
Stable,
accurate VREF
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• DC current in
Standby?
• AC current when
operating?
• Can clocks be
gated/scaled?
• What should be
left on in standby
mode?
Timers/
Counter
Digitize
(12-bit
ADC)
Real
Time
Clock
Digital
processing
(CPU/
SW)
DC Voltage Level
CPU Active Mode
(all resources)
Vs.
20% x
CPU Halt/Idle Mode Active
(all Peripherals)
Current
Vs.
<0.01% x
CPU STOP Mode Active
Current
DMA
Watch
Dog
Timer
LCD controller/
driver with
boost
Convert
To analog
(DAC)
Low
Voltage
Detect
Display
results
• Analog voltages
(AC and DC)
• Voice/tones
#3a – Use CPU Clock for Optimum Performance/Current Drain
CPU performance vs. Clock Frequency
 Goals




1 or 2 clock cycles
Highest DMIPS @ Lowest current
Scale back/turn off CPU
Minimize average battery drain
•Some MCUs use a
2x/4x Oscillator
– not as efficient as
One-to-one OSC: CPU
•The Fastest speed - not
always the most efficient one
0.5mA @ 0.5MHz
20mSEC (10mA-SEC)
~
CPU
Clock
Tradeoff
Example
16mA @32MHz
0.5mSEC (8mA-SEC)
2mA @ 8MHz
2mSEC (4mA-SEC)
~
~
Cycle time depends on application
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Good
Better
Best!
#3b –Use Internal High Speed OSC to Minimize Startup
Time, Save Power
(1) Internal high-speed system clock for fast startup
Interrupt
Request
Standby Release Signal
Status of
CPU
Normal Operation
Internal High-Speed
Oscillation Clock
Oscillation
STOP
Mode
Supply
of Clock
Is
Stopped
Oscillation
Stopped
Normal Operation
Int. HS. Oscillation
(2) External Xtal/resonator oscillator for accuracy
Interrupt
Request
Standby Release Signal
Status of
CPU
Normal Operation
Int. HS. Oscillation
Internal High-Speed
Oscillation Clock
Normal Operation
Int. HS. Oscillation
Oscillation
Stopped
XTAL/Resonator
Oscillation
*
External Xtal/Resonator
* Optional
25
STOP
Mode
Supply
of Clock
Is
Stopped
© 2010 Renesas Electronics America Inc.
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Stabilization
#4 – Use Internal Voltage Reg. to Minimize Current
Drain
Internal voltage regulator
I/O
I/O
Ext.
osc.
block
Timers
Serial
I/O
Comparator
CPU
POR/
POC
Int. HS
osc.
WDT
Clock
gen.
stby
control
Low
volt
MCU detect RTC
core
voltage
reg.
LCD C/D
Voltage
with booster
ref.
ADC
DAC
Opamp
Supply
Current,
CPU and
Core
Peripherals
MCUs with
No Internal
Voltage Reg;
Current Drain
Increases
with Supply
Voltage!
MCUs with
an Internal
Voltage Reg;
Current Drain
Constant
Over Supply
Voltage!
1.8V 2.4V 3.0V 3.6V 4.2V 4.8V 5.5V
Supply Voltage
Internal core LDO
voltage regulator
- Keeps CPU and core function
current drains constant
26
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Functions attached to I/O pins
- Current drains rise
proportionally to supply
voltage
Question
Question 2: What are the reason(s) why newer
MCU designs use an internal LDO voltage regulator
Answer 2:
a. To provide a stable CPU core voltage
b. To optimize the CPU core design using a
limited internal Voltage range
c. To reduce the power dissipation
d. To reduce current drain at higher Supply Voltage
e. all the above
27
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#5a – Avoid “Sneak paths” on I/O Lines
I/O drive and loading
Output Low Loading
VDD = 3.0 Volts
Pull-up
enable
R
VOL
Ext.
Circuit
IOL
Output
data
General
purpose
I/O pin,
Output
= High
28
VDD
P-ch
P-ch
Output High Loading
MCU
Pull-Up
Turned On
VDD
MCU
General
purpose
I/O pin,
Output
= Low
Input Pull up/Pull down
Pin Loading
IOH
VOH
R
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Ext.
Circuit
N-ch
Output
disable
Input
data
Input enable
Ext.
Circuit
#5b – Avoid Floating Input Pins
Phenomena of floating inputs
(due to contaminated PCBs)
VDD
10
MegOhm?
VDD
Gate
IDD =
“On”
currents
P-ch
INPUT
pin
Leakage
paths
10
MegOhm?
5.0V
5uA
4.0V
4uA
3.0V
3uA
IDD
2.0V
2uA
Vout
Gate
N-ch
To
Internal
MCU
circuits
1.0V
1uA
0V
0uA
0V
1.0V
2.0V
3.0V
Vin
4.0V
Side Bar: PCB cleanliness
Board contaminants can often swamp out nano-amp standby currents
29
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5.0V
#6a – Using Segment LCD panels to Save Power
Segmented LCD panels – STN (Super Twist Nematic)
 Advantages of Segmented STN LCD panels





Low Current Drain
Works in STOP/Standby (32KHZ)
Large Segment Count
Inexpensive
Customized - Quick Tooling TAT
Full custom:
mmgl
dL
+
 Disadvantages:
 Need Backlight
 Contrast/View Angle vs. Drive
Modern LCD MCUs, Flexible LCD drive –
LCD Booster
Resistive Divider,
Split Capacitor
30
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Alphanumeric: 14-16 Segments
Dot matrix example: 8x50 dots
#6b – Optimum LCD Panel Drive
Driving Segmented STN (Super Twist Nematic) LCD panels
Resistor Ladder
Network
3V
VDD
P-ch
MCU
2R*
VLC0
R*
VLC1
Constant:
•Drive Voltage
•Contrast
LCD Booster
Constant Current
Drain, Declining:
•Drive Voltage
•Contrast
(example:
If R =100K,
Then 10uA
is drawn
continuously!)
VLC0
VLC1
VLC2
VLC3
C2
C3
CAPH
C1
C1= C2= C3=
C4= C5= 0.47uF
R*
R*
VSS0
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C5
MCU
CAPL
VLC2
C4
Capacitor
Charging
gives back
to LCD Panel
(almost no DC
Bias Loss)
#7 - Effects of temperature on standby current (STOP/halt IDD)
STOP/halt
IDD Current
@VDD
= 3V
0.7uA 7
RAM leakage current mainly affects
STOP/halt current
increase
(> 55C)
SUBHALT RTCON-TEMP
[3V]
78F1167A 0807IK900
100%
Device1
Device2
0.6uA
6
90%
Device3
80%
0.5uA 5
IDD(μA)
0.4uA 4
0.3uA 3
0.2uA 2
0.1uA 1
% of battery
capacity
after 10years
(Lithium)
•Battery Drain from
RAM Leakage:
•0.2uA – 1uA Typ.
•2uA-8uA Max.
•Battery Drain from
Self-Leakage:
10s of uA
70%
60%
50%
40%
30%
0.0uA 0-50
-30
-10
10
30
50
70
90
-35C -25C -15C -5C +5C +15C +25C温度+35C +45C +55C +65C +75C +85C
32
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Renesas Electronics’ Ultra-Low-Power K0R MCUs
 Renesas Electronics delivers full line of 16bit ultra-low-power MCUs
 Designed for low power
 150nm flash process;
– Low current consumption; low leakage
– Small size and high performance
– Special architecture (secret sauce)
 Industry-leading low-power, Optimum performance
Renesas
Ultra Low
Power MCU
Attributes
33
=
Low
leakage
150nm
Process
© 2010 Renesas Electronics America Inc.
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+
High
Perform.
CPU
+
Multiple
Standby
Modes
+
Flexible
On-Chip
Peripherals
+
Dynamic
System
Clocking
K0R Ultra-Low Power MCU Design Keys
Hi-Speed
Internal
Oscillator
X1 Clock
Clock Selection
Halt
Sub Clock
Added
Instruction Fetch operation:
PS
CPU
PS
Peripheral
Function
PS
Peripheral
Function
PS
Peripheral
Function
RTC
Analogy: Turn Off Car Engine
instead of Idling!
34
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Opcode
(Byte1)
Operand Operand
(Byte2) (Byte3)
Turn off Opcode Decoder Earlier!
Opcode
(Byte1)
Opcode
(Byte2)
Operand
(Byte3)
Turn off Opcode Decoder Earlier
Analogy: Turn off the lights
when you leave the room!
Flexible but Energy-Conserving Low Power Modes
• Up to 25dmips
@20MHZ
Efficient
Watchdog Timer
Operation
High
Performance
Internal
• Ultra-Low
Active
Current:
190uA
typical
1MHZ CPU
Clocking
• WDT @30Khz
High Accuracy
Internal Oscillators
@-40C to
+85C
• 8MHZ +/-1.8% @2.7V-5.5V
• 20MHZ +/-2.4% @2.7V-5.5V
Quick Startup On
Int. Oscillators:
20/8/1 MHZ
• 23uSEC-31uSEC
max startup
35
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78K0R
Comprehensive
Low Power CPU
Operation
Modes
Internal 2.4V/1.8V
LDO Regulator
Stop Mode
With 32KHZ/RTC
Running
RTC
• Day/Week Alarms
• 1ppm Calibration
• 0.9uA Typ
Stop Mode
With No Clocks:
(Ext Pin Wakeup)
• Keeps Current Consumption
Low In All Modes (+1.8V - +5.5V)
•0.3uA
typical
Efficient Power Management
K0R MCU Current Drains
5.3mA
190uA
3.8
uA
20MHZ
8MHZ
Active Current
High Speed
20MHZ
Halt/Idle
Current
TypIcal
36
8MHZ
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Active Current
Low Speed
(1MHz)
32kHz
0.45mA
0.9uA
32kHz
1.1mA
63uA
fIH = 1MHz/4
fIH = 1MHz
2.4mA
Active
Stop
Mode
Mode*
Low Speed (32kHz/
(32kHz/
RTC)
RTC)
0.3uA
Standby
Mode *
(No
Clocks)
* RAM contents retained
K0R Clocking Options
78K0R/Kx3-L G.P./USB, 78K0R/Lx3/KE3-A LCD/non-LCD (12bit ADC/DACs)
Prescaler &
X8, x12 PLL
2-20MHz
Ext. Crystal
(X1, X2) or
Ext. Clock
(EXCLK)
Int. Oscillator
20MHz +/- 2.4%
8MHz +/- 1.8%
or
1MHz +/-13%
32,768 Hz
Subsystem 32kHz
Ext. 32kHz Crystal
Int. Low-speed Osc
30kHz +/- 10%
37
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PreScaler:
1/1
1/2
1/4
1/8
1/16
1/16
1/32
USB
Peripherals:
Serial, ADC,
Timer Arrays
CPU
Real-time
Counter
LCD
Controller/
Driver
Can Run LCD
in Standby
Mode <3uA
Buzzer/Clock
Output
Watchdog
Timer
(0.38uA Max)
78K0R/Kx3-L GP, USB and 78K0R/Lx3 LCD
MCU Safety Features
Eliminates External
Reset Circuitry
Power-on Clear (POC) Circuit
POC is
always ON, K0R/Kx3-L
Drawing No Kx3-L(USB)
K0R/Lx3
extra IDD
Current
K0R/KE3-A
VDD
Reset Release
Reset Occurs
Detection
Voltage Falling
1.59V
or 2.07V
Detection Voltage
Rising
1.61V
or 2.07V
Monitors Aging
Battery Conditions
Low-Voltage Indicator
LVI can be
enabled/
disabled
K0R/Kx3-L
Kx3-L(USB)
K0R/Lx3
K0R/KE3-A
Interrupt or Reset
Range:
1.9V to
4.22 V
Plus . . . An external Pin
function.
© 2010 Renesas Electronics America Inc.
All rights reserved.
VDD
Reset Release
1.5V
38
POC Current
Included
In Standby
Spec Value!
Selectable Interrupt or
Reset by Software
Boost
Regulator
1.21V
EXLVI
(Port)
3.3V
VDD
78K0R
MCU
Detection Voltage
Selectable by Software
EXLVI function:
monitor a power source
other than VDD!
78K0R/Kx3-L GP, USB and 78K0R/Lx3 LCD
Series
K0R/ GP, LCD and USB Line-up
128
K0R/LG3, LCD
K0R/LG3, LCD
Package Options
100
K0R/KG3-L
USB
K0R/LF3, LCD
80
K0R/KE3-L
12bit ADC/DACs,
3ch Op-AMP
K0R/KE3-A, non-LCD
64
K0R/KE3-L(USB)
K0R/KE3-L
52
K0R/KD3-L
48
K0R/KC3-L
44
Expanded
Memory
K0R/KC3-L(USB)
2 Comparators,
1ch PGA
K0R/KC3-L
16
32
48
64
96
128
192
256
Flash Options (KB)
Free full-featured
64KB C-Compiler
39
© 2010 Renesas Electronics America Inc.
All rights reserved.
1MB Linear Memory
(No banks)
78K0R Gen. Purpose MCU, LCD MCU and USB MCU
Composite Block Diagram
LCD Controller/
driver:
up to 400 seg.
Timer Array 0:
8ch, 16-biT
With LCD booster,
Resistor Bias,
Split Cap Drive
12-bit ADC
12-bit DAC
2ch
Clock/Buzzer
Output
HW: 16x16 MULT.
32/32 DIV.
Real-Time
Counter
(Clock/Calendar)
On chip Debug/
Programming
Watch Dog Timer
Internal OSC:
1/8/20MHZ
10-bit ADC
Int. WDT OSC: 30kHz
3ch OP-AMP
40
Timer Array 1:
4ch, 16-bit
78K0R 16-bit core
20MHz (up to
18 DMIPS)
+1.8V - +5.5V
-40 to +85C
Comparators
Internal
Voltage Ref.:
2.0V/2.5V
Programmable
Gain Amp
K0R/Lx3/KE3-A
K0R/Kx3-L
Flash: 64KB-128KB
RAM: 4KB-7KB
Pins: 64-128
Flash:16KB-256KB
RAM: 1KB-12KB
Pins: 40-100
© 2010 Renesas Electronics America Inc.
All rights reserved.
Sub-Clock: 32kHz
Flash (1KB Blocks)
 Secure self-prog.
 Boot Swap
Serial Array Unit
UART/SPI/I2C
Multi-Master I2C
DMA Controller
8/16-bit
POC
(Power On Clear)
LVI (Low Voltage
Indicator): 16
Levels (1.9V-4.2V)
Key Interrupt
Gen Purpose I/O
10-bit ADC
USB Function
K0R/Kx3-L (USB)
Common K0R CPU
Core and Peripherals
Flash: 64KB-128KB
RAM: 6KB-8KB
Pins: 48, 64
Question
Question 3: What is the minimum K0R System Clock
required to run an LCD C/D with Booster Circuit,
while achieving lowest possible current drain.
Answer 3:
a. External 20MHZ Xtal Oscillator divided by 32
b. Internal 8MHZ Oscillator
c. Internal 1MHZ Oscillator divided by 32
d. External 32KHZ (Ceramic Resonator)
e. None of the above (LCD booster circuit doesn’t
need a Clock)
41
© 2010 Renesas Electronics America Inc.
All rights reserved.
Design Example: 1-Chip Glucose Meter Block Diagram
78K0R/Lx3:
+
12-bit
DAC
AMP
AC/DC BIAS
Voltage
Ref.
LVI/
Annunciator,
WDT,
Battery
30kHz
Voice Playback
monitor
(ADPCM)
AC
12-bit
DAC
*
Reagent
strip for
blood
sample
42
POC/ LCD booster
Reset controller/
driver
16-bit CPU CORE
(3-stage Pipeline)
+
Self-Program Flash
On-chip-debug
Internal Oscillators
12-bit
ADC
Op-Amps
* = Transconductance
Amp using op-amp
© 2010 Renesas Electronics America Inc.
All rights reserved.
LCD Panel
(120-400segments)
-
User keypad
Timers, GPIO,
Serial ports
Serial
EEPROM
RTC
32kHz
Innovation
Renesas Ultra-Low Power K0R MCU Families
Facilitate Battery-Operated Equipment
43
© 2010 Renesas Electronics America Inc.
All rights reserved.
Questions?
44
© 2010 Renesas Electronics America Inc.
All rights reserved.
Thank You!
45
© 2010 Renesas Electronics America Inc.
All rights reserved.
Renesas Electronics America Inc.